CN219892189U

CN219892189U - Semiconductor photosensitive device

Info

Publication number: CN219892189U
Application number: CN202321176852.7U
Authority: CN
Inventors: 吴贵阳; 陈秋芳; 胡海峰; 刘宪成
Original assignee: Hangzhou Silan Integrated Circuit Co Ltd
Current assignee: Hangzhou Silan Integrated Circuit Co Ltd
Priority date: 2023-05-12
Filing date: 2023-05-12
Publication date: 2023-10-24
Anticipated expiration: 2033-05-12

Abstract

The utility model discloses a semiconductor photosensitive device, comprising: a semiconductor layer; a photosensitive region exposed to a first surface of the semiconductor layer; a field oxide layer located on the first surface of the semiconductor layer and exposing at least part of the photosensitive region; the anti-reflection layer is positioned on the first surface of the semiconductor layer and covers the photosensitive region, the surface of the field oxide layer and the side wall; an etch stop layer on the anti-reflective layer exposing at least a portion of the anti-reflective layer above the photosensitive region; and the electrode structure is at least positioned on the etching stop layer, penetrates through the etching stop layer and is in contact with the semiconductor layer. According to the utility model, the etching stop layer is added between the anti-reflection layer and the electrode structure, so that the electrode structure with uniform size can be obtained, and the thickness of the anti-reflection layer can be accurately controlled.

Description

Semiconductor photosensitive device

Technical Field

The utility model relates to the technical field of semiconductors, in particular to a semiconductor photosensitive device.

Background

The semiconductor photosensitive device is a device capable of converting optical signals into electric signals and is mainly applied to the fields of photoelectric conversion, illumination, communication, detection and the like. Semiconductor light sensitive devices include photodiodes, phototriodes, and the like.

In the development of semiconductor light sensitive devices, problems and challenges have been found, such as material selection, improved sensitivity, reduced noise, improved reliability, and the like.

In semiconductor photosensitive devices, an antireflection layer is generally provided in order to improve the sensitivity of the device, but the antireflection layer may cause compatibility with other structures.

Disclosure of Invention

In view of the foregoing, it is an object of the present utility model to provide a semiconductor photosensitive device in which an etching stop layer is added between an antireflection layer and an electrode structure, so that an electrode structure having a uniform size can be obtained, and the thickness of the antireflection layer can be accurately controlled.

According to an aspect of the present utility model, there is provided a semiconductor light-sensitive device comprising: a semiconductor layer; a photosensitive region exposed to a first surface of the semiconductor layer; a field oxide layer located on the first surface of the semiconductor layer and exposing at least part of the photosensitive region; the anti-reflection layer is positioned on the first surface of the semiconductor layer and covers the photosensitive region, the surface of the field oxide layer and the side wall; an etch stop layer on the anti-reflective layer exposing at least a portion of the anti-reflective layer above the photosensitive region; and the electrode structure is at least positioned on the etching stop layer, penetrates through the etching stop layer and is in contact with the semiconductor layer.

Optionally, the dimension of the etch stop layer is smaller than the dimension of an electrode structure located on the etch stop layer; the sidewalls of the etch stop layer are recessed relative to the sidewalls of the electrode structure located thereon.

Optionally, the etching stop layer is a silicon oxide layer, and the thickness of the etching stop layer is 1000-10000 angstroms.

Optionally, the anti-reflection layer is a silicon nitride layer, or a composite layer of a silicon oxide layer and a silicon nitride layer on the silicon oxide layer, and the thickness of the silicon nitride layer is 10 angstroms-1 micron.

Optionally, the semiconductor photosensitive device is a diode; the semiconductor layer includes at least: a substrate having a first doping type; a first doped region in the substrate and exposed to a first surface of the substrate, the first doped region having a second doping type, wherein the first doping type and the second doping type are of opposite polarity.

Optionally, the semiconductor layer further includes: and the epitaxial layer is positioned on the substrate, and the first doped region is positioned in the epitaxial layer and exposed on the first surface of the epitaxial layer.

Optionally, the electrode structure includes: a first electrode electrically connected to the first doped region; a second electrode electrically connected to the substrate; at least one of the first electrode and the second electrode is located on the etch stop layer.

Optionally, the semiconductor photosensitive device is a triode; the semiconductor layer includes: a substrate having a first doping type; an epitaxial layer having a first doping type; a third doped region in the epitaxial layer and exposed to the first surface of the epitaxial layer having a second doping type, wherein the polarities of the first doping type and the second doping type are opposite; and a fourth doped region in the third doped region and exposed to the first surface of the epitaxial layer, having the first doping type.

Optionally, the electrode structure includes: a third electrode electrically connected to the third doped region; a fourth electrode electrically connected to the fourth doped region; and a fifth electrode electrically connected to the substrate; at least two of the third electrode, the fourth electrode, and the fifth electrode are located on the etch stop layer.

Optionally, the electrode structure on the etch stop layer has a thickness of 0.5 to 5 microns and/or the electrode structure on the etch stop layer has a width of 0.5 to 5 microns.

Optionally, when all electrodes in the electrode structure are located on the etch stop layer, one electrode in the electrode structure is located above the field oxide layer and penetrates the etch stop layer, and the anti-reflection layer and the field oxide layer are in contact with the semiconductor layer.

Optionally, the area of the photosensitive region exposed by the etching stop layer accounts for 50% -95% of the total area of the photosensitive region.

In the embodiment of the utility model, the etching stop layer is added between the anti-reflection layer and the electrode structure, which is favorable for obtaining the electrode structure with uniform size and accurately controlling the thickness of the anti-reflection layer.

In the embodiment of the utility model, the electrode structure can be formed by dry etching due to the protection of the etching stop layer, so that the electrode structure has uniform critical dimension (CD, critical Dimension). Meanwhile, the anti-reflection layer is protected by the etching stop layer, and the influence of dry etching on the thickness and the surface appearance of the anti-reflection layer is avoided.

In the preferred embodiment, the etching stop layer is a silicon oxide layer, the thickness of the etching stop layer is 1000-10000 angstrom, and the etching stop layer is not etched through in advance due to the fact that the thickness of the etching stop layer is too thin in the first etching process; meanwhile, in the process of performing the second etching, the etching time is not too long due to the too thick thickness of the etching stop layer.

Drawings

The above and other objects, features and advantages of the present utility model will become more apparent from the following description of embodiments of the present utility model with reference to the accompanying drawings in which:

fig. 1 shows a schematic structure of a semiconductor photosensitive device according to a first embodiment of the present utility model;

fig. 2a to 2h show sectional views of stages of a method of manufacturing a semiconductor light sensitive device according to a first embodiment of the present utility model;

fig. 3 shows a schematic diagram of a semiconductor light sensitive device according to a second embodiment of the present utility model;

fig. 4 shows a schematic diagram of a semiconductor light sensitive device according to a third embodiment of the present utility model;

fig. 5 shows a schematic diagram of a semiconductor light sensitive device according to a fourth embodiment of the present utility model;

fig. 6 shows a schematic diagram of a semiconductor light-sensitive device according to a fifth embodiment of the present utility model;

fig. 7a and 7b show schematic diagrams of a semiconductor light-sensitive device according to a sixth embodiment of the present utility model.

Detailed Description

In the following, like elements are denoted by like reference numerals throughout the various figures. For clarity, the various features of the drawings are not drawn to scale. Furthermore, some well-known portions may not be shown. The semiconductor structure obtained after several steps may be depicted in one figure for simplicity.

When describing the structure of a device, when a layer, an area, is referred to as being "on" or "over" another layer, another area, it can be directly on the other layer, another area, or other layers or areas can be included between the layer, another area, and the other layer, another area. And if the device is flipped, the one layer, one region, will be "under" or "under" the other layer, another region.

If, for the purposes of describing a situation directly overlying another layer, another region, the expression "directly overlying … …" or "overlying … … and adjoining" will be used herein.

Unless specifically indicated below, the various portions of the semiconductor photosensitive device may be composed of materials known to those skilled in the art. Semiconductor materials include, for example, group III-V semiconductors such as gallium arsenide (GaAs), gallium nitride (GaN), and the like, group IV-IV semiconductors such as silicon carbide (SiC), and the like, group II-VI compound semiconductors such as cadmium sulfide (CdS), cadmium telluride (CdTe), and the like, and group IV semiconductors such as silicon (Si), germanium (Ge), and the like.

Fig. 1 shows a schematic diagram of a semiconductor light-sensitive device according to a first embodiment of the present utility model, in which the semiconductor light-sensitive device is a diode. As shown in fig. 1, the semiconductor photosensitive device includes a semiconductor layer, a field oxide layer 108, an anti-reflection layer, an etch stop layer, and an electrode structure.

The semiconductor layer includes a substrate 1011 and a first doped region 1012 and a second doped region 1013 within the substrate 1011, the first doped region 1012 extending from a first surface of the substrate 1011 toward an interior thereof, the second doped region 1013 extending from a second surface of the substrate 1011 toward an interior thereof, i.e., the first doped region 1012 is exposed to the first surface of the substrate 1011, the second doped region 1013 is exposed to the second surface of the substrate 1011, the first and second surfaces of the substrate 1011 being opposite. The substrate 1011 and the second doped region 1013 have a first doping type, and the second doped region 1013 is a heavily doped region with respect to the substrate 1011, the first doped region 1012 has a second doping type, and the conductivity types of the first and second doping types are opposite. The substrate 1011 and the first doped region 1012 are in contact with each other to form a PN junction, i.e., the photosensitive region 101a of the device, the photosensitive region 101a being exposed at the first surface of the substrate 1011.

The field oxide layer 108 is located on the first surface of the semiconductor layer, and the field oxide layer 108 is located at least above the substrate 1011 and exposes at least a portion of the first doped region 1012, i.e., exposes at least a portion of the photosensitive region 101a. In this embodiment, the field oxide layer 108 covers the edge of the first doped region 1012, exposing the central region of the first doped region 1012, i.e., the field oxide layer 108 is located over the substrate 1011 and a portion of the first doped region 1012.

The anti-reflection layer includes a first anti-reflection layer 1021, and the first anti-reflection layer 1021 covers the surface and the side wall of the field oxide layer 108 and the surface of the first doped region 1012 where the field oxide layer 108 is exposed. In one embodiment, the first anti-reflective layer 1021 is a silicon nitride layer, and the thickness of the first anti-reflective layer 1021 is, for example, 10 angstroms to 1 micron. The first anti-reflection layer 1021 covers at least the photosensitive region 101a exposed by the field oxide layer 108 to reduce light reflection of the photosensitive region 101a and increase sensitivity of the photosensitive region 101a.

The etch stop layer includes a first etch stop layer 1031, the first etch stop layer 1031 being located on the first anti-reflection layer 1021, covering a portion of the surface of the first anti-reflection layer 1021. In this embodiment, the first etching stop layer 1031 is located above the first doped region 1012, so that the first electrode 1051 located above the first etching stop layer 1031 can penetrate the first etching stop layer 1031 and the first anti-reflection layer 1021 to contact with the first doped region 1012, and at the same time, the first etching stop layer 1031 exposes at least a portion of the first anti-reflection layer 1021 located above the photosensitive region 101a. In a specific embodiment, the first etching stop layer 1031 is, for example, a silicon oxide layer, and has a thickness of, for example, 1000 to 10000 angstroms, and preferably, the first etching stop layer 1031 has a thickness of 3000 to 5000 angstroms. The area of the photosensitive region 101a exposed by the first etch stop layer 1031 accounts for 50% to 95% of the total area of the photosensitive region 101a.

The electrode structure includes a first electrode 1051 electrically connected to the first doped region 1012, and a second electrode 1052 electrically connected to the substrate 1011 via the second doped region 1013. In this embodiment, the second electrode 1052 and the first electrode 1051 are located on both sides of the semiconductor layer. Specifically, the first electrode 1051 is located on the first etch stop layer 1031, covers the surface of the first etch stop layer 1031, and is electrically connected to the first doped region 1012 in the semiconductor layer through the first etch stop layer 1031 and the first anti-reflection layer 1021. The second electrode 1052 is located on the second surface of the semiconductor layer and is electrically connected to the substrate 1011 via the second doped region 1013. In the present embodiment, the first electrode 1051 has a ring structure, but is not limited thereto; the thickness of the first electrode 1051 is, for example, 0.5 to 5 μm; the width of the first electrode 1051 is, for example, 0.5 to 5 micrometers.

Further, the size of the first etch stop layer 1031 is smaller than the size of the electrode structure (e.g., the first electrode 1051 in the present embodiment) located on the first etch stop layer 1031; in a cross-sectional direction perpendicular to the first surface of the semiconductor layer, the sidewall of the first etch stop layer 1031 is recessed with respect to the sidewall of the electrode structure (e.g., the first electrode 1051 in this embodiment) located thereon.

In this embodiment, the first etching stop layer 1031 is added between the first anti-reflection layer 1021 and the first electrode 1051, which can help to obtain the first electrode 1051 with uniform size and accurately control the thickness of the first anti-reflection layer 1021.

Fig. 2a to 2h show sectional views of stages of a method of manufacturing a semiconductor light sensitive device according to a first embodiment of the present utility model. A method of manufacturing a semiconductor light-sensitive device according to a first embodiment of the present utility model will be described with reference to fig. 2a to 2 h.

As shown in fig. 2a, a field oxide layer 108 is formed on the semiconductor layer.

In this embodiment, the semiconductor layer includes a substrate 1011, and a first doped region 1012 and a second doped region 1013 within the substrate 1011, the first doped region 1012 extending from a first surface of the substrate 1011 to an interior thereof, the second doped region 1013 extending from a second surface of the substrate 1011 to an interior thereof, i.e., the first doped region 1012 is exposed to the first surface of the substrate 1011, the second doped region 1013 is exposed to the second surface of the substrate 1011, and the first surface and the second surface of the substrate 1011 are opposite. The substrate 1011 and the second doped region 1013 have a first doping type, and the second doped region 1013 is a heavily doped region with respect to the substrate 1011, the first doped region 1012 has a second doping type, and the conductivity types of the first and second doping types are opposite. The substrate 1011 and the first doped region 1012 are in contact with each other to form a PN junction, i.e., the photosensitive region 101a of the device, the photosensitive region 101a being exposed at the first surface of the substrate 1011.

In this step, a field oxide layer 108 is formed on the semiconductor layer using a deposition and etching process. The field oxide layer 108 is at least above the substrate 1011, and since the first doped region 1012 is formed by ion implantation, the first doped region 1012 will laterally diffuse below the field oxide layer 108 due to the high temperature annealing of the impurities, such that the field oxide layer 108 is above the substrate 1011 and a portion of the first doped region 1012.

As shown in fig. 2b, an antireflection layer is formed on the semiconductor layer, and in this embodiment, the antireflection layer includes a first antireflection layer 1021.

In this step, a first anti-reflection layer 1021 is formed on the semiconductor layer, for example, by a deposition process, wherein the first anti-reflection layer 1021 covers the surface of the sensitive region 101a (specifically, the surface of the first doped region 1012) exposed by the field oxide layer 108, the surface of the field oxide layer 108, and the sidewalls.

In one embodiment, the first anti-reflective layer 1021 is formed, for example, by a chemical vapor deposition (Chemical Vapor Deposition, CVD) process. In this embodiment, the first anti-reflection layer 1021 is, for example, a silicon nitride layer, and has a thickness of, for example, 10 angstroms to 1 micron. The anti-reflection layer is used for weakening the reflection of incident light so as to improve the sensitivity of the photosensitive area, and the thickness control of the anti-reflection layer is the key for improving the sensitivity of the photosensitive area.

As shown in fig. 2c, an etch stop layer 103 is formed on the anti-reflective layer.

In this step, an etch stop layer 103 is formed on the first anti-reflection layer 1021, for example, using a deposition process. In one embodiment, the etch stop layer 103 is formed, for example, using a chemical vapor deposition (Chemical Vapor Deposition, CVD) process. In this embodiment, the etching stop layer 103 is, for example, a silicon oxide layer, and has a thickness of, for example, 1000 to 10000 angstroms, preferably 3000 to 5000 angstroms. In one specific embodiment, silicon oxide is formed using tetraethyl orthosilicate (Tetraethyl Orthosilicate, TEOS) as a precursor, followed by an anneal or Rapid Thermal Anneal (RTA) process for the first anti-reflective layer 1021 and the etch stop layer 103.

As shown in fig. 2d, a via 104 is formed, and the via 104 penetrates the etch stop layer 103 and the first anti-reflection layer 1021 to expose the first doped region 1012.

In this step, a mask layer is formed on the surface of the etching stop layer 103, the mask layer is patterned by using a photolithography process, and the etching stop layer 103 and the first anti-reflection layer 1021 are etched through the patterned mask layer, so that the number of through holes 104 reaching the first doped region 1012 is at least one. After forming the via 104, the mask layer is removed.

As shown in fig. 2e, a conductive layer 105a is formed.

In this step, a conductive layer 105a is formed over the etching stopper layer 103. The conductive layer 105a is, for example, a metal layer, and has a thickness of, for example, 0.5 μm to 5 μm. The conductive layer 105a is located on the etch stop layer 103 and fills the via 104, making contact with the first doped region 1012 via the via 104.

As shown in fig. 2f, a first etch is performed.

In this step, a mask layer is formed on the surface of the conductive layer 105a, the mask layer is patterned by a photolithography process, and the conductive layer 105a and at least part of the etch stop layer 103 are etched for the first time through the patterned mask layer. The first etching is, for example, dry etching. After the first etching is completed, the mask layer is removed.

After the first etching, the conductive layer 105a is patterned to form a first electrode 1051. Since dry etching is employed so that the first electrode 1051 has a uniform critical dimension (CD, critical Dimension), at the same time, the thickness of the first anti-reflection layer 1021 is not affected by the dry etching due to the protection of the etch stop layer 103. After the first etching, the etching stop layer 103 is etched to form a portion under the first electrode 1051 and an exposed portion (first etching leave a film), wherein the exposed portion is etched away by a certain thickness with respect to the portion under the first electrode 1051, and the exposed portion is left to have a thickness of, for example, 100 to 2000 angstroms. The thicker the conductive layer 105a, the thicker the etch stop layer 103 needs to be disposed correspondingly, so that the exposed etch stop layer 103 (first etching film) of the first electrode 1051 is at least maintained at a certain thickness after the first etching.

As shown in fig. 2g, a second etch is performed.

In this step, the exposed portion of the etch stop layer 103 is etched to expose the surface of the first anti-reflection layer 1021, and the remaining portion under the first electrode 1051 forms the first etch stop layer 1031. The second etching is, for example, wet etching, for example, ammonia fluoride solution, but is not limited thereto.

At the same time as the second etching removes the exposed portion of the etch stop layer 103, the exposed side of the portion of the etch stop layer 103 under the first electrode 1051 is also removed at the same time. Such that the size of the first etch stop layer 1031 is smaller than the size of the electrode structure (i.e., the first electrode 1051) located on the first etch stop layer 1031; in a cross-sectional direction perpendicular to the first surface of the semiconductor layer, the sidewalls of the first etch stop layer 1031 are recessed relative to the sidewalls of the electrode structure (i.e., the first electrode 1051) located thereon. In a specific embodiment, the sidewalls of the etch stop layer 103 are recessed relative to the sidewalls of the electrode structure (i.e., the first electrode 1051) located thereon by a dimension that is 1-2 times the dimension of the first etch leave film thickness.

As shown in fig. 2h, a second electrode 1052 is formed, the second electrode 1052 being located on the second surface of the semiconductor layer and being electrically connected to the substrate 1011 via the second doped region 1013.

The conventional process directly forms the first electrode after forming the anti-reflection layer, and there is a contradiction between the thickness of the anti-reflection layer and the size of the first electrode. Specifically, if dry etching is used to form the electrode structure on the anti-reflection layer, the thickness of the anti-reflection structure is inevitably affected by the dry etching, thereby affecting the sensitivity of the device. Therefore, in order to ensure the thickness of the anti-reflection layer, the formation of the electrode structure on the anti-reflection layer must be terminated by wet etching, if only wet etching is adopted, the size of the first electrode is not easy to control, and when the design rule is insufficient, abnormal shading can be caused; if dry etching and wet etching are combined, the process cost is increased, and the risk of metal residue in forming the electrode structure is high.

In this embodiment, the etching stop layer 103 is added between the first anti-reflection layer 1021 and the conductive layer 105a, and due to the protection of the etching stop layer 103, the conductive layer 105a can be etched by dry etching to form the first electrode 1051, so that the first electrode 1051 has a uniform critical dimension (CD, critical Dimension). Meanwhile, the etching stop layer 103 protects the first anti-reflection layer 1021, and the influence of dry etching on the thickness of the first anti-reflection layer 1021 is avoided.

In this embodiment, the etching stop layer 103 is a silicon oxide layer with a thickness of 1000 angstrom to 10000 angstrom, and the etching stop layer 103 is not etched through in advance due to the too thin thickness of the etching stop layer 103 in the process of performing the first etching; meanwhile, in the process of performing the second etching, the etching time is not too long due to the too thick thickness of the etching stop layer 103.

Fig. 3 shows a schematic diagram of a semiconductor light-sensitive device according to a second embodiment of the present utility model, in which the semiconductor light-sensitive device is a diode. As shown in fig. 3, the semiconductor photosensitive device includes a semiconductor layer, a field oxide layer 108, an anti-reflection layer, an etch stop layer, and an electrode structure.

Unlike the first embodiment, in the present embodiment, the antireflection layer includes a first antireflection layer 1021 and a second antireflection layer 1022. Wherein the second anti-reflection layer 1022 covers the surface of the first doped region 1012 exposed by the field oxide layer 108, the field oxide layer 108 surrounds the second anti-reflection layer 1022, and the sidewall of the second anti-reflection layer 1022 contacts the field oxide layer 108. The first anti-reflection layer 1021 covers the surface of the second anti-reflection layer 1022, the surface of the field oxide layer 108, and the sidewalls of the field oxide layer 108. In a specific embodiment, the second anti-reflective layer 1022 is, for example, a silicon oxide layer, and the first anti-reflective layer 1021 is, for example, a silicon nitride layer.

Unlike the manufacturing method of the first embodiment, the forming method of the antireflection layer of the present embodiment includes forming the second antireflection layer 1022 and forming the first antireflection layer 1021.

A second anti-reflection layer 1022 is formed on the semiconductor layer, for example, by deposition and etching processes, wherein the second anti-reflection layer 1022 covers the surface of the first doped region 1012 exposed by the field oxide layer 108, the field oxide layer 108 surrounds the second anti-reflection layer 1022, and the sidewall of the second anti-reflection layer 1022 contacts the field oxide layer 108.

Next, a first antireflection layer 1021 is formed, for example, using a deposition process, and the first antireflection layer 1021 covers the surface and the side wall of the field oxide layer 108 and the surface of the second antireflection layer 1022.

In one embodiment, the second anti-reflective layer 1022 and the first anti-reflective layer 1021 are formed, for example, by a chemical vapor deposition (Chemical Vapor Deposition, CVD) process. In this embodiment, the second anti-reflection layer 1022 is, for example, a silicon oxide layer, the first anti-reflection layer 1021 is, for example, a silicon nitride layer, and the thickness of the first anti-reflection layer 1021 is, for example, 10 angstroms to 1 micron.

Fig. 4 shows a schematic diagram of a semiconductor light-sensitive device according to a third embodiment of the present utility model, in which the semiconductor light-sensitive device is a diode. As shown in fig. 4, the semiconductor photosensitive device includes a semiconductor layer, a field oxide layer 108, an anti-reflection layer, an etch stop layer, and an electrode structure. Wherein the semiconductor layer 101 includes a substrate 1011 and a first doped region 1012, the anti-reflection layer includes a first anti-reflection layer 1021 and a second anti-reflection layer 1022, and the electrode structure includes a first electrode 1051 and a second electrode 1052.

Unlike the second embodiment, in the present embodiment, the first electrode 1051 and the second electrode 1052 are located on the same side of the semiconductor layer, and accordingly, the etch stop layer includes a first etch stop layer 1031 and a second etch stop layer 1032.

Specifically, in the present embodiment, the semiconductor layer includes a substrate 1011, a first doped region 1012 and a second doped region 1013 within the substrate 1011, and the first doped region 1012 and the second doped region 1013 are exposed to a first surface of the substrate 1011 and are separated from each other.

The field oxide layer 108 is located on the first surface of the semiconductor layer, exposing at least a portion of the first doped region 1012. Specifically, the field oxide layer 108 covers the edge of the first doped region 1012, exposing the central region of the first doped region 1012.

The second anti-reflection layer 1022 covers the surface of the first doped region 1012 where the field oxide layer 108 is exposed, the field oxide layer 108 surrounds the second anti-reflection layer 1022, and the sidewall of the second anti-reflection layer 1022 is in contact with the field oxide layer 108. The first anti-reflection layer 1021 covers the surface of the second anti-reflection layer 1022, as well as the surface and sidewalls of the field oxide layer 108.

The first and second etch stop layers 1031 and 1032 cover a portion of the surface of the first anti-reflection layer 1021, respectively, and the first and second etch stop layers 1031 and 1032 are separated from each other. In this embodiment, the first etch stop layer 1031 is located above the first doped region 1012 such that the first electrode 1051 located above the first etch stop layer 1031 can penetrate the first etch stop layer 1031 and the anti-reflection layer to contact the first doped region 1012 located below the first etch stop layer 1031, while the first etch stop layer 1031 exposes at least a portion of the anti-reflection layer located above the photosensitive region 101a. A second etch stop layer 1032 is located over field oxide layer 108.

The first electrode 1051 covers the surface of the first etch stop layer 1031 and penetrates the first etch stop layer 1031, the first anti-reflection layer 1021, and the second anti-reflection layer 1022 to be electrically connected to the first doped region 1012 in the semiconductor layer. The second electrode 1052 covers the surface of the second etch stop layer 1032 and penetrates the second etch stop layer 103, the first anti-reflection layer 1021 and the field oxide layer 108, being electrically connected to the substrate 1011 in the semiconductor layer via the second doped region 1013. The first electrode 1051 and the second electrode 1052 are separated from each other.

Fig. 5 shows a schematic diagram of a semiconductor photosensitive device according to a fourth embodiment of the present utility model, in which the semiconductor photosensitive device is a triode. As shown in fig. 5, the semiconductor photosensitive device includes a semiconductor layer, a field oxide layer 108, an anti-reflection layer, an etch stop layer, and an electrode structure.

In this embodiment, the semiconductor layer includes a substrate 1011, an epitaxial layer 1018 on the substrate 1011, a third doped region 1014 in the epitaxial layer 1018, and a fourth doped region 1015 within the third doped region 1014. The third doped region 1014 and the fourth doped region 1015 are both exposed to a first surface of the epitaxial layer 1018. Wherein the substrate 1011, the epitaxial layer 1018 and the fourth doped region 1015 have the first doping type, the third doped region 1014 has the second doping type, the epitaxial layer 1018, the third doped region 1014 and the fourth doped region 1015 form a PNP junction or an NPN junction, and the PNP junction or the NPN junction forms the photosensitive region 101a of the semiconductor layer. The third doped region 1014 serves as a base region and the fourth doped region 1015 serves as an emitter region.

The field oxide layer 108 is located on the first surface of the semiconductor layer, exposing at least a portion of the sensitive area 101a. In this embodiment, the field oxide layer 108 covers the edge of the third doped region 1014, exposing the central region of the third doped region 1014 and the fourth doped region 1015 located within the third doped region 1014.

The antireflection layer includes a first antireflection layer 1021 and a second antireflection layer 1022, the second antireflection layer 1022 covers the surface of the third doped region 1014 and the fourth doped region 1035 where the field oxide layer 108 is exposed, the field oxide layer 108 surrounds the second antireflection layer 1022, and the sidewall of the second antireflection layer 1022 is in contact with the field oxide layer 108. The first anti-reflection layer 1021 covers the surface of the second anti-reflection layer 1022, the surface and the sidewalls of the field oxide layer 108.

The etch stop layer includes a third etch stop layer 1033 and a fourth etch stop layer 1034, the third etch stop layer 1033 and the fourth etch stop layer 1034 being both located on the first anti-reflective layer 1021, in particular, the third etch stop layer 1033 being located above the third doped region 1014 such that the third electrode 1053 located above the third etch stop layer 1033 is able to penetrate the third etch stop layer 1033 and the anti-reflective layer to be in contact with the third doped region 1014 located below the third etch stop layer 1033; the fourth etch stop layer 1034 is located over the fourth doped region 1015 such that the fourth electrode 1054 located over the fourth etch stop layer 1034 can pass through the fourth etch stop layer 1034 and the anti-reflective layer to contact the fourth doped region 1015 located under the fourth etch stop layer 1034. In a specific embodiment, the third etch stop layer 1033 and the fourth etch stop layer 1034 are, for example, silicon oxide layers, for example, having a thickness of 1000 angstroms to 10000 angstroms.

The electrode structure includes a third electrode 1053, a fourth electrode 1054, and a fifth electrode 1055; the third electrode 1053 covers the surface of the third etch stop layer 1033 and penetrates the third etch stop layer 1033, the first anti-reflection layer 1021, and the second anti-reflection layer 1022 to be electrically connected to the third doped region 1014 in the semiconductor layer. The fourth electrode 1054 covers the surface of the fourth etch stop layer 1034 and penetrates the fourth etch stop layer 1034, the first anti-reflection layer 1021 and the second anti-reflection layer 1022 to be electrically connected with the fourth doped region 1015 in the semiconductor layer. The third and fourth etch stop layers 1033 and 1034 are separated from each other, and the third and fourth electrodes 1053 and 1054 are separated from each other. The fifth electrode 1055 is located on the second surface of the semiconductor layer and is electrically connected to the substrate 1011 via the fifth doped region 1016.

Fig. 6 shows a schematic diagram of a semiconductor photosensitive device according to a fifth embodiment of the present utility model, in which the semiconductor photosensitive device is a triode. As shown in fig. 6, the semiconductor photosensitive device includes a semiconductor layer, a field oxide layer 108, a first anti-reflection layer 1021, a second anti-reflection layer 1022, a third etch stop layer 1033, a fourth etch stop layer 1034, a fifth etch stop layer 1035, and an electrode structure. The third etch stop layer 1033, the fourth etch stop layer 1034, and the fifth etch stop layer 1035 together constitute an etch stop layer.

The electrode structure includes a third electrode 1053, a fourth electrode 1054, and a fifth electrode 1055; unlike the fourth embodiment, the present embodiment further includes a fifth doped region 1016 located within the epitaxial layer 1018 and exposed on the first surface of the epitaxial layer 1018, wherein the fifth doped region 1016 and the third doped region 1014 are separated from each other. The third electrode 1053, the fourth electrode 1054, and the fifth electrode 1055 are located on the same side of the semiconductor layer.

The etch stop layers include a third etch stop layer 1033, a fourth etch stop layer 1034, and a fifth etch stop layer 1035. The third etch stop layer 1033 is located on the first anti-reflection layer 1021, and in particular, the third etch stop layer 1033 is located above the third doped region 1014, covering at least a portion of the first anti-reflection layer 1021, such that the third electrode 1053 located above the third etch stop layer 1033 can penetrate the third etch stop layer 1033 and the anti-reflection layer to be in contact with the third doped region 1014 located below the third etch stop layer 1033. The fourth etch stop layer 1034 is located over the fourth doped region 1015, covering at least a portion of the first anti-reflective layer 1021, such that the fourth electrode 1054 located over the fourth etch stop layer 1034 is able to penetrate the fourth etch stop layer 1034 and the anti-reflective layer to be in contact with the fourth doped region 1015 located under the fourth etch stop layer 1034. The fifth etch stop layer 1035 is located over the field oxide layer 108, covering a portion of the surface of the first anti-reflective layer 1021, such that the fifth electrode 1055 located over the field oxide layer 108 is able to penetrate the anti-reflective layer and the field oxide layer 108, contacting the fifth doped region 1016.

The third electrode 1053 covers the surface of the third etch stop layer 1033 and penetrates the third etch stop layer 1033, the first anti-reflection layer 1021, and the second anti-reflection layer 1022 to be electrically connected to the third doped region 1014 in the semiconductor layer. The fourth electrode 1054 covers the surface of the fourth etch stop layer 1034 and penetrates the fourth etch stop layer 1034, the first anti-reflection layer 1021 and the second anti-reflection layer 1022 to be electrically connected with the fourth doped region 1015 in the semiconductor layer. The fifth electrode 1055 covers the surface of the fifth etch stop layer 1035 and penetrates the fifth etch stop layer 1035, the first anti-reflection layer 1021 and the field oxide layer 108 to be electrically connected with the fifth doped region 1016 in the semiconductor layer. The third, fourth and fifth etch stop layers 1033, 1034 and 1035 are separated from each other, and the third, fourth and fifth electrodes 1053, 1054 and 1055 are separated from each other.

In other embodiments, where the semiconductor photosensitive device is a diode, the semiconductor layer may also include an epitaxial layer.

Fig. 7a and 7b show a schematic structural view of a sixth embodiment of the present utility model, wherein fig. 7a shows a schematic structural view of the first electrode 1051 and the second electrode 1052 on two sides of the semiconductor layer, and fig. 7b shows a schematic structural view of the first electrode 1051 and the second electrode 1052 on the same side of the semiconductor layer. In this embodiment, the semiconductor photosensitive device is a diode. As shown in fig. 7a and 7b, the semiconductor photosensitive device includes a semiconductor layer, a field oxide layer 108, an anti-reflection layer, an etch stop layer, and an electrode structure. Unlike any one of the first to third embodiments, in this embodiment, the semiconductor layer includes a substrate 1011, an epitaxial layer 1018, and a first doped region 1012.

As shown in fig. 7a, the epitaxial layer 1018 is located on a first surface of the substrate 1011, and the first doped region 1012 extends from the surface of the epitaxial layer 1018 inward thereof, i.e., the first doped region 1012 is exposed to the surface of the epitaxial layer 1018.

The substrate 1011, the epitaxial layer 1018 has a first doping type, wherein the epitaxial layer 1018 is lightly doped with respect to the substrate 1011. The first doped region 1012 is of the second doping type. The first doped region 1012 and the epitaxial layer 1018 are in contact with each other to form a PN junction.

The first electrode 1051 is located on the etch stop layer and electrically connected with the first doped region 1012 through the etch stop layer and the anti-reflective layer. The second electrode 1052 is located on the second surface of the substrate 1011 and is electrically connected to the substrate 1011.

As shown in fig. 7b, the epitaxial layer 1018 is located on the first surface of the substrate 1011, and the first doped region 1012 extends from the surface of the epitaxial layer 1018 to the inside thereof, i.e., the first doped region 1012 is exposed to the surface of the epitaxial layer 1018. The second doped region 1013 also extends from the surface of the epitaxial layer 1018 into the interior thereof, i.e., the second doped region 1013 is also exposed to the surface of the epitaxial layer 1018. The first doped region 1012 and the second doped region 1013 are separated from each other. At this time, the first electrode 10151 and the second electrode 1052 are located on the same side of the semiconductor layer.

Embodiments in accordance with the present utility model, as described above, are not intended to be exhaustive or to limit the utility model to the precise embodiments disclosed. Obviously, many modifications and variations are possible in light of the above teaching. The embodiments were chosen and described in order to best explain the principles of the utility model and the practical application, to thereby enable others skilled in the art to best utilize the utility model and various modifications as are suited to the particular use contemplated. The utility model is limited only by the claims and the full scope and equivalents thereof.

Claims

1. A semiconductor photosensitive device, comprising:

a semiconductor layer;

a photosensitive region exposed to a first surface of the semiconductor layer;

a field oxide layer located on the first surface of the semiconductor layer and exposing at least part of the photosensitive region;

the anti-reflection layer is positioned on the first surface of the semiconductor layer and covers the photosensitive region, the surface of the field oxide layer and the side wall;

an etch stop layer on the anti-reflective layer exposing at least a portion of the anti-reflective layer above the photosensitive region;

and the electrode structure is at least positioned on the etching stop layer, penetrates through the etching stop layer and is in contact with the semiconductor layer.

2. The semiconductor light sensitive device of claim 1, wherein a dimension of the etch stop layer is smaller than a dimension of an electrode structure located on the etch stop layer; the sidewalls of the etch stop layer are recessed relative to the sidewalls of the electrode structure located thereon.

3. The semiconductor light-sensitive device of claim 1, wherein the etch stop layer is a silicon oxide layer, and wherein the etch stop layer has a thickness of 1000 angstroms to 10000 angstroms.

4. The semiconductor light-sensitive device according to claim 1, wherein the antireflection layer is a silicon nitride layer, or a composite layer of a silicon oxide layer and a silicon nitride layer on the silicon oxide layer, the silicon nitride layer having a thickness of 10 angstroms to 1 μm.

5. The semiconductor light sensitive device of claim 1, wherein the semiconductor light sensitive device is a diode;

the semiconductor layer includes at least:

a substrate having a first doping type;

a first doped region in the substrate and exposed to a first surface of the substrate, the first doped region having a second doping type, wherein the first doping type and the second doping type are of opposite polarity.

6. The semiconductor light sensitive device of claim 5, wherein the semiconductor layer further comprises:

and the epitaxial layer is positioned on the substrate, and the first doped region is positioned in the epitaxial layer and exposed on the first surface of the epitaxial layer.

7. The semiconductor light sensitive device according to claim 5 or 6, wherein the electrode structure comprises:

a first electrode electrically connected to the first doped region;

a second electrode electrically connected to the substrate;

at least one of the first electrode and the second electrode is located on the etch stop layer.

8. The semiconductor light sensitive device of claim 1, wherein the semiconductor light sensitive device is a triode;

the semiconductor layer includes:

a substrate having a first doping type;

an epitaxial layer having a first doping type;

a third doped region in the epitaxial layer and exposed to the first surface of the epitaxial layer having a second doping type, wherein the polarities of the first doping type and the second doping type are opposite; and

and a fourth doped region in the third doped region and exposed to the first surface of the epitaxial layer, having the first doping type.

9. The semiconductor light sensitive device of claim 8, wherein the electrode structure comprises:

a third electrode electrically connected to the third doped region;

a fourth electrode electrically connected to the fourth doped region; and

a fifth electrode electrically connected to the substrate;

at least two of the third electrode, the fourth electrode, and the fifth electrode are located on the etch stop layer.

10. The semiconductor light sensitive device according to claim 1, wherein the thickness of the electrode structure on the etch stop layer is 0.5-5 microns and/or the width of the electrode structure on the etch stop layer is 0.5-5 microns.

11. The semiconductor light sensitive device of claim 1, wherein when all of the electrodes in the electrode structure are located on the etch stop layer, one of the electrodes in the electrode structure is located above the field oxide layer and penetrates the etch stop layer, the anti-reflective layer and the field oxide layer are in contact with the semiconductor layer.

12. The semiconductor light sensitive device of claim 1, wherein the area of the light sensitive region exposed by the etch stop layer is between 50% and 95% of the total area of the light sensitive region.