CN219872241U - Mainboard, OCP network card and server - Google Patents

Abstract

The embodiment of the application relates to the technical field of computers and discloses a mainboard, an OCP network card and a server, wherein the mainboard comprises a first circuit board, a PCIe connector and a side connector; the PCIe connector and the side connector are fixed on the first circuit board and are positioned on the same straight line, the plugging direction of the PCIe connector and the plugging direction of the side connector are perpendicular to the first circuit board, the PCIe connector and the side connector are electrically connected with the first circuit board, and the PCIe connector and the side connector are respectively used for inserting PCIe pins and side pins of the same OCP network card; the bond connector includes a portion of the pins in the standard OCP connector that are of a different functional class than the pins of the X16PCIe connector. Through the mode, the main board provided by the embodiment of the application is simple in structure and low in cost.

Description

Mainboard, OCP network card and server

Technical Field

The embodiment of the application relates to the technical field of computers, in particular to a mainboard, an OCP network card and a server.

Background

The network card is computer hardware for providing network communication function for the computer. The server has high-speed CPU operation capability, long-time reliable operation, strong I/O external data throughput capability and better expansibility, and is widely applied to the scene of providing calculation or application services for other clients (such as a PC (personal computer), a smart phone, an industrial control terminal, even large-scale equipment such as a train system and the like) in a network. Therefore, the network card is more important for the server.

The main board of the server is provided with various connectors for users to insert different kinds of network cards, such as an OCP (Open Compute Project, open computing project) network card and a PCIe (Peripheral Component Interconnect Express, high-speed serial computer expansion bus standard) network card, according to different application requirements. Because the mainboard is provided with the independent OCP connector for the insertion of the OCP network card and the independent PCIe connector for the insertion of the PCIe network card, the structure of the mainboard is complex and the cost is high, so how to provide the mainboard with simple structure and low cost is the technical problem to be solved at present.

Disclosure of Invention

In view of the above problems, embodiments of the present utility model provide a motherboard, an OCP network card, and a server, so as to make the motherboard structure simple and reduce the cost of the motherboard.

According to an aspect of an embodiment of the present utility model, there is provided a motherboard including a first circuit board, a PCIe connector, and a side connector; the PCIe connector and the side connector are fixed on the first circuit board and are positioned on the same straight line, the plugging direction of the PCIe connector and the plugging direction of the side connector are perpendicular to the first circuit board, the PCIe connector and the side connector are electrically connected with the first circuit board, and the PCIe connector and the side connector are respectively used for inserting PCIe pins and side pins of the same OCP network card; the ideband connector comprises a first power signal pin, a first register configuration data signal pin, a first data scanning signal pin, a first data transmission signal pin, a first clock signal pin, a first address signal pin, a first ground signal pin, a first received data valid signal pin, a first OCP configuration pin, a first wake-up signal pin, a first NCSI hardware arbitration signal pin, a first transmission enable signal pin, a first OCP network card bit signal and a PCIe performance detection signal pin.

According to another aspect of the embodiment of the present application, there is further provided an OCP network card, including a second circuit board, a PCIe pin portion, and a side pin portion; the PCIe pin part comprises a PCIe body and PCIe pins fixed on the PCIe body, the side pin part comprises a side body and side pins fixed on the side body, the PCIe body and the side body are arranged on the same side of the second circuit board, and the PCIe body, the side body and the second circuit board are positioned on the same plane; the PCIe pin part and the side pin part are respectively used for being inserted into a PCIe connector and a side connector of the main board; the side PINs include a second power signal PIN, a second register configuration data signal PIN, a second data scan signal PIN, a second data transfer signal PIN, a second clock signal PIN, a second address signal PIN, a second ground signal PIN, a second carrier sense signal PIN, a second OCP configuration PIN signal PIN, a second wake-up signal PIN, a second NCSI hardware arbitration signal PIN, a second transfer enable signal PIN, a second OCP network card in-place signal, and a PCIe performance detection signal PIN.

According to the embodiment of the application, the PCIe connector and the side connector are fixed on the main board, the plugging direction A of the side connector and the plugging direction A of the PCIe connector are perpendicular to the first circuit board, the side connector integrates part of pins in pins with different functional types of pins of the PCIe connector in the standard OCP connector, the PCIe body and the side body are arranged on the same side of the second circuit board of the OCP network card, the PCIe pins on the PCIe body are defined as the pins of the PCIe connector on the main board, the definition of the side pins of the side body is the same as the pin definition of the side connector on the main board, and the PCIe pins and the side pins on the same side of the second circuit board of the OCP network card can be respectively inserted into the PCIe connector and the side connector of the main board, and the PCIe pins and the side pins of the side pin part are respectively connected with the PCIe pins of the side connector and the side connector of the OCP network card, so that communication between the PCIe pins and the function of the OCP network card and the main board is realized. Through the design, the PCIe connector not only can be inserted by a PCIe network card, but also can be inserted by an OCP network card, and is used together with the side connector when the PCIe connector is inserted by the OCP network card, so that the communication function between the main board and the OCP network card is realized, namely, the PCIe connector is compatible with the PCIe network card and the OCP network card. Therefore, compared with the mode that the main board needs to be provided with a separate OCP connector for inserting the OCP network card and a separate PCIe connector for inserting the PCIe network card, the main board provided by the embodiment of the application has the advantages of simple structure and low cost.

In addition, because the PCIe connector and the side connector for plugging the OCP network card are fixed on the first circuit board of the main board, the plugging direction A of the side connector and the plugging direction A of the PCIe connector are perpendicular to the first circuit board, compared with the mode that the side edges of the main board circuit board are required to be grooved to contain a plurality of side edges of the standard OCP network card in grooves of the circuit board, the plugging direction A of the standard OCP network card is overlapped with or parallel to the circuit board, the mode that the PCIe connector and the side connector for plugging the OCP network card are fixed on the first circuit board in the main board provided by the embodiment of the application is simple, and the OCP network card can reduce the area occupied by the OCP network card on the first circuit board and improve the area utilization rate of the first circuit board.

In an alternative embodiment, the PCIe connector is an X16 PCIe connector.

In an alternative embodiment, the first circuit board has a PCIe controller affixed to it, the PCIe controller being electrically connected to the X16 PCIe connector and the side connector; the bond connector also includes a first PCIe reset signal pin.

In an alternative embodiment, the height of the side connector protruding from the first circuit board is the same as the height of the PCIe connector protruding from the first circuit board, and the depth of the slot of the side connector is the same as the depth of the slot of the PCIe connector.

In an alternative embodiment, the length of the side connector is different from the length of the PCIe connector.

In an alternative embodiment, the PCIe pin is an X16 PCIe pin.

In an alternative embodiment, at least two non-X16 PCIe controllers are fixed on the second circuit board, at least one non-X16 PCIe controller is electrically connected to the PCIe pin, and at least one non-X16 PCIe controller is electrically connected to the side pin; the bond pin also includes a second PCIe reset signal pin.

In an alternative embodiment, the height of the side ontology is the same as the height of the PCIe ontology.

According to another aspect of the embodiment of the present application, there is further provided a server, where the server includes the motherboard in any of the above implementations and the OCP network card in any of the above implementations, and PCIe pins and side pins of the OCP network card are respectively inserted into PCIe connectors and side connectors of the motherboard.

The foregoing description is only an overview of the present application, and is intended to be implemented in accordance with the teachings of the present application in order that the same may be more clearly understood and to make the same and other objects, features and advantages of the present application more readily apparent.

Drawings

Various other advantages and benefits will become apparent to those of ordinary skill in the art upon reading the following detailed description of the preferred embodiments. The drawings are only for purposes of illustrating the preferred embodiments and are not to be construed as limiting the application. Also, like reference numerals are used to designate like parts throughout the figures. In the drawings:

fig. 1 shows a schematic structural diagram of a motherboard matching with an OCP network card according to an embodiment of the present application;

fig. 2 shows a schematic structural diagram of a motherboard according to an embodiment of the present application;

fig. 3 shows a schematic structural diagram of an OCP network card according to an embodiment of the present application;

fig. 4 is a schematic structural diagram showing electrical connection between a bond pin of a bond pin unit of an OCP network card and a pin of a bond connector of a motherboard according to an embodiment of the present application.

Reference numerals in the specific embodiments are as follows:

10. a main board;

11. a first circuit board; 12. a PCIe connector; 121. a slot; 13. a side connector; 132B1, a first power signal pin; 132B2, a first register configuration data signal pin; 132B3, a first data scan signal pin; 132B4, a first data transmission signal pin; 132B5, first clock signal pin; 132B6, first address signal pins; 132B7, first ground signal pin; 132B8, a first received data valid signal pin; 132B9, a first OCP configuration pin; 132B10, a first wake-up signal pin; 132B11, first NCSI hardware arbitration signal pin; 132B12, a first transmission enable signal pin; 132B13, a first OCP network card in-place signal and PCIe performance detection signal pin; 132B14, a first PCIe reset signal pin; 132B15, a first USB2.0 differential signal pin;

20. OCP network card;

21. a second circuit board; 22. PCIe pins; 221. a PCIe body; 222. PCIe pins; 23. a side lead part; 231. a side ontology; 232. a side pin; 232B1, a second power signal pin; 232B2, a second register configuration data signal pin; 232B3, a second data scan signal pin; 232B4, a second data transmission signal pin; 232B5, second clock signal pin; 232B6, second address signal pins; 232B7, second ground signal pin; 232B8, a second carrier sense signal pin; 232B9, a second OCP configuration PIN signal PIN; 232B10, a second wake-up signal pin; 232B11, second NCSI hardware arbitration signal pin; 232B12, a second transmission enable signal pin; 232B13, a second OCP network card in-place signal and PCIe performance detection signal pin; 232B14, a second PCIe reset signal pin; 232B15, a second USB2.0 differential signal pin;

A. the plugging direction; C. a straight line direction; h1, the side connector protrudes out of the height of the first circuit board; the heights of the H2 and PCIe connectors protruding out of the first circuit board are the same; h1, the heights of the side pins; h2, height of PCIe pins.

Detailed Description

Embodiments of the technical scheme of the present application will be described in detail below with reference to the accompanying drawings. The following examples are only for more clearly illustrating the technical aspects of the present application, and thus are merely examples, and are not intended to limit the scope of the present application.

Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs; the terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the application; the terms "comprising" and "having" and any variations thereof in the description of the application and the claims and the description of the drawings above are intended to cover a non-exclusive inclusion.

In the description of embodiments of the present application, the technical terms "first," "second," and the like are used merely to distinguish between different objects and are not to be construed as indicating or implying a relative importance or implicitly indicating the number of technical features indicated, a particular order or a primary or secondary relationship. In the description of the embodiments of the present application, the meaning of "plurality" is two or more unless explicitly defined otherwise.

Reference herein to "an embodiment" means that a particular feature, structure, or characteristic described in connection with the embodiment may be included in at least one embodiment of the application. The appearances of such phrases in various places in the specification are not necessarily all referring to the same embodiment, nor are separate or alternative embodiments mutually exclusive of other embodiments. Those of skill in the art will explicitly and implicitly appreciate that the embodiments described herein may be combined with other embodiments.

In the description of the embodiments of the present application, the term "and/or" is merely an association relationship describing an association object, and indicates that three relationships may exist, for example, a and/or B may indicate: there are three cases, a, B, a and B simultaneously. In addition, the character "/" herein generally indicates that the front and rear associated objects are an "or" relationship.

In the description of the embodiments of the present application, the term "plurality" means two or more (including two), and similarly, "plural sets" means two or more (including two), and "plural sheets" means two or more (including two).

In the description of the embodiments of the present application, the orientation or positional relationship indicated by the technical terms "center", "longitudinal", "transverse", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", "axial", "radial", "circumferential", etc. are based on the orientation or positional relationship shown in the drawings, and are merely for convenience of description and simplification of the description, and do not indicate or imply that the apparatus or element referred to must have a specific orientation, be configured and operated in a specific orientation, and therefore should not be construed as limiting the embodiments of the present application.

In the description of the embodiments of the present application, unless explicitly specified and limited otherwise, the terms "mounted," "connected," "secured" and the like should be construed broadly and may be, for example, fixedly connected, detachably connected, or integrally formed; or may be mechanically or electrically connected; can be directly connected or indirectly connected through an intermediate medium, and can be communicated with the inside of two elements or the interaction relationship of the two elements. The specific meaning of the above terms in the embodiments of the present application will be understood by those of ordinary skill in the art according to specific circumstances.

The network card is computer hardware for providing network communication function for the computer. The main board of the server is provided with various connectors for users to insert different types of network cards, such as an OCP network card and a PCIe network card, according to different application requirements. Because the main board is provided with a separate OCP connector for inserting the OCP network card and a separate PCIe connector for inserting the PCIe network card, the main board has a complex structure and high cost. The definition of the pins of the OCP connector is the same as that of the OCP network card, and the definition of the pins of the PCIe connector is the same as that of the PCIe network card.

Referring to the following tables 1 and 2, table 1 is the definition of the pins of the standard OCP connector or the definition of the pins of the standard OCP network card, and table 2 is the definition of the pins of the standard X16PCIe connector or the definition of the pins of the standard X16PCIe network card. The present inventors found by comparing the pin definition of the standard OCP connector with the pin definition of the standard X16PCIe connector that the functional class of the pin of the standard OCP connector includes the functional class of the pin of the standard X16PCIe connector, however, the definition of the same pin in the standard OCP connector as the functional class of the pin of the standard X16PCIe connector is different from the definition of the pin of the standard X16PCIe connector, B1 to B6 in the pin of the standard OCP network card as shown in table 1 represent 6 power signals, and B1 to B6 in the pin of the standard X16PCIe network card as shown in table 2 represent 3 power signals, the clock signal of the bus, and the data signal of the bus in order, resulting in that the X16PCIe network card cannot be inserted into the OCP connector.

TABLE 1

TABLE 2

In order to solve the above problems, the present inventors found that, by fixing a PCIe connector and a side (sideband signal) connector on a motherboard, the PCIe connector and the side connector are located in the same line, and the plugging direction of the side connector and the plugging direction of the PCIe connector are both perpendicular to the motherboard, the side connector is integrated with a part of pins in the standard OCP connector, which are different from the pins of the X16PCIe connector in function category, and further by setting a PCIe pin and a side pin on the OCP network card, the PCIe pin of the side pin is defined as same as the pins of the PCIe network card, and the side pin of the side pin is defined as the pins of the side connector, so that the PCIe pin and the side pin of the same side of the OCP network card can be inserted into the connector and the side connector, respectively, and the PCIe pin of the PCIe pin and the side pin of the side pin are electrically connected with the PCIe connector and the side connector, respectively, thereby realizing the communication function between the PCIe pin and the motherboard. Through the design, the PCIe connector not only can be inserted by a PCIe network card, but also can be inserted by an OCP network card, and is used together with the side connector when the PCIe connector is inserted by the OCP network card, so that the communication function between the main board and the OCP network card is realized, namely, the PCIe connector is compatible with the PCIe network card and the OCP network card. Therefore, compared with the mode that the main board needs to be provided with a separate OCP connector for inserting the OCP network card and a separate PCIe connector for inserting the PCIe network card, the main board provided by the embodiment of the application has the advantages of simple structure and low cost.

Referring to fig. 1 to 4, fig. 1 shows a schematic structural diagram of a motherboard matching with an OCP network card according to an embodiment of the present application, fig. 2 shows a schematic structural diagram of a motherboard according to an embodiment of the present application, fig. 3 shows a schematic structural diagram of an OCP network card according to an embodiment of the present application, and fig. 4 shows a schematic structural diagram of electrical connection between a side pin of a side pin unit of an OCP network card according to an embodiment of the present application and a pin of a side connector of the motherboard.

According to an aspect of the embodiment of the present application, the present application provides a motherboard 10, wherein the motherboard 10 includes a first circuit board 11, a PCIe connector 12, and a side connector 13. The PCIe connector 12 and the side connector 13 are fixed on the first circuit board 11 and located on the same straight line, the plugging direction a of the PCIe connector 12 and the plugging direction a of the side connector 13 are perpendicular to the first circuit board 11, the PCIe connector 12 and the side connector 13 are electrically connected to the first circuit board 11, and the PCIe connector 12 and the side connector 13 are respectively used for inserting the PCIe pin portion 22 and the side pin portion 23 of the same OCP network card 20. The ideband connector 13 includes a first power signal pin 132B1, a first register configuration data signal pin 132B2, a first data scan signal pin 132B3, a first data transfer signal pin 132B4, a first clock signal pin 132B5, a first address signal pin 132B6, a first ground signal pin 132B7, a first receive data valid signal pin 132B8, a first OCP configuration pin 132B9, a first wake-up signal pin 132B10, a first NCSI (Network Controller Sideband Interface) hardware arbitration signal pin 232B11, a first transfer enable signal pin 132B12, a first OCP network card bit signal, and a PCIe performance detection signal pin 132B13.

According to another aspect of the embodiment of the present application, the present application further provides the aforementioned OCP network card 20, where the OCP network card 20 includes a second circuit board 21, a PCIe pin portion 22 and a side pin portion 23; the PCIe lead part 22 includes a PCIe body 221 and a PCIe pin 222, the side pin part 23 includes a side body 231 and a side pin 232, the PCIe body 221 and the side body 231 are all disposed on the same side of the second circuit board 21, the PCIe body 221, the side body 231 and the second circuit board 21 are located on the same plane, the PCIe pin 222 is fixed on the PCIe body 221, and the side pin 232 is fixed on the side body 231. The PCIe pin portion 22 and the side pin portion 23 are used to plug into the PCIe connector 12 and the side connector 13 of the motherboard 10, respectively. The side PINs 232 include a second power signal PIN 232B1, a second register configuration data signal PIN 232B2, a second data scan signal PIN 232B3, a second data transfer signal PIN 232B4, a second clock signal PIN 232B5, a second address signal PIN 232B6, a second ground signal PIN 232B7, a second carrier sense signal PIN 232B8, a second OCP configuration PIN signal PIN 232B9, a second wake-up signal PIN 232B10, a second NCSI hardware arbitration signal PIN 232B11, a second transfer enable signal PIN 232B12, a second OCP network card bit signal, and a PCIe performance detection signal PIN 232B13.

The motherboard 10 is mainly used in a computer such as a server, and the OCP network card 20 is used for providing a communication function for the computer, and the OCP network card 20 is electrically connected with the motherboard 10, so that the computer can communicate on a computer network.

Specifically, a PCIe controller is fixed on the first circuit board 11 on the motherboard 10, and the PCIe controller is electrically connected to pins of the PCIe connector 12 on the first circuit board 11, and is configured to send signals to the pins of the PCIe connector 12 or receive signals sent by the pins of the PCIe connector 12. The second circuit board 21 on the OCP network card 20 is fixed with another PCIe controller, and the PCIe controller is electrically connected to the PCIe pin 222 on the second circuit board 21, and is configured to send a signal to the PCIe pin 222 or receive a signal sent by the PCIe pin 222.

The PCIe connector 12 and the side connector 13 may be fixed to the first circuit board 11 by soldering, so that the PCIe connector 12 and the side connector 13 are electrically connected to the first circuit board 11, and signal transmission is achieved. The PCIe body 221 and the side body 231 are disposed on the same side of the second circuit board 21, and may be an integral structure of the PCIe body 221, the side body 231, and the second circuit board 21. The PCIe pin 222 on the PCIe body 221 and the bond pin 232 on the bond body 231 are electrically connected to the second circuit board 21, so as to implement signal transmission. The PCIe connector 12 and the side connector 13 on the motherboard 10 are female connectors, and accordingly, the PCIe pin portion 22 and the side pin portion 23 may be gold fingers, and the PCIe pin portion 22 and the side pin portion 23 may also be male connectors capable of implementing plugging with female connectors on the motherboard 10.

As shown in fig. 2, the PCIe connector 12 and the side connector 13 are fixed to the first circuit board 11, the PCIe connector 12 and the side connector 13 are located on the same line along the line direction C, and accordingly, as shown in fig. 3, the same side of the second circuit board 21 of the OCP network card 20 is provided with the PCIe body 221 and the side body 231, pcIe pin 222 is secured to PCIe body 221，The bond pin 232 is fixed to the bond body 231. As shown in fig. 2, slots 121 are formed in the PCIe connector 12 and the side connector 13, and pins of the PCIe connector 12 and pins of the side connector 13 are located on a side wall of the slot 121 of the PCIe connector 12 and a side wall of the slot 121 of the side connector 13, respectively. The second circuit board 21 of the OCP network card 20 moves along the plugging direction a as shown in fig. 2 or 3, so that the PCIe body 2 of the same side of the second circuit board 2121And the side body 231 are inserted into the slot 121 of the PCIe connector 12 and the slot 121 of the side connector 13 on the motherboard 10, respectively, and the PCIe body 2 of the second circuit board 2121 on a planeThe PCIe pins 222 are electrically connected to pins of the PCIe connector 12 of the first circuit board 11, and the bond pins 232 on the bond body 231 of the second circuit board 21 are electrically connected to pins of the bond connector 13 of the first circuit board 11, so as to implement a communication function between the OCP network card 20 and the motherboard 10.

The definition of the pins of the PCIe connector 12 on the motherboard 10 is the same as the definition of the pins of the standard PCIe connector 12, and correspondingly, the definition of the PCIe pins 222 on the OCP network card 20 is the same as the definition of the pins of the standard PCIe network card, so that the PCIe pins 222 on the OCP network card 20 can be electrically connected with the pins of the PCIe connector 12 in a one-to-one correspondence. The PCIe connector 12 may also be a PCIe connector 12 that redefines pins of a standard PCIe connector 12, and accordingly, PCIe pins 222 on the OCP network card 20 are defined identically to the redefined PCIe pins 22. Therefore, the PCIe connector 12 on the motherboard 10 for inserting the OCP network card 20 may also be inserted by the PCIe network card, that is, the PCIe connector 12 is compatible with the PCIe network card and the OCP network card 20.

Referring to Table 3 below, table 3 is a definition of the pins of a standard OCP connector that are integrated on the side connector 13 for pins that are different in functional class from the pins of the PCIe connector 12.

TABLE 3 Table 3

As shown in B1, B2, and a17 of table 3, the first power signal pin includes a first OCP network card power-on signal pin, a first main power enable signal pin, and a first auxiliary power enable signal pin. As shown in B4 and B5 of table 3, the first data scan signal pin includes a first data scan signal pin input to the first circuit board 11 and a first data scan signal pin output to the OCP network card 20. As shown in B8, B9, A8 and A9 of table 3, the first data transmission signal pins include a first reception data signal pin for receiving the data signal transmitted from the OCP network card 20 to the first circuit board 11 and a first transmission data signal pin for transmitting the data signal transmitted from the first circuit board 11 to the OCP network card 20. As shown in table 3 as a11, a12, a14, B6, B11, B12, and B14, the first clock signal pin includes a first scan clock signal pin and a first reference clock signal pin. As shown in tables 3, A4 and A5, the first NCSI hardware arbitration signal pin includes a first NCSI hardware arbitration input signal pin and a first NCSI hardware arbitration output signal pin.

The first register configuration data signal pin refers to B3 in table 3, the first address signal pin refers to A6 and B7 in table 3, the first ground signal pin refers to a10, a13, B10, B and 13 in table 3, the first receive data valid signal pin refers to B14 in table 3, the first OCP configuration pin refers to B15-B17 in table 3, the first wake-up signal pin refers to A3 in table 3, the first transmit enable signal pin refers to A7 in table 3, the first OCP network card bit signal and PCIe performance detection signal pin refer to a15 in table 3.

The order of pins of the side connector 13 may be arranged as shown in table 3, or may be arranged in other ways, but the first refclk pin and the first refclk pin of the first reference clock signal pin cannot be separated, and when the refclk pin indicated by B11 in table 3 is arranged at B2, the refclk pin indicated by B12 in table 3 is arranged at B1 or B3. The ideband connector 13 may reserve pins to set them to pins of other functional categories when needed.

The definition of the bond PINs 232 of the OCP network card 20 is the same as the definition of the PINs of the bond connector 13 of the motherboard 10, so that when the PCIe body 221 and the bond body 231 on the same side of the OCP network card 20 are inserted into the slot 121 of the PCIe connector 12 and the slot 121 of the bond connector 13 on the motherboard 10, respectively, the bond PINs 232 on the bond body 231 of the OCP network card 20 are electrically connected with the PINs of the bond connector 13 of the motherboard 10, as shown in fig. 4, the second power signal PIN 232B1, the second register configuration data signal PIN 232B2, the second data scan signal PIN 232B3, the second data transfer signal PIN 232B4, the second clock signal PIN 232B5, the second address signal PIN 232B6, the second ground signal PIN 232B7, the second carrier sense signal PIN 232B8, the second OCP configuration PIN 232B9, the second wake-up signal PIN 232B10, the second NCSI hardware arbitration signal PIN 232B11, the second transmit enable signal PIN 232B12, the second OCP network card in-place signal and PCIe performance detection signal PIN 232B13 are respectively connected with the first power signal PIN 132B1, the first register configuration data signal PIN 132B2, the first data scan signal PIN 132B3, the first data transfer signal PIN 132B4, the first clock signal PIN 132B5, the first address signal PIN 132B6, the first ground signal PIN 132B7, the first receive data valid signal PIN 132B8, the first OCP configuration PIN 132B9, the first wake-up signal PIN 132B10, the first rcp configuration PIN 132B10, the first receive data valid signal PIN 132B10, and the first rcp configuration signal PIN 132B 9.

In the embodiment of the application, the PCIe connector 12 and the side connector 13 are fixed on the motherboard 10, the PCIe connector 12 and the side connector 13 are located in the same straight line, the plugging direction a of the side connector 13 and the plugging direction a of the PCIe connector 12 are both perpendicular to the first circuit board 11, the side connector 13 integrates part of pins in pins with different function types of pins of the PCIe connector 12 in a standard OCP connector, the PCIe body 221 and the side body 231 are further arranged on the same side of the second circuit board 21 of the OCP network card 20, the PCIe pin 222 on the PCIe body 221 is defined in the same manner as the pin of the PCIe connector 12 on the motherboard 10, and the PCIe pin 232 of the side body 231 is defined in the same manner as the pin of the side connector 13 on the motherboard 10, so that the PCIe pin 22 and the side pin 23 on the same side of the second circuit board 21 of the OCP 20 can be respectively inserted into the PCIe connector 12 and the side connector 13 of the first circuit board 11 of the OCP network card 20, and the side pin 23 of the side connector are respectively connected with the PCIe pin of the side connector 10, and the side pin 20 is connected with the PCIe pin of the side connector and the side connector of the side card 20. Through the design, the PCIe connector 12 not only can be inserted by a PCIe network card, but also can be inserted by an OCP network card 20, and is used together with the side connector 13 when the OCP network card 20 is inserted into the PCIe connector 12, so that a communication function between the motherboard 10 and the OCP network card 20 is realized, that is, the PCIe connector 12 is compatible with the PCIe network card and the OCP network card 20. Therefore, compared to a mode that a separate OCP connector is required to be provided for the motherboard to insert an OCP network card and a separate PCIe connector is required to insert a PCIe network card, the motherboard 10 provided by the embodiment of the present application has a simple structure and low cost.

In addition, because the PCIe connector 12 and the side connector 13 for plugging the OCP network card 20 are fixed on the first circuit board 11 of the motherboard 10, the plugging direction a of the side connector 13 and the plugging direction a of the PCIe connector 12 are perpendicular to the first circuit board 11, compared with a mode that the side edges of the motherboard circuit board need to be grooved to accommodate multiple side edges of the standard OCP network card in grooves of the circuit board, the plugging direction a of the standard OCP network card coincides with or is parallel to the circuit board, the PCIe connector 12 and the side connector 13 for plugging the OCP network card 20 in the motherboard 10 provided by the embodiment of the application are simple in fixing the PCIe connector 12 and the side connector 13 on the first circuit board 11, and the OCP network card 20 can reduce the area occupied by the OCP network card 20 on the first circuit board 11, thereby improving the area utilization rate of the first circuit board 11.

In an alternative embodiment, PCIe connector 12 is an X16 PCIe connector.

When the PCIe connector 12 is an X16 PCIe connector, the PCIe pins 22 of the OCP network card 20 may be not only X16 PCIe pins but also X1, X4, or X8 PCIe pins, accordingly. That is, the X16 PCIe connector on the motherboard 10 that is in the same line as the side connector 13 may be inserted not only into the X16 PCIe pin portion of the OCP network card 20, but also into the X1, X4 or X8 PCIe pin portion of the OCP network card 20, that is, the OCP network card 20 on the motherboard 10 that is in the same line as the side connector 13 is compatible with the X1, X4, X8 or X16 PCIe pin portion. Because X16 PCIe has a higher bandwidth, PCIe connector 12 is an X16 PCIe connector, and PCIe pins 22 of OCP network card 20 are X16 PCIe pins that increase the transmission rate between motherboard 10 and OCP network card 20.

Referring to Table 2, the pins of the structural key include A1-A11 and B1-B11, and the pins of the structural key in Table 2 are PCIe signal pins of PCIe connector 12 below the pins of the structural key. Pins of the X1 PCIe connector include A1-A18 and B1-B18, pins of the X4 PCIe connector include A1-A32 and B1-B32, pins of the X8PCIe connector include A1-A49 and B1-B49, and pins of the X16PCIe connector include A1-A82 and B1-B82. As can be seen, each of the X1, X4, X8 and X16PCIe connectors includes pins for structural keys A1-A11 and B1-B11, and one of the pins for structural keys A1-A11 and B1-B11 includes a PCIe reset signal pin. The functional class of the pins of A12-A82 and B12-B82 in the X16PCIe connector is the same as the functional class of the pins of A12-A49 and B12-B49 in the X8PCIe connector except for the pins of the structural key, and the number of the pins of A12-A82 and B12-B82 in the X16PCIe connector is twice the number of the pins of A12-A49 and B12-B49 in the X8PCIe connector, i.e. the pins of the X16PCIe connector can be divided into two groups of pins of X8PCIe signals. The functional class of the pins A12-A82 and B12-B82 in the X16PCIe connector is the same as the functional class of the pins A12-A32 and B12-B32 in the X4 PCIe connector except for the pins of the structural key, and the bandwidth of the pins A12-A82 and B12-B82 in the X16PCIe connector is four times the bandwidth of the pins A12-A32 and B12-B32 in the X4 PCIe connector, i.e., the pins of the X16PCIe connector may be divided into four groups of pins of X4 PCIe signals.

When the PCIe connector 12 is an X16PCIe connector and the PCIe pin portion 22 of the OCP network card 20 is an X16PCIe pin portion, and the PCIe controller of the OCP network card 20 adopts an X16PCIe controller, since the pin of the X16PCIe connector and the PCIe pin of the X16PCIe pin portion each include a PCIe reset signal pin, the side pin 232 of the side pin portion 23 does not include a PCIe reset signal pin, the pin of the side connector 13 does not include a PCIe reset signal pin, and the PCIe controller of the motherboard 10 can also recognize the actual bandwidth of the PCIe pin of the X16PCIe pin portion of the OCP network card 20.

When the PCIe connector 12 is an X16PCIe connector and the PCIe pin portion 22 of the OCP network card 20 is an X16PCIe pin portion, and the PCIe controller of the OCP network card 20 adopts two X8PCIe controllers, the two X8PCIe controllers are electrically connected to some pins of the PCIe pins of the X16PCIe pin portion of the OCP network card 20, for example, one X8PCIe controller is electrically connected to pins A1-a11, B1-B11, a12-a49, and B12-B49 in table 2, the other PCIe controller is electrically connected to pins a50-a82 and B50-B82 in table 2, that is, one X8PCIe controller is electrically connected to pins of the structural key positions in the X16PCIe pin portion of the OCP network card 20 and pins of a set of X8PCIe signals in the PCIe pin portion of the X16PCIe pin portion of the OCP network card 20, the other X8PCIe controller is electrically connected to pins of another set of X8PCIe signals in the PCIe pins of the X16PCIe pins of the OCP network card 20, and since the a11 pin, i.e., one PCIe reset signal pin, is electrically connected to one X8PCIe controller, the other X8PCIe controller is not electrically connected to a PCIe reset signal, the PCIe controller of the motherboard 10 can only recognize one set of X8PCIe signals in the PCIe pins of the X16PCIe pins of the OCP network card 20 through the X16PCIe connector electrically connected to the PCIe pins of the X16PCIe pins of the OCP network card 20, but cannot recognize another set of X8PCIe signals in the PCIe pins of the X16PCIe pins.

Based on this, in an alternative embodiment, the first circuit board 11 has a PCIe controller affixed thereto, the PCIe controller being electrically connected to the side connector 13; the bond connector 13 also includes a first PCIe reset signal pin 132B14. Correspondingly, at least two non-X16 PCIe controllers are fixed on the second circuit board 21, at least one non-X16 PCIe controller is electrically connected to PCIe pins of the X16PCIe pin portion 22, and at least one non-X16 PCIe controller is electrically connected to the side pin 232; the side pin 232 also includes a second PCIe reset signal pin 232B14. Wherein, a non-X16 PCIe controller means that the PCIe controller is not an X16PCIe controller, e.g., the non-X16 PCIe controller may be an X8PCIe controller or an X4 PCIe controller.

Specifically, the PCIe connector 12 may be an X16PCIe connector, the PCIe pin 22 of the OCP network card 20 may be an X16PCIe pin, the pin of the PCIe connector 12 and the PCIe pin of the X16PCIe pin each include a PCIe reset signal pin, the pin of the side connector 13 and the side pin 232 of the side pin 23 include a first PCIe reset signal pin 132B14 and a second PCIe reset signal pin 232B14, respectively, the non-X16 PCIe controller may be two X8PCIe controllers, one X8PCIe controller is electrically connected to a pin of a set of X8PCIe signals in the PCIe pins of the X16PCIe pin, the other X8PCIe controller is electrically connected to a pin of another set of X8PCIe signals in the PCIe pins of the X16PCIe pin, the non-X16 PCIe controller is electrically connected to the PCIe pins of the X16PCIe connector and the side connector 13, and the non-X16 PCIe controller is electrically connected to the PCIe pins and the side pins 232. When the PCIe pin portion 22 and the side pin portion 23 on the same side of the second circuit board 21 are inserted into the PCIe connector 12 and the side connector 13 on the motherboard 10, which are located on the same line, respectively, one reset signal pin of the X16PCIe pin is electrically connected to one PCIe reset signal pin of the PCIe connector 12, and one second reset signal pin of the side pin 232 of the side pin portion 23 is electrically connected to one first PCIe reset signal pin 132B14 of the pins of the side connector 13, so that the PCIe controller of the motherboard 10 can recognize the actual bandwidth of the PCIe pin of the X16PCIe pin portion of the OCP network card 20.

It is understood that the non-X16 PCIe controller may also be an X4PCIe controller. The four X4PCIe controllers are fixed to the second circuit board 21, where the side pins 232 of the side connector 13 and the side pins 232 of the side pin 23 include three first PCIe reset signal pins 132B14 and three second PCIe reset signal pins 232B14, respectively, and when the PCIe pins 22 and the side pins 23 on the same side of the second circuit board 21 are inserted into the PCIe connector 12 and the side connector 13 on the motherboard 10, which are located on the same straight line, respectively, one of the PCIe pins of the X16 PCIe pins of the OCP network card 20 is electrically connected with one of the PCIe pins of the PCIe connector 12, and the three second reset signal pins 232 of the side pin 23 are electrically connected with the three first reset signal pins 132B14 of the PCIe pins of the side connector 13, so that the PCIe controller of the motherboard 10 can also identify the actual bandwidth of the PCIe pins of the X16 PCIe pins of the OCP network card 20.

When the PCIe controller of the OCP network card 20 is a non-X16 PCIe controller, that is, an X4 or X8 controller is used instead of the X16 PCIe controller, the PCIe controller of the motherboard 10 can identify the actual bandwidth of the PCIe pins of the X16 PCIe pins of the OCP network card 20.

Optionally, as shown in fig. 4, the side connector 13 further includes a first USB2.0 differential signal pin 132B15. Correspondingly, the side pin 232 of the second circuit board 21 further includes a second USB2.0 differential signal pin 232B15. The first USB2.0 differential signal is shown in Table 3 as A18 and A19. The second USB2.0 differential signal pins are electrically connected to the first PCIe reset signal pin 132B14 and the first USB2.0 differential signal pin in a one-to-one correspondence, respectively.

Referring to fig. 2, in an alternative embodiment, the height H1 of the side connector 13 protruding from the first circuit board 11 is the same as the height H2 of the PCIe connector 12 protruding from the first circuit board 11, and the depth of the slot 121 of the side connector 13 is the same as the depth of the slot 121 of the PCIe connector 12. Accordingly, the height h1 of the side body 231 of the second circuit board 21 is the same as the height h2 of the PCIe body 221, the height h1 of the side body 231 is equal to the depth of the slot 121 of the side connector 13, and the height h2 of the PCIe body 221 is equal to the depth of the slot 121 of the PCIe connector 12.

The height H1 of the side connector 13 protruding from the first circuit board 11 refers to the dimension of the side connector 13 protruding from the first circuit board 11 along the plugging direction a. The height H2 of the PCIe connector 12 protruding from the first circuit board 11 refers to a dimension of the PCIe connector 12 protruding from the first circuit board 11 along the plugging direction a. The depth of the slot 121 of the connector refers to the dimension of the slot 121 along the plugging direction a.

The depth of the slots 121 of the two connectors on the motherboard 10 is the same, the heights of the bodies of the two pins on the OCP network card 20 are the same, when the heights of the bodies of the two pins of the OCP network card 20 are the same as the depth of the slots 121 of the two connectors on the motherboard 10, and the bodies of the two pins of the OCP network card 20 are respectively inserted into the slots 121 of the connectors on the motherboard 10 connected with the two pins, the bottoms of the bodies of the two pins of the OCP network card 20 can be abutted against the bottom wall of the slots 121 of the connectors connected with the two pins, both sides of the bodies of the two pins of the OCP network card 20 can be clamped on the side wall of the slots 121 of the connectors connected with the two pins, and no redundant active space exists in the slots 121, so that the bodies of the two pins of the OCP network card 20 can be stably fixed in the connectors connected with the two pins of the OCP network card, and the plug experience of the OCP 20 is good.

If the length of the side connector 3 of the first circuit board located on the same line is the same as that of the PCIe connector, and if the length of the side pin of the second circuit board located on the same side is also the same as that of the PCIe pin, there is a risk that the side pin is inserted into the PCIe connector by mistake and the PCIe pin is inserted into the side connector, resulting in circuit damage or short circuit.

Based on this, in an alternative embodiment, the length of the side connector 13 is different from the length of the PCIe connector 12. Accordingly, the length of the side pin portion 23 of the second circuit board 21 is different from the length of the PCIe pin portion 22, the length of the side pin portion 23 corresponds to the length of the side connector 13, and the length of the PCIe pin portion 22 corresponds to the length of the PCIe connector 12.

The length refers to the length along the direction in which the above-described "same straight line" is located, that is, the length along the straight line direction B as shown in fig. 2.

If the length of the side connector 13 is shorter, the length of the side lead portion 23 of the second circuit board 21 is also shorter, so that the PCIe lead portion 22 of the second circuit board 21 with a longer length can be prevented from being inserted into the side connector 13 with a shorter length, thereby preventing erroneous insertion, so as not to cause the risk of circuit damage or short circuit. Similarly, if the length of the side connector 13 is longer, the length of the side lead portion 23 of the second circuit board 21 is also longer, so that the side lead portion 23 of the second circuit board 21 having a longer length can be prevented from being inserted into the PCIe connector 12 having a shorter length, thereby preventing erroneous insertion. If the length of the side connector 13 is short, the length of the PCIe pin portion 22 of the second circuit board 21 cannot be set short. Similarly, if the length of the side connector 13 is long, the length of the PCIe lead portion 22 of the second circuit board 21 cannot be set long.

According to another aspect of the embodiments of the present application, the present application further provides a server, where the server includes the motherboard 10 in any of the above embodiments and the OCP network card 20 in any of the above embodiments, and the side pin portion 23 and the PCIe pin portion 22 of the OCP network card 20 are inserted into the side connector 13 and the PCIe connector 12 of the motherboard 10, respectively.

Finally, it should be noted that: the above embodiments are only for illustrating the technical solution of the present application, and not for limiting the same; although the application has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical scheme described in the foregoing embodiments can be modified or some or all of the technical features thereof can be replaced by equivalents; such modifications and substitutions do not depart from the spirit of the application, and are intended to be included within the scope of the appended claims and description. In particular, the technical features mentioned in the respective embodiments may be combined in any manner as long as there is no structural conflict. The present application is not limited to the specific embodiments disclosed herein, but encompasses all technical solutions falling within the scope of the claims.

Claims (10)

1. A motherboard, said motherboard comprising: the device comprises a first circuit board, a PCIe connector and a side connector;

the PCIe connector and the side connector are fixed on the first circuit board and are positioned on the same straight line, the plugging direction of the PCIe connector and the plugging direction of the side connector are perpendicular to the first circuit board, the PCIe connector and the side connector are electrically connected with the first circuit board, and the PCIe connector and the side connector are respectively used for inserting PCIe pins and side pins of the same OCP network card;

the side connector comprises a first power signal pin, a first register configuration data signal pin, a first data scanning signal pin, a first data transmission signal pin, a first clock signal pin, a first address signal pin, a first ground signal pin, a first received data valid signal pin, a first OCP configuration pin, a first wake-up signal pin, a first NCSI hardware arbitration signal pin, a first transmission enabling signal pin, a first OCP network card bit signal and a PCIe performance detection signal pin.

2. The motherboard of claim 1, wherein the PCIe connector is an X16 PCIe connector.

3. The motherboard of claim 2, wherein the first circuit board has a PCIe controller affixed thereto, the PCIe controller electrically connected to the X16 PCIe connector and the side connector;

the bond connector also includes a first PCIe reset signal pin.

4. The motherboard of claim 1, wherein the height of the side connector protruding from the first circuit board is the same as the height of the PCIe connector protruding from the first circuit board, and wherein the depth of the slot of the side connector is the same as the depth of the slot of the PCIe connector.

5. The motherboard of claim 1, wherein the length of the side connector is different from the length of the PCIe connector.

6. An OCP network card, comprising: the second circuit board, the PCIe pin part and the side pin part; the PCIe pin part comprises a PCIe body and PCIe pins fixed on the PCIe body, the side pin part comprises a side body and side pins fixed on the side body, the PCIe body and the side body are arranged on the same side of the second circuit board, and the PCIe body, the side body and the second circuit board are positioned on the same plane;

The PCIe pin part and the side pin part are respectively used for being inserted into a PCIe connector and a side connector of the main board;

the side PINs comprise a second power signal PIN, a second register configuration data signal PIN, a second data scanning signal PIN, a second data transmission signal PIN, a second clock signal PIN, a second address signal PIN, a second ground signal PIN, a second carrier sense signal PIN, a second OCP configuration PIN signal PIN, a second wake-up signal PIN, a second NCSI hardware arbitration signal PIN, a second transmission enable signal PIN, a second OCP network card bit signal and a PCIe performance detection signal PIN.

7. The OCP network card of claim 6 wherein the PCIe pins are X16 PCIe pins.

8. The OCP network card of claim 7 wherein at least two non-X16 PCIe controllers are affixed to the second circuit board, at least one of the non-X16 PCIe controllers is electrically connected to the PCIe pin, and at least one of the non-X16 PCIe controllers is electrically connected to the side pin;

the side pin further includes a second PCIe reset signal pin.

9. The OCP network card of claim 6, wherein the height of the side ontology is the same as the height of the PCIe ontology.

10. A server, the server comprising: the motherboard of any of claims 1-5 and the OCP network card of any of claims 6-9, the PCIe pin portion and the side pin portion of the OCP network card being inserted into the PCIe connector and the side connector of the motherboard, respectively.