CN219842511U - Semiconductor detection circuit - Google Patents
Semiconductor detection circuit Download PDFInfo
- Publication number
- CN219842511U CN219842511U CN202321238394.5U CN202321238394U CN219842511U CN 219842511 U CN219842511 U CN 219842511U CN 202321238394 U CN202321238394 U CN 202321238394U CN 219842511 U CN219842511 U CN 219842511U
- Authority
- CN
- China
- Prior art keywords
- semiconductor
- tested
- transistor
- switch
- electrode
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 195
- 238000001514 detection method Methods 0.000 title claims abstract description 27
- 238000012360 testing method Methods 0.000 claims abstract description 78
- 230000017525 heat dissipation Effects 0.000 claims abstract description 22
- 230000011664 signaling Effects 0.000 claims abstract description 6
- 238000004146 energy storage Methods 0.000 claims description 15
- 239000003990 capacitor Substances 0.000 claims description 11
- 238000007689 inspection Methods 0.000 claims description 4
- 238000010438 heat treatment Methods 0.000 abstract description 27
- 230000000694 effects Effects 0.000 abstract description 10
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 description 13
- 238000002791 soaking Methods 0.000 description 13
- 229910002601 GaN Inorganic materials 0.000 description 12
- 238000010586 diagram Methods 0.000 description 6
- 238000000034 method Methods 0.000 description 5
- 238000007654 immersion Methods 0.000 description 3
- 239000000463 material Substances 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 238000005265 energy consumption Methods 0.000 description 1
- 230000002349 favourable effect Effects 0.000 description 1
- 238000005259 measurement Methods 0.000 description 1
- 230000005855 radiation Effects 0.000 description 1
- 230000000630 rising effect Effects 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
Landscapes
- Testing Of Individual Semiconductor Devices (AREA)
Abstract
The utility model discloses a semiconductor detection circuit, which comprises: the semiconductor test device comprises a semiconductor to be tested, a test end, a semiconductor control module and a heat dissipation module; the semiconductor to be tested is connected to a first pulse signal, and the semiconductor to be tested outputs electric energy according to the first pulse signal; the output end of the semiconductor control module is connected with the semiconductor to be tested, and the semiconductor control module is used for outputting an electric signal and controlling the semiconductor to be tested to be in a test state; the test end is connected with the semiconductor to be tested and is used for detecting the electrical parameters of the semiconductor to be tested; the heat dissipation module is connected with the semiconductor to be tested and is used for dissipating heat generated by the semiconductor to be tested. The utility model can reduce the self-heating effect of the semiconductor.
Description
Technical Field
The utility model relates to the technical field of semiconductor detection, in particular to a semiconductor detection circuit.
Background
Gallium nitride (GaN) is a novel wide band gap semiconductor having superior characteristics such as lower capacitance loss, faster switching speed and better parallelism than conventional silicon semiconductors. Gallium nitride switches have good performance in both soft and hard switching modes.
Currently, studies on gallium nitride devices are mainly focused on hard switching, soft switching, self-heating (self-heating), off-state voltage and dynamic resistance (dynamic resistance), etc. Among other things, self-heating effects and dynamic resistance have a significant impact on the operation of gallium nitride devices. However, when gallium nitride devices are turned on with a large voltage source or operated for a long period of time, the self-heating effect causes considerable power loss and significantly reduces measurement accuracy and even damages the device.
Disclosure of Invention
The utility model provides a semiconductor detection circuit, which solves the problem that a gallium nitride semiconductor in the prior art generates stronger self-heating effect after working for a long time.
According to an aspect of the present utility model, there is provided a semiconductor detection circuit including: the semiconductor test device comprises a semiconductor to be tested, a test end, a semiconductor control module and a heat dissipation module;
the semiconductor to be tested is connected to a first pulse signal, and the semiconductor to be tested outputs electric energy according to the first pulse signal;
the output end of the semiconductor control module is connected with the semiconductor to be tested, and the semiconductor control module is used for outputting an electric signal and controlling the semiconductor to be tested to be in a test state;
the test end is connected with the semiconductor to be tested and is used for detecting the electrical parameters of the semiconductor to be tested;
the heat dissipation module is connected with the semiconductor to be tested and is used for dissipating heat generated by the semiconductor to be tested.
Optionally, the semiconductor to be tested includes a first transistor, a control electrode of the first transistor is connected to the first pulse signal, and a first electrode of the first transistor and a second electrode of the first transistor are both connected to the test terminal.
Optionally, the heat dissipation module includes a second transistor, the second transistor is connected in parallel with the first transistor, a control electrode of the second transistor is connected to a second pulse signal, a first electrode of the second transistor is connected to a first electrode of the first transistor, and a second electrode of the second transistor is connected to a second electrode of the first transistor.
Optionally, the test terminal includes a voltage test terminal and a current test terminal, the voltage test terminal is connected to the first pole of the first transistor, and the current test terminal is connected to the second pole of the first transistor.
Optionally, the semiconductor control module includes power supply unit and switch unit, power supply unit with the switch unit is connected, power supply unit is used for providing the power, the switch unit with the output of semiconductor control module is connected, the switch unit is used for controlling switch-on or switch-off of semiconductor that awaits measuring.
Optionally, the power supply unit includes first power and first electric capacity, the positive pole of first power is connected the first end of first electric capacity, the negative pole of first power with the second end of first electric capacity is all grounded.
Optionally, the switch unit includes a first switch and a second switch, a first end of the first switch is connected to a first end of the first capacitor, a second end of the first switch is connected to a first end of the second switch and an output end of the semiconductor control module, a second end of the second switch is grounded, a first switch control end is connected to a third pulse signal, and a control end of the second switch is connected to a fourth pulse signal.
Optionally, the first switch includes a third transistor, and the second switch includes a fourth transistor.
Optionally, the semiconductor detection circuit further includes an energy storage module, the energy storage module is connected with the semiconductor control module and the semiconductor to be detected, and the energy storage module is used for storing the electric energy output by the semiconductor to be detected.
Optionally, the energy storage module includes a first diode and a first inductor, a first end of the first diode is connected to a first end of the first inductor, and a second end of the first diode and a second end of the first inductor are connected to an output end of the semiconductor control module.
The technical scheme of the embodiment of the utility model provides a semiconductor detection circuit, which comprises the following components: the semiconductor test device comprises a semiconductor to be tested, a test end, a semiconductor control module and a heat dissipation module; the semiconductor to be tested is connected with a first pulse signal, and outputs electric energy according to the first pulse signal; the output end of the semiconductor control module is connected with the semiconductor to be tested, and the semiconductor control module is used for outputting an electric signal and controlling the semiconductor to be tested to be in a test state; the test end is connected with the semiconductor to be tested and is used for detecting the electrical parameters of the semiconductor to be tested; the heat dissipation module is connected with the semiconductor to be tested and is used for dissipating heat generated by the semiconductor to be tested. The heat generated by the semiconductor to be tested is dissipated to the heat dissipation module, so that the heat generated by the work of the semiconductor to be tested is reduced, the self-heating effect of the semiconductor is reduced, and the problem that the gallium nitride semiconductor in the prior art generates stronger self-heating effect after working for a long time is solved.
It should be understood that the description in this section is not intended to identify key or critical features of the embodiments of the utility model or to delineate the scope of the utility model. Other features of the present utility model will become apparent from the description that follows.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present utility model, the drawings required for the description of the embodiments will be briefly described below, and it is apparent that the drawings in the following description are only some embodiments of the present utility model, and other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
Fig. 1 is a schematic diagram of a semiconductor detection circuit according to an embodiment of the present utility model;
fig. 2 is a circuit diagram of a semiconductor detection circuit according to an embodiment of the present utility model;
fig. 3 is a circuit diagram of another semiconductor detection circuit provided in an embodiment of the present utility model;
FIG. 4 is a graph of electrical signal testing of a semiconductor under test when the semiconductor is not immersed, according to an embodiment of the present utility model;
FIG. 5 is a graph of electrical signal testing for a semiconductor under test with a soak time of 100us according to an embodiment of the present utility model;
FIG. 6 is a graph showing the relationship between the soak time and the self-heating reduction rate of a semiconductor under test according to an embodiment of the present utility model;
FIG. 7 is a graph showing the relationship between the soak time and the dynamic resistance of a semiconductor under test according to an embodiment of the present utility model;
fig. 8 is a graph showing a relationship between a soak time and a dynamic resistance ratio of a semiconductor to be tested according to an embodiment of the present utility model.
Detailed Description
In order that those skilled in the art will better understand the present utility model, a technical solution in the embodiments of the present utility model will be clearly and completely described below with reference to the accompanying drawings in which it is apparent that the described embodiments are only some embodiments of the present utility model, not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the present utility model without making any inventive effort, shall fall within the scope of the present utility model.
It should be noted that the terms "first," "second," and the like in the description and the claims of the present utility model and the above figures are used for distinguishing between similar objects and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used may be interchanged where appropriate such that the embodiments of the utility model described herein may be implemented in sequences other than those illustrated or otherwise described herein. Furthermore, the terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed but may include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus.
The embodiment of the utility model provides a semiconductor detection circuit, fig. 1 is a schematic structural diagram of the semiconductor detection circuit provided by the embodiment of the utility model, and as shown in fig. 1, the semiconductor detection circuit comprises a semiconductor 110 to be detected, a test end a, a semiconductor control module 120 and a heat dissipation module 130; the semiconductor 110 to be tested is connected with the first pulse signal V1, and the semiconductor 110 to be tested outputs electric energy according to the first pulse signal V1; the output terminal b of the semiconductor control module 120 is connected to the semiconductor 110 to be tested, and the semiconductor control module 120 is used for outputting an electrical signal and controlling the semiconductor 110 to be tested to be in a test state; the test terminal a is connected with the semiconductor 110 to be tested, and is used for detecting the electrical parameters of the semiconductor 110 to be tested; the heat dissipation module 130 is connected to the semiconductor 110 to be tested, and the heat dissipation module 130 is used for dissipating heat generated by the semiconductor 110 to be tested.
In the present embodiment, the semiconductor inspection circuit is a circuit for inspecting electrical parameters of a semiconductor, and the semiconductor under test 110 is a semiconductor device to be tested, for example, the semiconductor under test 110 includes a gallium nitride transistor. The test terminal a is a terminal for testing, and is connected to the semiconductor 110 to be tested, and detects the electrical signal of the semiconductor 110 to be tested by detecting the electrical signal of the test terminal a. The semiconductor control module 120 is a module for controlling an operation state of the semiconductor 110 to be tested, for example, the semiconductor 110 to be tested is in a test state or a test state according to an electrical signal output by the semiconductor control module 120. The heat dissipation module 130 is a module that dissipates heat of the semiconductor 110 to be tested, and for example, the heat dissipation module 130 includes a heat dissipation transistor. The first pulse signal V1 is a double pulse signal, i.e. the semiconductor 110 to be tested is controlled to be turned on or off by two pulses.
Illustratively, when the semiconductor control module 120 outputs a voltage signal, the semiconductor control module 120 controls the semiconductor 110 under test to be in a non-conductive state. When the semiconductor control module 120 outputs the current signal, the semiconductor control module 120 controls the semiconductor 110 to be tested to be in a test state, the semiconductor 110 to be tested is turned on according to the accessed first pulse signal V1, and the test terminal a can detect the current parameter or the voltage parameter of the semiconductor 110 to be tested by being connected with the test device, so as to obtain parameters such as a dynamic resistance of the semiconductor 110 to be tested. Meanwhile, heat generated by the semiconductor 110 to be tested is transferred to the heat dissipation module 130, so that the self-heating efficiency is reduced.
The technical scheme of the embodiment provides a semiconductor detection circuit, which comprises: the semiconductor test device comprises a semiconductor to be tested, a test end, a semiconductor control module and a heat dissipation module; the semiconductor to be tested is connected with a first pulse signal, and outputs electric energy according to the first pulse signal; the output end of the semiconductor control module is connected with the semiconductor to be tested, and the semiconductor control module is used for outputting an electric signal and controlling the semiconductor to be tested to be turned on or off; the test end is connected with the semiconductor to be tested and is used for detecting the electrical parameters of the semiconductor to be tested; the heat dissipation module is connected with the semiconductor to be tested and is used for dissipating heat generated by the semiconductor to be tested. The heat generated by the semiconductor to be tested is dissipated to the heat dissipation module, so that the heat generated by the work of the semiconductor to be tested is reduced, the self-heating effect of the semiconductor is reduced, and the problem that the gallium nitride semiconductor in the prior art generates stronger self-heating effect after working for a long time is solved.
Fig. 2 is a circuit diagram of a semiconductor detection circuit according to an embodiment of the present utility model, as shown in fig. 2, a semiconductor 110 to be detected includes a first transistor Q1, a control electrode of the first transistor Q1 is connected to a first pulse signal V1, and a first electrode of the first transistor Q1 and a second electrode of the first transistor Q1 are both connected to a test terminal a. The first transistor Q1 is a gallium nitride transistor, which is a semiconductor device based on a gallium nitride material, and its dynamic resistance affects the operation characteristics of the gallium nitride transistor. The high electron mobility and the high saturation drift velocity of the gallium nitride material determine the magnitude of the dynamic resistance, and the dynamic resistance can be obtained through testing of the testing end a.
With continued reference to fig. 2, the heat dissipation module 130 includes a second transistor Q2, the second transistor Q2 is connected in parallel with the first transistor Q1, a control electrode of the second transistor Q2 is connected to the second pulse signal V2, a first electrode of the second transistor Q2 is connected to the first electrode of the first transistor Q1, and a second electrode of the second transistor Q2 is connected to the second electrode of the first transistor Q1.
In this embodiment, the second pulse signal V2 provides the turn-on voltage for the second transistor Q2. Since the first pulse signal V1 connected to the first transistor Q1 is a double pulse signal, the first transistor Q1 is used for testing when the pulse signal input by the control electrode is the second pulse of the first pulse signal V1, wherein the first pulse of the double pulse signal is transmitted to the bypass device (i.e., the second transistor Q2), and the self-heating generated by the first pulse is emitted by the second transistor, so that the effect of reducing the self-heating of the device to be tested (i.e., the first transistor Q1) is achieved.
With continued reference to fig. 2, the test terminals include a voltage test terminal a1 and a current test terminal a2, the voltage test terminal a1 is connected to the first pole of the first transistor Q1, and the current test terminal a2 is connected to the second pole of the first transistor Q1.
In this embodiment, the voltage test terminal a1 is used for testing the voltage of the first transistor Q1, the current test terminal a2 is used for testing the current of the first transistor Q1, and the dynamic resistance of the first transistor Q1 can be obtained according to the voltage of the voltage test terminal a1 and the current of the current test terminal a 2. The semiconductor detection circuit further comprises a second inductor L2, a first end of the second inductor L2 is connected with a second pole of the first transistor Q1, and a second end of the second inductor L2 is grounded.
With continued reference to fig. 2, the semiconductor control module 120 includes a power supply unit 210 and a switching unit 220, the power supply unit 210 is connected to the switching unit 220, the power supply unit 210 is used for providing power, the switching unit 220 is connected to an output terminal of the semiconductor control module 120, and the switching unit 220 is used for controlling on or off of the semiconductor 110 to be tested. The power supply unit 210 is a unit for supplying power to the semiconductor control module 120, and the switching unit 220 controls on or off of the first transistor Q1.
The power supply unit 210 includes a first power DC and a first capacitor C1, where a positive electrode of the first power DC is connected to a first end of the first capacitor C1, and a negative electrode of the first power DC and a second end of the first capacitor C1 are grounded. The first power supply DC is a direct current power supply, and the first capacitor C1 is used as an energy storage capacitor to store electric energy output by the first power supply DC, so that the stability of an electric signal output by the first power supply DC is improved.
With continued reference to fig. 2, the switching unit 220 includes a first switch and a second switch, a first end of the first switch is connected to a first end of the first capacitor C1, a second end of the first switch is connected to a first end of the second switch and an output end b of the semiconductor control module 120, a second end of the second switch is grounded, a control end of the first switch is connected to the third pulse signal V3, and a control end of the second switch is connected to the fourth pulse signal V4. The first switch and the second switch comprise switching devices, and the first switch and the second switch control the working state of the first transistor Q1 by being turned on or turned off.
In this embodiment, the first switch includes a third transistor Q3, and the second switch includes a fourth transistor Q4. The control electrode of the third transistor Q3 is connected to the third pulse signal V3, the first electrode of the third transistor Q3 is connected to the first end of the first switch, and the second electrode of the third transistor Q3 is connected to the second end of the first switch. The control electrode of the fourth transistor Q4 is connected to the fourth pulse signal V4, the first electrode of the fourth transistor Q4 is connected to the first end of the second switch, and the second electrode of the fourth transistor Q4 is connected to the second end of the second switch.
For example, when the third transistor Q3 is turned on according to the third pulse signal V3 received by the control electrode and the fourth transistor Q4 is turned off, the semiconductor control module 120 outputs an electrical signal and controls the semiconductor 110 to be tested to be in a state to be tested (i.e., the first transistor Q1 is in a soaked state), wherein the soaked state may be specifically understood as a period in which the first electrode (i.e., the drain) of the first transistor Q1 and the second electrode (i.e., the source) of the first transistor Q1 are turned on, but the control electrode (i.e., the gate) of the first transistor Q1 maintains a zero voltage state and the first transistor Q1 is not turned on. When the third transistor Q3 is turned off and the fourth transistor Q4 is turned on according to the fourth pulse signal V4 received by the control electrode, the semiconductor control module 120 outputs an electrical signal and controls the semiconductor 110 to be tested to be in a test state, and the voltage and the current of the first transistor Q1 are respectively tested through the voltage test point a1 and the current test point a2, so as to obtain the dynamic resistance of the first transistor Q1. Through multiple tests, the relation between the soaking time of the semiconductor to be tested and the dynamic resistance and the relation between the soaking time of the semiconductor to be tested and the self-heating reduction rate can be obtained, so that the dynamic resistance and the self-heating reduction rate meeting the requirements are obtained.
Fig. 3 is a circuit diagram of another semiconductor detection circuit according to an embodiment of the present utility model, where, as shown in fig. 3, the semiconductor detection circuit further includes an energy storage module 310, where the energy storage module 310 is connected to the semiconductor control module 120 and the semiconductor 110 to be tested, and the energy storage module 310 is used to store electric energy output by the semiconductor 110 to be tested. The energy storage module 310 includes a first diode D1 and a first inductor L1, wherein a first end of the first diode D1 is connected to a first end of the first inductor L1, and a second end of the first diode D1 and a second end of the first inductor L1 are connected to an output end b of the semiconductor control module 120.
In this embodiment, the energy storage module 310 is a module for storing the output power of the semiconductor 110 to be tested, so as to reduce the energy consumption. Since the first pulse signal V1 of the semiconductor 110 to be tested is a double pulse signal, the energy storage module 310 can store the first pulse signal in the double pulse signal, specifically, the first diode D1 and the first inductor L1 store the first pulse signal, when the input of the first pulse signal is finished, the first diode D1 and the first inductor L1 form a loop, and when the input of the second pulse is finished, the current generated by the first pulse is superposed with the current generated by the second pulse, and at this time, the current of the semiconductor 110 to be tested is the superposition of the current generated by the double pulse signal, which is favorable for the test of the semiconductor to be tested.
For example, fig. 4 is a graph of electrical signal test of a semiconductor to be tested when not immersed, as shown in fig. 4, where a solid line represents a current variation curve, a dotted line represents a voltage variation curve, and an immersion time is 0us, a standard double pulse test result is obtained, and since the second transistor Q2 of the heat dissipation module 130 is connected in parallel with the first transistor Q1, the self-heating effect of the first pulse in the double pulse signal can be eliminated, so that the ratio of self-heating reduction is 70.82% according to the self-heating reduction ratio=heat generated by the first pulse/heat generated by the total process, and the dynamic resistance is 49.5mΩ when the immersion time is 0.4us according to the dynamic resistance=vds/Id.
Fig. 5 is a graph of electrical signal test when the soaking time of the semiconductor to be tested is 100us, as shown in fig. 5, the solid line represents a current variation curve, the dotted line represents a voltage variation curve, and the ratio of self-heating reduction is 82.07% and the dynamic resistance of the soaking time is 0.4us is 56.96mΩ. Thus, the self-heating reduction efficiency and dynamic resistance are improved at a soak time of 100us relative to a soak time of 0 us.
Fig. 6 is a graph showing the relationship between the soaking time and the self-heating reduction rate of the semiconductor to be tested according to the embodiment of the present utility model, wherein the self-heating reduction rate increases with the increase of the soaking time, and the self-heating reduction rate decreases with the increase of the soaking time after 100us as shown in fig. 6. As can be seen from the above, the soaking time was about 100us, which is the time period in which the self-heating reduction rate was most remarkable.
Fig. 7 is a graph showing a relationship between a soaking time and a dynamic resistance of a semiconductor to be tested according to an embodiment of the present utility model, as shown in fig. 7, when the soaking time increases, the dynamic resistance continuously increases, and the rising rate increases faster and faster.
Fig. 8 is a graph showing a relation between a soaking time and a dynamic resistance ratio of a semiconductor to be tested according to an embodiment of the present utility model, and as shown in fig. 8, when the soaking time is 100us, the dynamic resistance is raised by about 1.35 times.
In this embodiment, the dynamic resistance of the semiconductor to be tested increases exponentially with the immersion time, and the rate of rise of the dynamic resistance increases faster and faster with time. In order to meet the hardware requirements of more test environments, the working point with moderate dynamic resistance and optimal self-heating reduction rate can be selected, so that the semiconductor to be tested can be controlled to be in optimal soaking time through the semiconductor control module to be tested. Meanwhile, the heat radiation module is connected with the semiconductor to be tested in parallel, so that the self-heating efficiency of the semiconductor to be tested is greatly reduced.
It should be appreciated that various forms of the flows shown above may be used to reorder, add, or delete steps. For example, the steps described in the present utility model may be performed in parallel, sequentially, or in a different order, so long as the desired results of the technical solution of the present utility model are achieved, and the present utility model is not limited herein.
The above embodiments do not limit the scope of the present utility model. It will be apparent to those skilled in the art that various modifications, combinations, sub-combinations and alternatives are possible, depending on design requirements and other factors. Any modifications, equivalent substitutions and improvements made within the spirit and principles of the present utility model should be included in the scope of the present utility model.
Claims (10)
1. A semiconductor inspection circuit, comprising: the semiconductor test device comprises a semiconductor to be tested, a test end, a semiconductor control module and a heat dissipation module;
the semiconductor to be tested is connected to a first pulse signal, and the semiconductor to be tested outputs electric energy according to the first pulse signal;
the output end of the semiconductor control module is connected with the semiconductor to be tested, and the semiconductor control module is used for outputting an electric signal and controlling the semiconductor to be tested to be in a test state;
the test end is connected with the semiconductor to be tested and is used for detecting the electrical parameters of the semiconductor to be tested;
the heat dissipation module is connected with the semiconductor to be tested and is used for dissipating heat generated by the semiconductor to be tested.
2. The semiconductor inspection circuit of claim 1, wherein the semiconductor under test comprises a first transistor, a control electrode of the first transistor is connected to the first pulse signal, and a first electrode of the first transistor and a second electrode of the first transistor are connected to the test terminal.
3. The semiconductor detection circuit according to claim 2, wherein the heat sink module comprises a second transistor connected in parallel with the first transistor, a control electrode of the second transistor being connected to a second pulse signal, a first electrode of the second transistor being connected to a first electrode of the first transistor, a second electrode of the second transistor being connected to a second electrode of the first transistor.
4. The semiconductor detection circuit of claim 2, wherein the test terminal comprises a voltage test terminal and a current test terminal, the voltage test terminal being connected to a first pole of the first transistor, the current test terminal being connected to a second pole of the first transistor.
5. The semiconductor detection circuit according to claim 1, wherein the semiconductor control module includes a power supply unit and a switching unit, the power supply unit is connected with the switching unit, the power supply unit is used for providing power, the switching unit is connected with an output end of the semiconductor control module, and the switching unit is used for controlling on or off of the semiconductor to be detected.
6. The semiconductor detection circuit according to claim 5, wherein the power supply unit includes a first power supply and a first capacitor, a positive electrode of the first power supply is connected to a first end of the first capacitor, and a negative electrode of the first power supply and a second end of the first capacitor are grounded.
7. The semiconductor detection circuit according to claim 6, wherein the switching unit includes a first switch and a second switch, a first end of the first switch is connected to a first end of the first capacitor, a second end of the first switch is connected to a first end of the second switch and an output end of the semiconductor control module, a second end of the second switch is grounded, a control end of the first switch is connected to a third pulse signal, and a control end of the second switch is connected to a fourth pulse signal.
8. The semiconductor detection circuit of claim 7, wherein the first switch comprises a third transistor and the second switch comprises a fourth transistor.
9. The semiconductor inspection circuit according to claim 1, further comprising an energy storage module, wherein the energy storage module is connected to the semiconductor control module and the semiconductor under test, and the energy storage module is configured to store electric energy output by the semiconductor under test.
10. The semiconductor detection circuit of claim 9, wherein the energy storage module comprises a first diode and a first inductor, a first end of the first diode being connected to a first end of the first inductor, a second end of the first diode and a second end of the first inductor being connected to an output of the semiconductor control module.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202321238394.5U CN219842511U (en) | 2023-05-22 | 2023-05-22 | Semiconductor detection circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202321238394.5U CN219842511U (en) | 2023-05-22 | 2023-05-22 | Semiconductor detection circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN219842511U true CN219842511U (en) | 2023-10-17 |
Family
ID=88305987
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202321238394.5U Active CN219842511U (en) | 2023-05-22 | 2023-05-22 | Semiconductor detection circuit |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN219842511U (en) |
-
2023
- 2023-05-22 CN CN202321238394.5U patent/CN219842511U/en active Active
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| Song et al. | High voltage Si/SiC hybrid switch: An ideal next step for SiC | |
| Azizi et al. | Ultrafast switching of SiC MOSFETs for high-voltage pulsed-power circuits | |
| CN111337807A (en) | High-frequency high-voltage dynamic on-resistance test circuit and measurement method of switching device | |
| Jones et al. | A fast overcurrent protection scheme for GaN GITs | |
| Li et al. | Evaluation and Analysis of Temperature-Dependent Dynamic $ R_ {{{\mathrm {DS}}},{{\mathrm {ON}}}} $ of GaN Power Devices Considering High-Frequency Operation | |
| CN110794278A (en) | SiC MOSFET surge performance test method | |
| Franke et al. | Comparison of switching and conducting performance of SiC-JFET and SiC-BJT with a state of the art IGBT | |
| Zhong et al. | Characterization of dynamic threshold voltage in Schottky-type p-GaN gate HEMT under high-frequency switching | |
| CN219842511U (en) | Semiconductor detection circuit | |
| Chennu et al. | Study on Resonant Gate Driver circuits for high frequency applications | |
| CN114325284A (en) | Surge testing method capable of realizing automatic repeated surge | |
| Bergogne et al. | Demonstration of the normally-off bi-directional GaN AC switch | |
| Xu et al. | The mitigating effects of the threshold voltage shifting on the false turn-on of GaN E-HEMTs | |
| de Oliveira et al. | Impact of dynamic on-resistance of high voltage GaN switches on the overall conduction losses | |
| JP2018179618A (en) | Semiconductor element inspection device | |
| KR101969117B1 (en) | Active Clamp Forward Converter And Method Of Driving The Same | |
| CN112255537B (en) | Gallium nitride triode switch test circuit and test method | |
| JP7367505B2 (en) | Test method for power semiconductors and test equipment for power semiconductors | |
| CN211478537U (en) | Test circuit and test system | |
| Philipps et al. | A Flexible Test Setup for Long-Term Dynamic Characterization of SiC MOSFETs under Soft-and Hard-Switching Conditions | |
| GB2577182A (en) | Switching element control circuit and power module | |
| Lu et al. | The Impact of AlGaN Barrier on Transient V TH Shifts and V TH Hysteresis in Depletion and Enhancement mode AlGaN/GaN MIS-HEMTs | |
| Rabkowski et al. | Experimental study on turn-off process of medium voltage SiC MOSFET modules | |
| Mauromicale et al. | Analysis of the impact of the operating parameters on the variation of the dynamic on-state resistance of GaN power devices | |
| CN106466747B (en) | Discharge processing power source |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| GR01 | Patent grant | ||
| GR01 | Patent grant |