CN219802327U - Radio frequency receiving and transmitting chip - Google Patents
Radio frequency receiving and transmitting chip Download PDFInfo
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- CN219802327U CN219802327U CN202320842310.2U CN202320842310U CN219802327U CN 219802327 U CN219802327 U CN 219802327U CN 202320842310 U CN202320842310 U CN 202320842310U CN 219802327 U CN219802327 U CN 219802327U
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Abstract
The utility model relates to a radio frequency transceiver chip, comprising: the device comprises a first mixer, a first variable gain amplifier and an analog-to-digital conversion unit which are sequentially connected, wherein the first mixer is connected with a receiving local oscillator signal generating unit, the receiving local oscillator signal generating unit is connected with a crystal oscillator, the crystal oscillator is respectively connected with a controller and a transmitting local oscillator signal generating unit, the transmitting local oscillator signal generating unit is connected with a second mixer, the second mixer is respectively connected with a low-pass filter and a second variable gain amplifier, the low-pass filter is connected with the analog-to-digital conversion unit, and the analog-to-digital conversion unit, the controller and the analog-to-digital conversion unit are all connected with a processing unit. The utility model generates the local oscillation signal through the crystal oscillator, simplifies the architecture of the radio frequency transceiver chip, reduces the power consumption and saves the cost. According to the utility model, the sampling resistor is led out, and is arranged in the shielding box, so that interference can be avoided, and the precision is improved.
Description
Technical Field
The utility model relates to the field of semiconductors, in particular to a radio frequency transceiver chip.
Background
The RF transceiver chip converts radio signal communication into radio signal waveform and sends out the radio signal waveform via antenna resonance, and includes power amplifier, low noise amplifier, antenna switch, etc. the RF transceiver chip amplifies, filters and analog-to-digital converts the radio signal, and then sends the radio signal to baseband for subsequent signal processing to determine the communication quality of RF communication.
The traditional radio frequency transceiver chip has a complex structure, can generate additional power consumption, and because the chip generates a large amount of heat during working, all devices are mutually influenced, and the working performance of the device is influenced.
Disclosure of Invention
In order to overcome the technical defects, the radio frequency transceiver chip provided by the utility model can reduce power consumption, avoid interference and improve performance.
The technical scheme for achieving the purposes is as follows:
the utility model provides a radio frequency receiving and transmitting chip, which comprises: the device comprises a first mixer, a first variable gain amplifier and an analog-to-digital conversion unit which are sequentially connected, wherein the first mixer is connected with a receiving local oscillator signal generating unit, the receiving local oscillator signal generating unit is connected with a crystal oscillator, the crystal oscillator is respectively connected with a controller and a transmitting local oscillator signal generating unit, the transmitting local oscillator signal generating unit is connected with a second mixer, the second mixer is respectively connected with a low-pass filter and a second variable gain amplifier, the low-pass filter is connected with the analog-to-digital conversion unit, and the analog-to-digital conversion unit, the controller and the analog-to-digital conversion unit are all connected with a processing unit.
Further, the receiving local oscillation signal generating unit comprises a first frequency synthesizer, the first frequency synthesizer is connected with a first sampler, and the first sampler is connected with a first sampling resistor.
Further, the first sampling resistor is disposed in a shielding box.
Further, the transmitting local oscillation signal generating unit comprises a second frequency synthesizer, the second frequency synthesizer is connected with a second sampler, and the second sampler is connected with a second sampling resistor.
Further, the second sampling resistor is disposed in the shielding box.
Further, the first mixer and the second mixer are provided with a low-level noise amplifier at the front stage and a filter at the rear stage.
Further, a driving amplifier is arranged between the analog-digital conversion unit and the low-pass filter
The utility model generates the local oscillation signal through the crystal oscillator, simplifies the architecture of the radio frequency transceiver chip, reduces the power consumption and saves the cost. According to the utility model, the sampling resistor is led out, and is arranged in the shielding box, so that interference can be avoided, and the precision is improved.
Drawings
Fig. 1 is a schematic structural diagram of a radio frequency transceiver chip provided by the present utility model.
Detailed Description
Preferred embodiments of the present utility model will be described in detail with reference to the accompanying drawings.
As shown in fig. 1, the present utility model provides a radio frequency transceiver chip, which includes: the first mixer 1, the first variable gain amplifier 2 and the analog-to-digital conversion unit 3 are sequentially connected, the first mixer 1 is connected with the receiving local oscillation signal generation unit 4, the receiving local oscillation signal generation unit 4 is connected with the crystal oscillator 5, the crystal oscillator 5 is respectively connected with the controller 6 and the transmitting local oscillation signal generation unit 7, the transmitting local oscillation signal generation unit 7 is connected with the second mixer 8, the second mixer 8 is respectively connected with the low-pass filter 9 and the second variable gain amplifier 10, the low-pass filter 9 is connected with the analog-to-digital conversion unit 11, and the analog-to-digital conversion unit 3, the controller 6 and the analog-to-digital conversion unit 11 are all connected with the processing unit 12.
The reception local oscillation signal generation unit 4 includes a first frequency synthesizer 41, the first frequency synthesizer 41 is connected to a first sampler 42, and the first sampler 42 is connected to a first sampling resistor 43. To avoid interference, to improve accuracy, the first sampling resistor 43 may be placed in a shielded box or other shielding measures may be taken.
Similarly, the transmit local oscillator signal generating unit 7 includes a second frequency synthesizer 71, where the second frequency synthesizer 71 is connected to a second sampler 72, the second sampler 72 is connected to a second sampling resistor 73, and the second sampling resistor 73 is disposed in a shielding box or takes other shielding measures.
The crystal oscillator 5 generates a reference frequency source, the reference frequency source is input to the first frequency synthesizer 41, the first frequency synthesizer 41 performs frequency synthesis on the reference frequency source input by the crystal oscillator 5 to obtain a received local oscillator signal, and the received local oscillator signal is output to the first mixer 1.
The first mixer 1 performs quadrature mixing on the radio frequency received signal and the received local oscillation signal input by the first frequency synthesizer 41, and shifts the signal spectrum to a low frequency band, thereby obtaining a demodulated received low intermediate frequency signal.
The received low intermediate frequency signal is output to the first variable gain amplifier 2 for linear amplification. The variable gain amplifier is used for realizing variable gain amplification of signals and controlling the amplitude of radio frequency signals to be output within a required range, so that the signals entering the post-stage analog-to-digital conversion unit 3 become relatively stable, and the receiving end has a larger dynamic range.
The linearly amplified signal is output to the analog-to-digital conversion unit 3, the analog-to-digital conversion unit 3 performs analog-to-digital conversion on the input linearly amplified signal to obtain a low intermediate frequency digital signal, and the low intermediate frequency digital signal is transmitted to the processing unit 12.
The processing unit 12 outputs the low intermediate frequency digital signal to the analog-to-digital conversion unit 11, the analog-to-digital conversion unit 11 performs digital-to-analog conversion on the input digital signal, the analog signal after the digital-to-analog conversion is output to the low pass filter 9, and the low pass filter 9 performs analog low pass filtering on the signal after the digital-to-analog conversion.
The reference frequency source generated by the crystal oscillator 5 is input to the second frequency synthesizer 71, and the second frequency synthesizer 71 performs frequency synthesis on the reference frequency source input by the crystal oscillator 5 to obtain a transmit local oscillator signal, and outputs the transmit local oscillator signal to the second mixer 8.
The second mixer 8 carries out quadrature mixing on the signal filtered by the low-pass filter 9 and the transmitting local oscillation signal input by the second frequency synthesizer 71, and shifts the signal spectrum to a low frequency band to obtain a demodulated transmitting low intermediate frequency signal.
The transmission low intermediate frequency signal is output to the second variable gain amplifier 10, and the second variable gain amplifier 10 linearly amplifies the input radio frequency signal and outputs the amplified radio frequency signal.
The processing unit 12 can automatically calibrate the crystal oscillator frequency, the controller 6 performs digital/analog conversion on the crystal oscillator automatic frequency calibration parameter from the processing unit 12, converts the digital calibration signal input by the processing unit 12 into an analog level, and outputs the analog level to the crystal oscillator 5, and the crystal oscillator 5 adjusts the crystal oscillator frequency under the control of the calibration analog voltage input by the controller 6.
In addition, the front stage of the mixers 1, 8 may add a low noise amplifier, and the rear stage may add a filter to improve the signal-to-noise ratio of the receiving channel. In addition, the output end of the analog-to-digital conversion unit 11 can be added with a driving amplifier to improve the driving capability of the transmitting link.
The utility model generates the local oscillation signal through the crystal oscillator, simplifies the architecture of the radio frequency transceiver chip, reduces the power consumption and saves the cost. According to the utility model, the sampling resistor is led out, and is arranged in the shielding box, so that interference can be avoided, and the precision is improved.
The foregoing description is only a preferred embodiment of the present utility model, and is not intended to limit the scope of the present utility model, and various modifications can be made to the above-described embodiment of the present utility model. All simple, equivalent changes and modifications made in accordance with the claims and the specification of this application fall within the scope of the patent claims. The present utility model is not described in detail in the conventional art.
Claims (7)
1. A radio frequency transceiver chip, comprising: the device comprises a first mixer, a first variable gain amplifier and an analog-to-digital conversion unit which are sequentially connected, wherein the first mixer is connected with a receiving local oscillator signal generating unit, the receiving local oscillator signal generating unit is connected with a crystal oscillator, the crystal oscillator is respectively connected with a controller and a transmitting local oscillator signal generating unit, the transmitting local oscillator signal generating unit is connected with a second mixer, the second mixer is respectively connected with a low-pass filter and a second variable gain amplifier, the low-pass filter is connected with the analog-to-digital conversion unit, and the analog-to-digital conversion unit, the controller and the analog-to-digital conversion unit are all connected with a processing unit.
2. The radio frequency transceiver chip of claim 1, wherein the receive local oscillator signal generation unit comprises a first frequency synthesizer, the first frequency synthesizer being coupled to a first sampler, the first sampler being coupled to a first sampling resistor.
3. The radio frequency transceiver chip of claim 2, wherein the first sampling resistor is disposed in a shielding cage.
4. The radio frequency transceiver chip of claim 1, wherein the transmit local oscillator signal generation unit comprises a second frequency synthesizer, the second frequency synthesizer being coupled to a second sampler, the second sampler being coupled to a second sampling resistor.
5. The radio frequency transceiver chip of claim 4, wherein the second sampling resistor is disposed in a shielding cage.
6. The radio frequency transceiver chip of claim 1, wherein the first mixer and the second mixer are provided with a low-level noise amplifier in a front stage and a filter in a rear stage.
7. The radio frequency transceiver chip of claim 1, wherein a driver amplifier is disposed between the analog-to-digital conversion unit and the low pass filter.
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CN202320842310.2U CN219802327U (en) | 2023-04-14 | 2023-04-14 | Radio frequency receiving and transmitting chip |
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CN202320842310.2U CN219802327U (en) | 2023-04-14 | 2023-04-14 | Radio frequency receiving and transmitting chip |
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Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
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CN117114025A (en) * | 2023-10-25 | 2023-11-24 | 中诚华隆计算机技术有限公司 | Method for reducing energy consumption of SOC (system on chip) |
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Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN117114025A (en) * | 2023-10-25 | 2023-11-24 | 中诚华隆计算机技术有限公司 | Method for reducing energy consumption of SOC (system on chip) |
CN117114025B (en) * | 2023-10-25 | 2023-12-29 | 中诚华隆计算机技术有限公司 | Method for reducing energy consumption of SOC (system on chip) |
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