CN219799704U - BMS current sampling protection circuit and PCB board - Google Patents

Abstract

The utility model relates to the technical field of BMS current sampling, in particular to a BMS current sampling protection circuit and a PCB. The device comprises a charging loop module, a charging detection module, a discharging loop module and a discharging detection module; the discharging loop module comprises a first resistor and a first MOS tube, the source electrode of the first MOS tube is connected with the negative terminal port B-of the battery cell through the first resistor, and the drain electrode of the first MOS tube is connected with the negative discharging port P-of the battery cell; the discharge detection module comprises a first control chip, a first input end U1_ISN and a second input end U1_ISP of the first control chip are respectively connected to two ends of the first resistor, and a first output end U1_DSGL is connected with a grid electrode of the first MOS tube. According to the utility model, the charge and discharge loops are respectively changed into independent loops, so that the accuracy of current sampling is improved.

Description

BMS current sampling protection circuit and PCB board

Technical Field

The utility model relates to the field of lighting equipment, in particular to a BMS current sampling protection circuit and a PCB.

Background

Along with the wider and wider application of the lithium ion BATTERY in the fields of electric tools, small household appliances, two-wheelers and the like, the lithium ion BATTERY is more and more intelligent, and new requirements are put forward on sampling precision of voltage, current, temperature, electric quantity and the like of a BMS (BATTERY MANAGEMENT SYSTEM) on the lithium ion BATTERY.

At present, in the aspect of current sampling, the BMS samples out the current value of a charge-discharge loop mainly through an analog front end and a sampling resistor, and then transmits the current value to a control chip for coulomb electricity quantity calculation and conversion. In general, the charging circuit and the discharging circuit are commonly provided, and a small sampling resistance is selected to satisfy the discharge power and accuracy, and at this time, the charging current and the discharging current cancel each other out due to the small current and the small resistance during charging, which results in a case where the current sampling accuracy is deviated greatly.

Disclosure of Invention

The utility model provides a BMS current sampling protection circuit and a PCB (Printed Circuit Board ) for solving the technical problem of large current sampling precision deviation when a charge and discharge loop is shared in the background art.

In a first aspect, the utility model provides a BMS current sampling protection circuit, which comprises a battery cell port group used for connecting two ends of a battery pack, a discharge port group used for connecting two ends of an electric appliance, a charge port group used for connecting two ends of a charge module, a charge loop module, a charge detection module, a discharge loop module and a discharge detection module, wherein the battery cell port group is provided with a battery cell positive port and a battery cell negative port, the discharge port group is provided with a discharge positive port and a discharge negative port, the charge port group is provided with a charge positive port and a charge negative port, and the battery cell positive port is respectively connected with the discharge positive port and the charge positive port;

the discharging circuit module comprises a plurality of first resistors and first MOS tubes, wherein the source electrode of each first MOS tube is connected with the negative terminal of the corresponding electric core through the first resistor, and the drain electrode of each first MOS tube is connected with the negative terminal of the corresponding electric core; the discharge detection module comprises a first control chip for detecting the current of a discharge loop and controlling the on-off of the loop, a first input end and a second input end of the first control chip are respectively connected to two ends of a first resistor, and a first output end is connected with the grid electrode of the first MOS tube; the charging circuit module comprises a plurality of second resistors and a switch module, wherein the input end of the switch module is connected with the charging negative terminal, and the output end of the switch module is connected with the negative terminal of the battery cell through the second resistors; the charging detection module comprises a sampling module for sampling a charging current analog differential value and a second control chip for calculating coulomb electric quantity according to the charging current value and transmitting a control signal to the first control chip, wherein the input end of the sampling module is connected with one end of the second resistor, and the output end of the sampling module is connected with the input end of the second control chip; the output end of the second control chip is in data connection with the signal end group of the first control chip; and the second output end of the first control chip is connected with the control end of the switch module.

In some preferred embodiments, the sampling module is provided with a third control chip for sampling the analog differential value of the charging current of the second resistor, the first input end and the second input end of the third control chip are respectively connected with two ends of the second resistor, and the output end of the third control chip is connected with the input end of the second control chip.

In some preferred embodiments, the switch module includes a first triode, a second triode and a second MOS tube, the source of the second MOS tube is connected to the negative charging port, and the drain is connected to one end of the second resistor; the emitter of the first triode is connected with the second output end of the first control chip, the collector of the first triode is connected with the grid electrode of the second MOS tube, and the base of the first triode is grounded; and the emitter and the base of the second triode are respectively connected with the collector of the first triode, and the collector is connected with the source of the second MOS tube.

In some preferred embodiments, the switch module further includes a first diode, a second diode, and a first zener diode, wherein the positive electrode of the first diode is connected to the collector of the first triode, and the other end of the first diode is connected to the base of the second triode; the second diode is connected in parallel between the anode of the first diode and the emitter of the second triode; the first zener diode is connected in parallel between the source electrode and the grid electrode of the second MOS tube.

In some preferred embodiments, the charging circuit module further includes a plurality of first capacitors, and the plurality of first capacitors are connected in series and then connected in parallel between the source and the drain of the second MOS transistor.

In some preferred embodiments, the discharge loop module further includes a second zener diode connected in parallel between the gate and the source of the first MOS transistor.

In some preferred embodiments, the discharging circuit module further includes a plurality of second capacitors, and the plurality of second capacitors are connected in series and then connected in parallel between the source and the drain of the first MOS transistor.

In some preferred embodiments, the discharge detection module further includes a third capacitor connected in parallel between the first input terminal and the second input terminal of the first control chip.

In some preferred embodiments, further comprising a first fuse and a second fuse, the first fuse connected between the cell positive port and the discharge positive port; the second fuse is connected between one end of the second fuse and the charging positive port.

In a second aspect, the present utility model provides a PCB board, comprising the BMS current sampling protection circuit according to the first aspect.

The beneficial effects are that:

according to the utility model, the charge and discharge loops are respectively changed into independent loops, so that the accuracy of current sampling is improved. The charging circuit module is subjected to current sampling through the charging detection module, the discharging circuit module is subjected to current sampling through the discharging detection module, the charging circuit and the discharging circuit are respectively changed into independent circuits to be subjected to current sampling, and the accuracy of current sampling is improved.

Drawings

Fig. 1 is a schematic structural diagram of a BMS current sampling protection circuit according to an embodiment of the present utility model.

Fig. 2 is a first circuit diagram of a BMS current sampling protection circuit according to an embodiment of the present utility model.

Fig. 3 is a second circuit diagram of the BMS current sampling protection circuit according to an embodiment of the present utility model.

Wherein: 10-cell port group, B+ -cell positive port, B-cell negative port;

20-discharge port group, P+ -discharge positive port, P-discharge negative port;

30-charging port group, C+ -charging positive port, C-charging negative port;

the device comprises a 40-discharge loop module, an R1-first resistor, a T1-first MOS tube, a C2-second capacitor and a Z2-second voltage stabilizing diode;

50-a discharge detection module, U1-a first control chip and C3-a third capacitor;

the circuit comprises a 60-charging loop module, an R2-second resistor, a 61-switching module, a Q1-first triode, a Q2-second triode, a T2-second MOS (metal oxide semiconductor) tube, a D1-first diode, a D2-second diode, a Z1-first zener diode and a C1-first capacitor;

the device comprises a 70-charge detection module, a 71-sampling module, a U3-third control chip and a U2-second control chip;

f1-first fuse, F2-second fuse.

Detailed Description

The preferred embodiments of the present utility model will be described in detail below with reference to the attached drawings so that the advantages and features of the present utility model will be more readily understood by those skilled in the art, thereby more clearly defining the scope of the present utility model.

Referring to the drawings, wherein like reference numbers refer to like elements throughout, the principles of the present utility model are illustrated in an appropriate computing environment. The following description is based on illustrative embodiments of the utility model and should not be taken as limiting other embodiments of the utility model not described in detail herein.

The term "module" as used herein may be a software or hardware object executing on the computing system. The different components, modules, engines, and services described herein may be implemented as objects on the computing system. The apparatus and methods described herein may be implemented in software, but may also be implemented in hardware, and are within the scope of the present utility model.

Reference herein to "an embodiment" means that a particular feature, structure, or characteristic described in connection with the embodiment may be included in at least one embodiment of the utility model. The appearances of such phrases in various places in the specification are not necessarily all referring to the same embodiment, nor are separate or alternative embodiments mutually exclusive of other embodiments. Those of skill in the art will explicitly and implicitly appreciate that the embodiments described herein may be combined with other embodiments.

In the description of the present utility model, it should be noted that, unless explicitly specified and limited otherwise, the terms "mounted," "connected," and "connected" are to be construed broadly, and may be either fixedly connected, detachably connected, or integrally connected, for example; can be mechanically connected, electrically connected or can be communicated with each other; can be directly connected or indirectly connected through an intermediate medium, and can be communicated with the inside of two elements or the interaction relationship of the two elements. The specific meaning of the above terms in the present utility model can be understood by those of ordinary skill in the art according to the specific circumstances.

Example 1

Referring to fig. 1, fig. 1 shows a schematic structural diagram of a BMS current sampling protection circuit according to an embodiment of the present utility model. It includes a cell port group 10, a discharge port group 20, a charge port group 30, a discharge loop module 40, a discharge detection module 50, a charge loop module 60, and a charge detection module 70. The battery cell port group 10 is mainly used for connecting two ends of a battery pack. The discharge port group 20 is mainly used for connecting two ends of an electric appliance. The charging port group 30 is mainly used for connecting two ends of the charging module. The charge detection module 70 is mainly used for sampling the current of the charging loop module 60. The discharge detection module 50 is mainly used for sampling the current of the discharge loop module 40.

Specifically, please refer to fig. 2 and 3.

Fig. 2 illustrates a first circuit diagram of a BMS current sampling protection circuit provided by an embodiment of the present utility model.

Fig. 3 illustrates a second circuit diagram of the BMS current sampling protection circuit provided by the embodiment of the present utility model.

The battery cell port group 10 is provided with a battery cell positive port B+ and a battery cell negative port B-, wherein the battery cell positive port B+ is connected with the positive electrode of the battery pack, and the battery cell negative port B-is connected with the negative electrode of the battery pack.

The discharge port group 20 is provided with a discharge positive port p+ and a discharge negative port P-, the discharge positive port p+ is connected with the positive electrode of the electric appliance, and the discharge negative port P-is connected with the negative electrode of the electric appliance.

The charging port group 30 is provided with a charging positive port c+ and a charging negative port C-, the charging positive port c+ is connected with the positive pole of the charging module, and the charging negative port C-is connected with the negative pole of the charging module.

In this embodiment, the positive cell port b+ is also connected to the positive discharge port p+ and the positive charge port c+, respectively.

In this embodiment, the discharging circuit module 40 includes a first resistor R1 and a first MOS transistor T1, where a source of the first MOS transistor T1 is connected to the negative terminal B-of the battery cell through the first resistor R1, and a drain is connected to the negative discharging port P-. The first resistors R1 are mainly used for collecting discharge current, the power is generally 3W or more, the resistance value is less than or equal to 5mΩ, the number of the first resistors R1 can be increased according to the actual current, and if the number of the first resistors R1 is increased, the first resistors R1 are connected in parallel. The first MOS tube T1 is mainly used as a discharge switch.

The discharge detection module 50 includes a first control chip U1, a first input terminal u1_isn and a second input terminal u1_isp of the first control chip U1 are respectively connected to two ends of the first resistor R1, and a first output terminal u1_dsgl is connected to a gate of the first MOS transistor T1. The first control chip U1 is mainly used for detecting the current of a discharge loop and controlling the on-off of the loop, namely sampling and calculating and converting the AD value of the discharge current (the value obtained by converting the analog quantity into the digital quantity) of the first resistor R1, and then controlling the grid voltage of the first MOS tube T1 through the first output end U1_DSGL according to the calculated and converted value, so that the on-off of the first MOS tube T1 is controlled, and the effect of current parameter hardware protection control is achieved.

The charging loop module 60 comprises a second resistor R2 and a switch module 61, wherein the input end of the switch module 61 is connected with a charging negative port C-, and the output end of the switch module 61 is connected with a battery cell negative port B-through the second resistor R2. The second resistors R2 are mainly used for collecting charging current, the power is generally 3W or more, the resistance value is less than or equal to 5mΩ, the number of the second resistors R2 can be increased according to the actual current, and if the number of the second resistors R2 is increased, the parallel connection mode is adopted. The switch module 61 is mainly used as a charging switch.

The charging detection module 70 includes a sampling module 71 and a second control chip U2, where an input end of the sampling module 71 is connected to one end of the second resistor R2, and an output end of the sampling module is connected to an input end u2_cur_adc of the second control chip U2. The output end groups u2_scll, u2_sdal of the second control chip U2 are connected with the signal end groups u1_scll, u1_sdal of the first control chip U1 in a data manner. The second output terminal u1_chgl of the first control chip U1 is connected to the control terminal of the switch module 61. The sampling module 71 is mainly used for sampling the analog differential value of the charging current, that is, sampling the analog differential value of the charging current of the second resistor R2. The second control chip U2 is mainly configured to calculate coulomb electric quantity according to the charging current value and transmit a control signal to the first control chip U1, that is, receive the signal transmitted by the sampling module 71 and calculate the coulomb electric quantity, and transmit the calculated coulomb electric quantity to the first control chip U1, and then the first control chip U1 controls the switch module 61 to be turned on or turned off according to the signal transmitted by the second control chip U2.

In this embodiment, the first MOS transistor T1 is an N-channel MOS transistor.

In this embodiment, the model number of the first control chip U1 is OZ7716DLN. The model of the second control chip U2 is ES32F0283LT.

Through the above structural connection, the working principle of this embodiment may be as follows:

the current sequentially passes through the positive electrode port B+, the positive electrode port P+, the negative electrode port P-, the first MOS tube T1, the first resistor R1 and the negative electrode port B-of the battery core to form a discharge loop, the discharge current AD value of the first resistor R1 is sampled, calculated and converted through the first control chip U1, and then the voltage is output to the grid electrode of the first MOS tube T1 through the first output end U1_DSGL according to the calculated and converted value, so that the on-off state of the first MOS tube T1 is controlled.

The current sequentially passes through the charging positive port C+, the battery core positive port B+, the battery core negative port B-, the second resistor R2, the switch module 61 and the charging negative port C-to form a charging loop, the charging current analog differential value of the second resistor R2 is sampled by the sampling module 71, the coulomb electric quantity is calculated by the second control chip U2 and then is transmitted to the first control chip U1, and then the first control chip U1 outputs voltage to the control end of the switch module 61 through the second output end U1 CHGL according to the calculated and converted value, so that the on-off of the switch module 61 is controlled.

Through the working principle, the charging and discharging loops are respectively changed into independent loops, and then the accuracy of current sampling is improved.

Example two

On the basis of the above embodiment, the present embodiment is different in that:

as shown in fig. 3, the sampling module 71 is provided with a third control chip U3, the first input terminal u3_4 and the second input terminal u1_5 of the third control chip U3 are respectively connected with two ends of the second resistor R2, and the output terminal u3_6 is connected with the input terminal u2_cur_adc of the second control chip U2. The third control chip U3 is configured to sample an analog differential value of the charging current of the second resistor R2.

In this embodiment, the third control chip U3 is of the model SC70-6.

As shown in fig. 2, the switch module 61 includes a second MOS transistor T2, a first transistor Q1, and a second transistor Q2, where a source of the second MOS transistor T2 is connected to the charging negative port C-, and a drain of the second MOS transistor T2 is connected to one end of the second resistor R2. The emitter of the first triode Q1 is connected with the second output end U1-CHGL of the first control chip U1, the collector is connected with the grid electrode of the second MOS tube T2, and the base electrode is grounded. The emitter and the base of the second triode Q2 are respectively connected with the collector of the first triode Q1, and the collector is connected with the source of the second MOS tube T2. The first triode Q1 and the second triode Q2 are mainly used for controlling the on-off of the second MOS tube T2 in a matching mode.

In this embodiment, the types of the first transistor Q1 and the second transistor Q2 are PNP. The second MOS transistor T2 is an N-channel MOS transistor.

In this embodiment, the switch module 61 further includes a first zener diode Z1, a first diode D1, and a second diode D2, where an anode of the first diode D1 is connected to a collector of the first triode Q1, and another end is connected to a base of the second triode Q2. The second diode D2 is connected in parallel between the anode of the first diode D1 and the emitter of the second transistor Q2. The first zener diode Z1 is connected in parallel between the source and the gate of the second MOS transistor T2. The first zener diode Z1 is mainly used for stabilizing the voltage between the gate and the source of the second MOS transistor T2. The first diode D1 and the second diode D2 are mainly used to prevent current backflow.

In this embodiment, the charging circuit module 60 further includes a plurality of first capacitors C1, and the plurality of first capacitors C1 are connected in series and then connected in parallel between the source and the drain of the second MOS transistor T2. The first capacitor C1 mainly plays a filtering role.

In the present embodiment, the discharging circuit module 40 further includes a second zener diode Z2, and the second zener diode Z2 is connected in parallel between the gate and the source of the first MOS transistor T1. The second zener diode Z2 is mainly used for stabilizing the gate voltage of the first MOS transistor T1.

In this embodiment, the discharging circuit module 40 further includes a plurality of second capacitors C2, and the plurality of second capacitors C2 are connected in series and then connected in parallel between the source and the drain of the first MOS transistor T1. The second capacitor C2 mainly plays a filtering role.

In the present embodiment, the discharge detection module 50 further includes a third capacitor C3, and the third capacitor C3 is connected in parallel between the first input terminal u1_isn and the second input terminal u1_isp of the first control chip U1. The third capacitor C3 mainly plays a filtering role.

In this embodiment, the first fuse F1 and the second fuse F2 are further included, and the first fuse F1 is connected between the positive cell port b+ and the positive discharge port p+. The second fuse F2 is connected between one end of the second fuse F2 and the charging positive port c+. The first fuse F1 is mainly used for playing a role of discharge safety protection. The second fuse F2 is mainly used for playing a role of charging safety protection.

Through the above structural connection, the working principle of this embodiment may be as follows:

the current sequentially passes through the positive electrode port B+, the positive electrode port P+, the negative electrode port P-, the first MOS tube T1, the first resistor R1 and the negative electrode port B-of the battery core to form a discharge loop, the discharge current AD value of the first resistor R1 is sampled, calculated and converted through the first control chip U1, and then the voltage is output to the grid electrode of the first MOS tube T1 through the first output end U1_DSGL according to the calculated and converted value, so that the on-off state of the first MOS tube T1 is controlled.

The current sequentially passes through a charging positive port C+, a battery core positive port B+, a battery core negative port B-, a second resistor R2, a switch module 61 and a charging negative port C-to form a charging loop, a third control chip U3 of the sampling module 71 is used for sampling a charging current analog differential value of the second resistor R2, a second control chip U2 is used for calculating coulomb electric quantity and then transmitting a signal to the first control chip U1, and then the first control chip U1 outputs voltage to a first triode Q1 of the switch module 61 through a second output end U1-CHGL according to the calculated and converted value, so that the on-off of the first triode Q1, the second triode Q2 and the second MOS tube T2 is controlled.

Example III

The utility model provides a PCB, which comprises a BMS current sampling protection circuit as described in the first embodiment or the second embodiment.

The embodiments of the present utility model have been described in detail with reference to the drawings, but the present utility model is not limited to the above embodiments, and various changes can be made within the knowledge of those skilled in the art without departing from the spirit of the present utility model.

Claims (10)

1. The BMS current sampling protection circuit is characterized by comprising a battery cell port group (10) used for being connected with two ends of a battery pack, a discharge port group (20) used for being connected with two ends of an electric appliance, a charge port group (30) used for being connected with two ends of a charge module, a charge loop module (60), a charge detection module (70), a discharge loop module (40) and a discharge detection module (50), wherein the battery cell port group (10) is provided with a battery cell positive port B+ and a battery cell negative port B-, the discharge port group (20) is provided with a discharge positive port P+ and a discharge negative port P-, the charge port group (30) is provided with a charge positive port C+ and a charge negative port C-, and the battery cell positive port B+ is respectively connected with the discharge positive port P+ and the charge positive port C+;

the discharging loop module (40) comprises a plurality of first resistors R1 and a first MOS tube T1, wherein the source electrode of the first MOS tube T1 is connected with the negative terminal port B-of the battery cell through the first resistor R1, and the drain electrode is connected with the negative discharging port P-; the discharge detection module (50) comprises a first control chip U1 for detecting the current of a discharge loop and controlling the on-off of the loop, a first input end U1_ISN and a second input end U1_ISP of the first control chip U1 are respectively connected to two ends of a first resistor R1, and a first output end U1_DSGL is connected with the grid electrode of the first MOS tube T1; the charging circuit module (60) comprises a plurality of second resistors R2 and a switch module (61), wherein the input end of the switch module (61) is connected with the charging negative port C-and the output end of the switch module is connected with the battery cell negative port B-through the second resistors R2; the charging detection module (70) comprises a sampling module (71) for sampling a charging current analog differential value and a second control chip U2 for calculating coulomb electric quantity according to the charging current value and transmitting a control signal to the first control chip U1, wherein the input end of the sampling module (71) is connected with one end of the second resistor R2, and the output end of the sampling module is connected with the input end U2 CUR ADC of the second control chip U2; the output end group of the second control chip U2 is in data connection with the signal end group of the first control chip U1; the second output U1_CHGL of the first control chip U1 is connected to the control end of the switch module (61).

2. The BMS current sampling protection circuit according to claim 1, wherein the sampling module (71) is provided with a third control chip U3 for sampling the analog differential value of the charging current of the second resistor R2, a first input terminal u3_4 and a second input terminal u1_5 of the third control chip U3 are respectively connected with two ends of the second resistor R2, and an output terminal u3_6 is connected with an input terminal u2_cur_adc of the second control chip U2.

3. The BMS current sampling protection circuit according to claim 1, wherein said switching module (61) comprises a first transistor Q1, a second transistor Q2 and a second MOS transistor T2, a source of said second MOS transistor T2 is connected to said charging negative port C ", and a drain is connected to one end of said second resistor R2; an emitter of the first triode Q1 is connected with a second output end U1_CHGL of the first control chip U1, a collector of the first triode Q1 is connected with a grid electrode of the second MOS tube T2, and a base of the first triode Q1 is grounded; and the emitter and the base of the second triode Q2 are respectively connected with the collector of the first triode Q1, and the collector is connected with the source of the second MOS tube T2.

4. The BMS current sampling protection circuit according to claim 3, wherein said switching module (61) further comprises a first diode D1, a second diode D2 and a first zener diode Z1, the positive electrode of said first diode D1 is connected to the collector of said first transistor Q1, and the other end is connected to the base of said second transistor Q2; the second diode D2 is connected in parallel between the anode of the first diode D1 and the emitter of the second triode Q2; the first zener diode Z1 is connected in parallel between the source and the gate of the second MOS transistor T2.

5. The BMS current sampling protection circuit according to claim 4, wherein said charging loop module (60) further comprises a plurality of first capacitors C1, and a plurality of said first capacitors C1 are connected in series and then connected in parallel between the source and the drain of said second MOS transistor T2.

6. The BMS current sampling protection circuit according to claim 1, wherein said discharging loop module (40) further comprises a second zener diode Z2, said second zener diode Z2 being connected in parallel between the gate and the source of said first MOS transistor T1.

7. The BMS current sampling protection circuit according to claim 6, wherein said discharging circuit module (40) further comprises a plurality of second capacitors C2, and wherein a plurality of said second capacitors C2 are connected in series and then connected in parallel between the source and the drain of said first MOS transistor T1.

8. The BMS current sampling protection circuit according to claim 1, wherein said discharge detection module (50) further comprises a third capacitor C3, said third capacitor C3 being connected in parallel between the first input u1_isn and the second input u1_isp of said first control chip U1.

9. The BMS current sampling protection circuit according to claim 1, further comprising a first fuse F1 and a second fuse F2, said first fuse F1 being connected between said cell positive port b+ and said discharge positive port p+; the second fuse F2 is connected between one end of the second fuse F2 and the charging positive port c+.

10. A PCB board, characterized by comprising the BMS current sampling protection circuit according to any one of claims 1 to 9.