CN219740670U - Universal dimming control circuit for lamp - Google Patents

Abstract

The utility model discloses a general dimming control circuit for lamps, which comprises: the LED lamp comprises a singlechip, a driving module U1, a half-bridge circuit and a passive second-order low-pass filter circuit, wherein the singlechip is connected with the driving module U1, the driving module U1 is connected with the half-bridge circuit, the output of the half-bridge circuit is connected with the passive second-order low-pass filter circuit, and the passive second-order low-pass filter circuit is connected with a lamp dimming control line. In the utility model, the lamp using the universal dimming control circuit is suitable for lamps with different dimming modes, saves the types of circuits and has extremely strong universality.

Description

Universal dimming control circuit for lamp

Technical Field

The utility model relates to the technical field of lamp illumination, in particular to a universal dimming control circuit for lamps.

Background

The light fixture is a light fixture capable of transmitting, distributing and changing light distribution of a light source, so that the light source can reliably emit light to meet the light requirement when people engage in various activities, at present, the existing light fixture dimming control has a PWM control mode and also has a 0-10V analog voltage control mode, and the dimming control module of the existing light fixture has no universality, so that a general dimming control circuit of the light fixture needs to be provided.

Disclosure of Invention

The utility model aims to provide a general dimming control circuit for a lamp, and the lamp using the circuit is suitable for lamps with different dimming modes, saves the types of circuits, has extremely strong universality and solves the problems in the background technology.

In order to achieve the above purpose, the present utility model provides the following technical solutions:

a universal dimming control circuit for a luminaire, comprising: the LED lamp comprises a singlechip, a driving module U1, a half-bridge circuit and a passive second-order low-pass filter circuit, wherein the singlechip is connected with the driving module U1, the driving module U1 is connected with the half-bridge circuit, the output of the half-bridge circuit is connected with the passive second-order low-pass filter circuit, and the passive second-order low-pass filter circuit is connected with a lamp dimming control line.

Preferably, the singlechip outputs a PWM signal to the driving module U1.

Preferably, the driving module U1 converts the PWM signal output by the single-chip microcomputer, and outputs two paths of PWM signals, where the two paths of PWM signals are PWM1 and PWM2 respectively.

Preferably, the half-bridge circuit includes: mosfet q1, resistor R2, mosfet q2, resistor R3, resistor R4.

Preferably, the PWM1 and PWM2 signals alternately turn on the mosfets q1 and q2, so that the output of the junction between VCC1 and GND1 is a PWM waveform.

Preferably, the passive second-order low-pass filter circuit comprises a resistor R5, a capacitor C1, a resistor R6 and a capacitor C2, and parameter values of the resistor R5, the capacitor C1, the resistor R6 and the capacitor C2 are adjusted according to PWM waveforms output by the junction of VCC1 and GND 1.

Compared with the prior art, the utility model has the beneficial effects that:

in the utility model, the lamp using the universal dimming control circuit is suitable for lamps with different dimming modes, saves the types of circuits and has extremely strong universality.

Drawings

Fig. 1 is a circuit diagram of a general dimming control circuit for a lamp of the present utility model.

Detailed Description

The following description of the embodiments of the present utility model will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present utility model, but not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the utility model without making any inventive effort, are intended to be within the scope of the utility model.

Referring to fig. 1, the present utility model provides a technical solution:

as shown in fig. 1, includes: the device comprises a singlechip, a driving module U1, a half-bridge circuit and a passive second-order low-pass filter circuit.

The singlechip outputs PWM signals to the driving module U1; the driving module U1 converts PWM signals output by the singlechip and outputs two paths of PWM signals, wherein the two paths of PWM signals are PWM1 and PWM2 respectively.

Further, the PWM1 and PWM2 signals alternately conduct the MOSFETQ1 and the MOSFETQ2 of the half-bridge circuit, so that the output of the junction of VCC1 and GND1 is a PWM waveform.

And regulating the parameter values of the resistor R5, the capacitor C1, the resistor R6 and the capacitor C2 according to the PWM waveform output by the junction of VCC1 and GND1, so that the output signal between the lamp dimming control line 1 and the lamp dimming control line 2 is the PWM waveform required by the lamp or the voltage value of which the analog quantity required by the lamp is 0-10V.

When the lamp needs PWM signal dimming, the values of the resistor R5, the resistor R6, the capacitor C1 and the capacitor C2 are set. The PWM waveform is output between the lamp dimming control line 1 and the lamp dimming control line 2, and the brightness of the lamp light can be adjusted by adjusting the duty ratio of PWM through the singlechip.

When the lamp needs 0-10V analog voltage dimming, the values of the resistor R5, the resistor R6, the capacitor C1 and the capacitor C2 are set, and the PWM duty ratio is adjusted through the singlechip, so that the output between the lamp dimming control line 1 and the lamp dimming control line 2 is changed between 0-10V, and the brightness of lamp light can be adjusted.

The embodiment is optional and comprises a hardware framework and a software kernel, and is characterized in that the hardware framework is an SOC single chip with an internal full hardware TCP/IP protocol stack and an ARMCortex_M3CPU 32-bit kernel; the software kernel comprises a multitasking real-time operating system kernel, a driver and a service program, wherein the service program comprises a Web server, a WebSocket server, a Modbus server, a UART serial server, a PLC server, an AdobeF flash security sandbox and FAT32 file management; the network singlechip is controlled by a language conforming to the HTML5 standard, and the control command is transmitted by a TCP/IP network protocol.

The control instruction of the singlechip enters a hardware layer of the network singlechip through an RJ45 interface formed by T beta 0N/T beta 0P, RXIN/RXIP, enters an application layer through a driving layer under the coordination of a uCOSII multitask real-time operating system, and is executed by automatically selecting corresponding software server programs according to different Socket access ports. The application layer contains 7 software servers: integrating Web server, webSocket server, modbus server, UART serial server, PLC server, adobeF flash security sandbox and FAT32 file management.

The Web server is mainly responsible for HTTP communication with the client browser, responds to the request of the client and responds to the information required by the client. The Web server has the main tasks: responding to the system parameters to set the information of the fixed webpage, and fixing a service port 8000; responding to user HTML5 webpage file index, HTML stored in a singlechip system Flash memory or an SD memory card by a user, and fixing a service port 80; in response to the client file management request, uploading and downloading HTML5 and related web page files to a system Flash memory or an SD memory card by using FAT32 file management service, and fixing a service port: 8080.

the WebSocket server mainly realizes Socket communication between client side browsers, and establishes long connection with the client side, so that the client side browser and a UART serial port of the singlechip can carry out transparent transmission. The service port is set by the user through the parameter setting web page.

The Modbus server is mainly responsible for analyzing Modbus instructions meeting international standards from the network client, controlling all ports of the singlechip according to instruction requirements, and simultaneously returning data required by the client. The Modbus server automatically recognizes the common Socket connection and the Websocket connection, so that the singlechip can be compatible with the common TCP/IPMODBus communication protocol and the Modbus protocol of the HTML5 specification. The Modbus server port is the WebSocket server port plus 1.

The UART server is mainly responsible for configuration and management of three interfaces of the UART1, 2 and 3 of the singlechip, so that the UART interface is in data communication with the inside of the WebSocket server, different interfaces of the UART can be flexibly selected to be connected with the inside of the WebSocket server, transparent transmission between a client and different UART interfaces is realized, and equipment with UART serial ports of a third party is controlled through the UART interfaces. The UART server is internally connected with the Websocket, and the external server port is the Websocket server port.

The PLC server is integrated with a special PLC control kernel inside the singlechip, can explain and execute a special PLC ladder diagram program, the HTML5 network singlechip does not run a webpage file of the HTML5, and runs by totally depending on a client browser, and the PLC control kernel is integrated inside, so that the PLC ladder diagram program can be executed to achieve off-line control, the ladder diagram file of the PLC can be stored on an SD memory card, and the PLC is called into an SRAM memory to be interpreted and run.

The AdobeF Flash security sandbox mainly solves the problem that occurs when a webpage file uses Flash to call Socket cross-domain communication, flash vector animation is widely applied in the past, the excellent Socket communication function is that before the Websocket of HTML5 occurs, the optimal choice of communication between a webpage and a network device supporting the Socket is solved, in order to keep compatible with Flash, the AdobeF Flash security sandbox is indispensable, a specific message frame initiated before connection of a client Flash is continuously monitored, then security policy information is responded, and Socket connection is successfully established. The service port of the AdobeF flash security sandbox is fixed as follows: 843.

the function of FAT32 file management mainly organizes and manages an SPI external storage device=flash memory and an SD memory card connected to a single chip microcomputer in the specifications of FAT32 files and directories, and stores the files in the format of FAT32 standard files.

The core circuit of the SOC singlechip is specifically as follows: the 25M crystal oscillator circuit consisting of R12, C21, C22 and T2 is connected with pins 39 and 40 of W7200 to provide an oscillation clock source for the internal hardware TCP/IP protocol stack module; an 8M crystal oscillator circuit formed by R8, C9 and T1 is connected with 4 pins and 5 pins of W7200 to provide an oscillation clock source for an internal ARMCortex_M3 kernel; the 6 pin of W7200 is connected with C10 to form ARM core low level reset circuit; the capacitor C15 is connected with the pin 51 to form an internal TCP/IP protocol stack module low-level reset circuit, then is connected with the pin 3, and the program can control the TCP/IP protocol stack module to reset through the PC 15. The internal hardware TCP/IP protocol stack module of W7200 has special requirements on power supply, and has three power supplies of digital 3.3V, analog 3.3V and kernel 1.8V, and the external input 3.3V is directly used as digital 3.3V power supply. The digital 3.3V is connected to the 8 pin through the filtering of the capacitors Cll and C12, the digital 3.3V power is connected to the 19 pin through the filtering of the capacitors C13 and C14, the digital 3.3V power is connected to the 57 pin through the analog 3.3V power formed by the capacitors C4, C5, C6, C7 and the inductor Ll, the I.8V power is output by the 14 pin, is connected to the 46 pin through the filtering of the capacitors C18, C19, C20 and the inductor L2, and the 50 pin is connected to the GND through the capacitors C16 and C17;

the 48-pin resistor RKKRRl is connected with GND by 28.7K bias resistor, the 45-pin resistor RKRRl is connected with low level to set the normal working mode, the 58-pin resistor RKRRl is connected with high level by 59-pin resistor RKRRl, and the 60-pin resistor RKRRL is connected with high level to configure the TCP/IP protocol stack module into an automatic handshake mode and a full duplex 100M transmission rate mode; w7200 has 12 bit ADC analog port, but no reference voltage is provided inside, and TL431 and R9 form 2.5V reference voltage to be connected to 9 pin ADC input end to ensure ADC to collect analog data accurately.

Although embodiments of the present utility model have been shown and described, it will be understood by those skilled in the art that various changes, modifications, substitutions and alterations can be made therein without departing from the principles and spirit of the utility model, the scope of which is defined in the appended claims and their equivalents.

Claims (6)

1. General dimming control circuit of lamps and lanterns, its characterized in that includes: the LED lamp comprises a singlechip, a driving module U1, a half-bridge circuit and a passive second-order low-pass filter circuit, wherein the singlechip is connected with the driving module U1, the driving module U1 is connected with the half-bridge circuit, the output of the half-bridge circuit is connected with the passive second-order low-pass filter circuit, and the passive second-order low-pass filter circuit is connected with a lamp dimming control line.

2. The universal dimming control circuit for a lamp as recited in claim 1, wherein: the singlechip outputs PWM signals to the driving module U1.

3. The universal dimming control circuit for a lamp as recited in claim 1, wherein: the driving module U1 converts PWM signals output by the singlechip to output two paths of PWM signals, wherein the two paths of PWM signals are PWM1 and PWM2 respectively.

4. A light fixture universal dimming control circuit as recited in claim 3, wherein: the half-bridge circuit includes: mosfet q1, resistor R2, mosfet q2, resistor R3, resistor R4.

5. The universal dimming control circuit for a lamp as recited in claim 4, wherein: the PWM1 and PWM2 signals enable the MOSFETQ1 and the MOSFETQ2 to be alternately conducted, and the output of the junction of VCC1 and GND1 is a PWM waveform.

6. The universal dimming control circuit for a lamp as recited in claim 1, wherein: the passive second-order low-pass filter circuit comprises a resistor R5, a capacitor C1, a resistor R6 and a capacitor C2, and parameter values of the resistor R5, the capacitor C1, the resistor R6 and the capacitor C2 are adjusted according to PWM waveforms output by the junction of VCC1 and GND 1.