CN219555141U - Front-back separation processing mobile sound control circuit and sound box thereof - Google Patents
Front-back separation processing mobile sound control circuit and sound box thereof Download PDFInfo
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- CN219555141U CN219555141U CN202320404632.9U CN202320404632U CN219555141U CN 219555141 U CN219555141 U CN 219555141U CN 202320404632 U CN202320404632 U CN 202320404632U CN 219555141 U CN219555141 U CN 219555141U
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D30/00—Reducing energy consumption in communication networks
- Y02D30/70—Reducing energy consumption in communication networks in wireless communication networks
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Abstract
The utility model discloses a front-rear separation processing mobile sound control circuit and a sound box thereof, which comprise a DSP processing circuit, a signal processing circuit, an earphone monitoring circuit, a power amplification processing circuit, a control display circuit and an input interface circuit, wherein the signal processing circuit, the earphone monitoring circuit, the power amplification processing circuit, the control display circuit and the input interface circuit are respectively connected with the DSP processing circuit; the power amplification processing circuit is used for processing the source signal to obtain a power amplification signal; the signal processing circuit is connected with the control display circuit. The front-rear separation processing mobile sound control circuit provided by the utility model sequentially realizes the high-fidelity requirement of the sound box by transmitting the processed front-stage audio to the rear-stage power amplification module for amplifying the audio signal, and provides the dual-channel power amplification circuit for realizing multi-channel selection of the audio signal, and the output power is amplified by the digital power amplification module so as to improve the output tone quality and volume.
Description
Technical Field
The utility model relates to the technical field of sound boxes, in particular to a front-rear separation processing mobile sound box control circuit and a sound box thereof.
Background
In order to protect the low distortion rate of audio output, a limiter is added in the audio processing process to limit and compress audio signals at the same time, most of the existing power amplification boxes on the market have only one group of processors, when the audio is output and amplified, audio signals directly jump through a high-low pitch section and an audio effect adjustment, are transmitted to a rear stage through a front stage to amplify the audio signals, and are directly sounded by a sound box, so that the distortion of the signals is reduced, the practical lowest signal distortion is realized, the optimal appreciation requirement of people on music is met, and the existing sound box cannot meet the requirement of high fidelity.
Disclosure of Invention
In order to overcome the above drawbacks of the prior art, the present utility model is directed to a front-to-back separation processing mobile audio control circuit and a sound box thereof, so as to solve the problems set forth in the background art.
The technical scheme adopted for solving the technical problems is as follows: the front-rear separation processing mobile sound control circuit comprises a DSP processing circuit, a signal processing circuit, an earphone monitoring circuit, a power amplification processing circuit, a control display circuit and an input interface circuit, wherein the signal processing circuit, the earphone monitoring circuit, the power amplification processing circuit, the control display circuit and the input interface circuit are respectively connected with the DSP processing circuit; the power amplification processing circuit is used for processing the source signal to obtain a power amplification signal; the signal processing circuit is connected with the control display circuit.
As a further improvement of the utility model: the DSP processing circuit is provided with a chip U8 and an OTG live broadcast circuit, and the OTG live broadcast circuit is connected with the chip U8 through an interface J5.
As a further improvement of the utility model: the OTG live circuit has a TYPEC interface.
As a further improvement of the utility model: the power amplifier processing circuit is provided with a double-channel power amplifier circuit, a rear-stage power amplifier circuit and a chip U5, wherein the double-channel power amplifier circuit is connected with the chip U5, the rear-stage power amplifier circuit is connected with the chip U8, and the chip U5 is connected with the chip U8.
As a further improvement of the utility model: the earphone monitoring circuit is provided with a chip U1.
As a further improvement of the utility model: the signal processing circuit is provided with an AUX output circuit, an AUX input circuit and a chip U4, wherein the AUX output circuit and the AUX input circuit are respectively connected with the chip U4, the chip U4 is also connected with a memory SD1, and the signal processing circuit is used for processing Bluetooth and USB flash disk signals.
As a further improvement of the utility model: the input interface circuit is provided with a microphone input circuit, a musical instrument input circuit and a wireless microphone circuit, and the microphone input circuit, the musical instrument input circuit and the wireless microphone circuit are respectively connected with the chip U8.
As a further improvement of the utility model: the control display circuit is provided with a chip U9, and the chip U9 is connected with the chip U8.
As a further improvement of the utility model: the control display circuit is also provided with a display screen circuit.
A sound box is provided, which is provided with a front-back separation processing mobile sound control circuit.
Compared with the prior art, the utility model has the beneficial effects that:
in order to protect the low distortion rate of audio output, a limiter is added in the audio processing process to limit and compress audio signals at the same time, most of the existing power amplification boxes on the market have only one group of processors, when the audio is output and amplified, audio signals directly jump through a high-low pitch section and an audio effect adjustment, are transmitted to a rear stage through a front stage to amplify the audio signals, and are directly sounded by a sound box, so that the distortion of the signals is reduced, the practical lowest signal distortion is realized, the optimal appreciation requirement of people on music is met, and the existing sound box cannot meet the requirement of high fidelity.
The sound box of the utility model is transmitted to the rear-stage power amplification module to amplify the audio signal after the processing of the front-stage audio, the requirement of high fidelity of the sound box is sequentially realized, the dual-channel power amplification circuit is provided to realize multi-channel selection of the audio signal, and the output power is amplified by the digital power amplification module, so that the output tone quality and volume are improved.
Drawings
Fig. 1 is a schematic diagram of a power amplifier circuit according to the present utility model.
FIG. 2 is a schematic diagram of a DSP processing circuit according to the present utility model.
Fig. 3 is a schematic structural diagram of the OTG live circuit of the present utility model.
Fig. 4 is a schematic diagram of a structure of a post-stage power amplifier circuit according to the present utility model.
Fig. 5 is a schematic diagram of a dual-channel power amplifier circuit according to the present utility model.
Fig. 6 is a schematic diagram of a control display circuit according to the present utility model.
Fig. 7 is a schematic diagram of a signal processing circuit according to the present utility model.
Fig. 8 is a schematic structural diagram of a headset listening circuit according to the present utility model.
Fig. 9 is a schematic diagram of an input interface circuit according to the present utility model.
Detailed Description
In order to make the objects, technical solutions and advantages of the present utility model more apparent, the technical solutions of the present utility model will be clearly and completely described below with reference to specific embodiments of the present utility model and corresponding drawings. It will be apparent that the described embodiments are only some, but not all, embodiments of the utility model. All other embodiments, which can be made by those skilled in the art based on the embodiments of the utility model without making any inventive effort, are intended to be within the scope of the utility model.
The utility model will now be further described with reference to the accompanying drawings and examples: the front-rear separation processing mobile sound control circuit comprises a DSP processing circuit, a signal processing circuit, an earphone monitoring circuit, a power amplification processing circuit, a control display circuit and an input interface circuit, wherein the signal processing circuit, the earphone monitoring circuit, the power amplification processing circuit, the control display circuit and the input interface circuit are respectively connected with the DSP processing circuit; the power amplification processing circuit is used for processing the source signal to obtain a power amplification signal; the signal processing circuit is connected with the control display circuit.
The DSP processing circuit is provided with a chip U8 and an OTG live broadcast circuit, and the OTG live broadcast circuit is connected with the chip U8 through an interface J5; the OTG live circuit has a TYPEC interface.
In this DSP processing circuit, circuit access interface J5's TP5V-1 foot is in still being connected with coil L12 simultaneously, and triode Q7's collecting electrode is connected to coil L12's one end, triode Q7's projecting pole connecting resistance R99's one end and triode Q9's projecting pole, triode Q9's collecting electrode connecting resistance R102 and insert +5V circuit in, resistance R102 is connected with resistance R101, triode Q7's base, resistance R99 and triode Q9's base are connected with resistance R100, and triode Q10's collecting electrode is connected to one end of resistance R100, triode Q10's base inserts between resistance R102 and resistance R101, and triode Q8's collecting electrode is still connected between resistance R102 and the resistance R101, and triode Q8's projecting pole ground, and triode Q8's base is connected with resistance R97 and R98 respectively, and resistance R97 inserts in the TYPE SW foot of interface J5, and in the TYPE foot of interface J5.
The power amplifier processing circuit is provided with a double-channel power amplifier circuit, a rear-stage power amplifier circuit and a chip U5, wherein the double-channel power amplifier circuit is connected with the chip U5, the rear-stage power amplifier circuit is connected with the chip U8, and the chip U5 is connected with the chip U8.
In the power amplification processing circuit, one path of capacitor C20 is connected into an OUTPR pin of a chip U5, the other end of the capacitor C20 is connected with a resistor R28, the resistor R28 is also connected with a resistor R19, a resistor R60, a resistor R29 and a capacitor C66 are also respectively connected between the resistor R28 and the resistor R19, the other end of the capacitor C66 is grounded, the resistor R29 is connected with a capacitor C24, the capacitor C24 is connected into an OUTPL pin of the chip U5, the other end of the resistor R60 is connected into a pin 2 of an operational amplifier U3A, the resistor R60 is also connected with a capacitor C11, the capacitor C11 is also connected with the resistor R19 and is connected into a pin 1 of the operational amplifier U3A, the pin 3 of the operational amplifier U3A is also connected with a resistor R37, the operational amplifier U3A is also connected with a capacitor C32, the pin 1 of the operational amplifier U3A is also connected with a resistor R59, one end of the capacitor C11 and the resistor R19 is connected with a resistor R54, the resistor R54 is connected into an L+ channel, one end of the resistor R59 is connected with a resistor R15, the other end of the capacitor C9 and the pin 6B of the operational amplifier U3B is connected with the pin 6, the other end of the operational amplifier U3B is connected with the resistor R3B, and the other end of the resistor R19 is connected with the resistor R19;
one path of capacitor C20A is connected into the OUTPR pin of the chip U5, the other end of the capacitor C20 is connected with a resistor R28A, the resistor R28A is connected with a resistor R19A, a resistor R60A, a resistor R29A and a capacitor CC66A are connected between the resistor R28A and the resistor R19A, the other end of the resistor R29A is connected with a capacitor C24A, the capacitor C24A is connected into the OUTPL pin of the chip U5, the resistor R60A is connected with a capacitor C11A and a pin 2 of the operational amplifier U3AA, a pin 3 of the operational amplifier U3AA is connected with a resistor R37A, the operational amplifier U3AA is also connected with a capacitor C32A, a pin 1 of the operational amplifier U3AA is connected with a resistor R19A, a resistor C11A resistor R59A and one end of a capacitor C21A are connected with a resistor R54A, a resistor R54A is connected into a R+ channel, a resistor R59A is connected with a resistor R15A, a capacitor C9A and a pin 6 of the operational amplifier U3AB, a pin 5 of the operational amplifier U3AB is connected with a resistor R16A and a capacitor C19A is connected with a resistor R19A and a capacitor C53A is connected into the resistor R19A.
The earphone monitoring circuit is provided with a chip U1.
In the earphone monitoring circuit, a resistor R32, a resistor R33 and a resistor R35 are connected in series, a resistor R31 is connected between the resistor R32 and the resistor R33, meanwhile, a resistor R34, an emitter of a triode Q1 and a base of a three-connection tube Q2 are connected, the resistor R34 and the resistor R35 are connected to the base of the triode Q1 and the emitter of the triode Q2, a collector of the triode Q1 is connected with a collector of the triode and is also connected with one end of a resistor R38, the other end of the resistor R38 is connected with a base of a triode Q3, the emitter of the triode Q3 is grounded, and a collector of the triode Q3 is connected with a resistor R39 and is connected into an HPEN pin of a chip U1;
one path of capacitor C17 is connected into MP3-R pin of chip U8, capacitor C17 is connected with resistor R26, another end of resistor R26 is connected with resistor R12, capacitor C16 and 2 pin of operational amplifier U2A, 3 pin of operational amplifier U2A is connected with resistor R13, 1 pin of operational amplifier U2A is connected with resistor R12, capacitor C16 and resistor R142, and is connected into HDR-IN pin of chip U1, and resistor R142 is connected into LineRO pin of channel CH 1;
one path of capacitor C18 is connected into MP3-L pin of chip U8, capacitor C18 is connected with resistor R27, the other end of resistor R27 is connected with resistor R14, capacitor C7 and 6 pins of operational amplifier U2B, 5 pins of operational amplifier U2B are connected with resistor R36, 7 pins of operational amplifier U2B are connected with resistor R14, capacitor C7 and resistor R50, and then connected into HDL-IN pin of chip U1, and resistor R50 is connected into LineLO pin of channel CH 1.
The signal processing circuit is provided with an AUX output circuit, an AUX input circuit and a chip U4, wherein the AUX output circuit and the AUX input circuit are respectively connected with the chip U4, the chip U4 is also connected with a memory SD1, and the signal processing circuit is used for processing Bluetooth and USB flash disk signals.
The input interface circuit is provided with a microphone input circuit, a musical instrument input circuit and a wireless microphone circuit, and the microphone input circuit, the musical instrument input circuit and the wireless microphone circuit are respectively connected with the chip U8.
The control display circuit is provided with a chip U9, and the chip U9 is connected with the chip U8.
The control display circuit is also provided with a display screen circuit.
A sound box is provided, which is provided with a front-back separation processing mobile sound control circuit.
In view of the above, after reading the present document, those skilled in the art should make various other corresponding changes without creative mental effort according to the technical scheme and the technical conception of the present utility model, which are all within the scope of the present utility model.
Claims (10)
1. The front-rear separation processing mobile sound control circuit is characterized by comprising a DSP processing circuit, a signal processing circuit, an earphone monitoring circuit, a power amplification processing circuit, a control display circuit and an input interface circuit, wherein the signal processing circuit, the earphone monitoring circuit, the power amplification processing circuit, the control display circuit and the input interface circuit are respectively connected with the DSP processing circuit; the power amplification processing circuit is used for processing the source signal to obtain a power amplification signal; the signal processing circuit is connected with the control display circuit.
2. The front-back separation processing mobile audio control circuit according to claim 1, wherein the DSP processing circuit is provided with a chip U8 and an OTG live broadcast circuit, and the OTG live broadcast circuit is connected with the chip U8 through an interface J5.
3. The front-to-back separation processing mobile audio control circuit of claim 2, wherein the OTG live broadcast circuit has a TYPEC interface.
4. A front-rear separation processing mobile sound control circuit according to claim 3, wherein the power amplification processing circuit is provided with a dual-channel power amplification circuit, a rear-stage power amplification circuit and a chip U5, the dual-channel power amplification circuit is connected with the chip U5, the rear-stage power amplification circuit is connected with the chip U8, and the chip U5 is connected with the chip U8.
5. The front-rear separation processing mobile audio control circuit according to claim 4, wherein the earphone monitoring circuit is provided with a chip U1.
6. The front-rear separation processing mobile audio control circuit according to claim 5, wherein the signal processing circuit is provided with an AUX output circuit, an AUX input circuit and a chip U4, the AUX output circuit and the AUX input circuit are respectively connected with the chip U4, the chip U4 is further connected with a memory SD1, and the signal processing circuit is used for processing bluetooth and usb signals.
7. The front-rear separation processing mobile audio control circuit according to claim 6, wherein the input interface circuit is provided with a microphone input circuit, an instrument input circuit, and a wireless microphone circuit, which are connected to the chip U8, respectively.
8. The front-rear separation processing mobile audio control circuit according to claim 7, wherein the control display circuit is provided with a chip U9, and the chip U9 is connected to the chip U8.
9. The front-rear separation processing mobile audio control circuit of claim 8, wherein the control display circuit is further provided with a display screen circuit.
10. A loudspeaker box, characterized by applying a front-to-back separation processing mobile sound control circuit according to any of the preceding claims 1-8.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202320404632.9U CN219555141U (en) | 2023-03-07 | 2023-03-07 | Front-back separation processing mobile sound control circuit and sound box thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202320404632.9U CN219555141U (en) | 2023-03-07 | 2023-03-07 | Front-back separation processing mobile sound control circuit and sound box thereof |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN219555141U true CN219555141U (en) | 2023-08-18 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202320404632.9U Active CN219555141U (en) | 2023-03-07 | 2023-03-07 | Front-back separation processing mobile sound control circuit and sound box thereof |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN219555141U (en) |
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2023
- 2023-03-07 CN CN202320404632.9U patent/CN219555141U/en active Active
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