CN219555014U - Camera data transmission device, vehicle-mounted camera system and vehicle - Google Patents

Abstract

The utility model discloses a camera data transmission device, a vehicle-mounted camera system and a vehicle. Wherein the device includes: the data acquisition module comprises a camera module and a serializer chip, and the data conversion module comprises a deserializer chip and a programmable logic device; the camera module is used for converting the collected first data into second data based on a D-PHY protocol and transmitting the second data to the serializer chip; the serializer chip is used for converting the second data into third data based on the A-PHY protocol and transmitting the third data to the deserializer chip; the deserializer chip is used for converting the third data into fourth data based on a D-PHY protocol and transmitting the fourth data to the programmable logic device; the programmable logic device is used for analyzing the fourth data to obtain fifth data and outputting the fifth data. The utility model solves the technical problems that the data transmission scheme of the related camera is poor in universality and low in efficiency, and the use requirement is difficult to meet.

Description

Camera data transmission device, vehicle-mounted camera system and vehicle

Technical Field

The utility model relates to the technical field of data transmission, in particular to a camera data transmission device, a vehicle-mounted camera system and a vehicle.

Background

With the development of science and technology, the level of intellectualization of automobiles is continuously improved, users ' requirements on automobiles are not only single vehicles, and automobiles become a ' third space ' integrating functions of leisure, entertainment, office and the like, and the intelligent automobile can provide multi-dimensional immersive experience and higher emotional interaction for all drivers and passengers in the whole period.

Cameras are a very important part of automobiles as vision systems of automobiles. Currently, cameras on automobiles are mainly used as AVM (Around View Monitor,360 ° panoramic view system), reverse image, autopilot, DMS (Driver Monitor System, driver monitoring system), CMS (Camera Monitor System, electronic rear view mirror), transparent a-pillar, driving record, etc., the resolution is mostly below 800W pixels, the data transmission relies on proprietary SerDes solutions, which are usually provided by a few suppliers, and the solutions of different suppliers are not yet compatible, which greatly limits the choice of technology and suppliers by automobile manufacturers, and the integration of solutions becomes expensive, complex and time-consuming. Meanwhile, with the application of more advanced sensors and electronic devices, a higher-resolution vehicle-mounted screen and a more powerful processor, the resolution of a vehicle-mounted camera is higher and higher, the functions are more diversified, the speed of the existing transmission scheme is lower, and the transmission bandwidth requirement of a high-resolution camera (1500W pixels) cannot be met.

At present, a camera data transmission scheme with high reliability, high transmission rate, long transmission distance, short development period and low cost is urgently needed to meet the data transmission requirement of a vehicle-mounted camera with high resolution in the future.

Disclosure of Invention

The embodiment of the utility model provides a camera data transmission device, a vehicle-mounted camera system and a vehicle, which are used for at least solving the technical problems that the related camera data transmission scheme is poor in universality and low in efficiency, and the use requirement is difficult to meet.

According to an aspect of an embodiment of the present utility model, there is provided a camera data transmission apparatus including: the device comprises at least one data acquisition module and a data conversion module, wherein the data acquisition module comprises a camera module and a serializer chip, the data conversion module comprises a deserializer chip and a programmable logic device, and the camera module is used for converting acquired first data into second data based on a D-PHY protocol and transmitting the second data to the serializer chip; the serializer chip is connected with the camera module and is used for converting the second data into third data based on an A-PHY protocol and transmitting the third data to the deserializer chip; the deserializer chip is connected with the serializer chip and is used for converting the third data into fourth data based on a D-PHY protocol and transmitting the fourth data to the programmable logic device; the programmable logic device is connected with the deserializer chip and is used for analyzing the fourth data to obtain fifth data and outputting the fifth data.

Optionally, the camera module includes: the camera sensor is used for acquiring first data; the first processing module is configured to convert the first data into sixth data based on the CSI2 protocol, generate a first control signal corresponding to the sixth data, and use the sixth data and the first control signal together as second data, where a type of the first control signal at least includes one of: GPIO signals, I2C signals; a first D-PHY interface, comprising: a first CSI2 interface for transmitting the sixth data to the serializer chip, and a first control signal interface for transmitting the first control signal to the serializer chip.

Optionally, the serializer chip includes: a second D-PHY interface, comprising: a second CSI2 interface for receiving sixth data, and a second control signal interface for receiving the first control signal; a second processing module for converting the sixth data and the first control signal into third data based on the a-PHY protocol; and the first A-PHY interface is used for transmitting the third data to the deserializer chip.

Optionally, the serializer chip and the deserializer chip are connected through a cable, wherein the type of the cable includes one of the following: coaxial cable, shielded twisted pair cable.

Optionally, the deserializer chip includes: at least one second a-PHY interface for receiving at least one set of third data; a third processing module, configured to convert the third data into fourth data based on the D-PHY protocol, where the fourth data includes at least one set of seventh data based on the CSI2 protocol and a second control signal corresponding to the seventh data, and a type of the second control signal includes at least one of: GPIO signals, I2C signals; a third D-PHY interface, comprising: at least one third CSI2 interface for transmitting at least one set of seventh data to the programmable logic device, and a third control signal interface for transmitting the second control signal to the programmable logic device.

Optionally, the programmable logic device includes: a fourth D-PHY interface, comprising: at least one fourth CSI2 interface for receiving at least one set of seventh data, and a fourth control signal interface for receiving a second control signal; the fourth processing module is configured to parse at least one set of seventh data and the second control signal to obtain fifth data, where a data protocol type of the fifth data at least includes one of the following: CSI2 protocol, PCIe protocol and DSI protocol; a fifth D-PHY interface comprising at least one of: a fifth CSI2 interface for outputting fifth data based on CSI2 protocol, a PCIe interface for outputting fifth data based on PCIe protocol, and a DSI interface for outputting fifth data based on DSI protocol.

Optionally, the programmable logic device further includes: the system comprises a fifth processing module and a dynamic random access memory, wherein the fifth processing module is used for storing fifth data into the dynamic random access memory for preprocessing to obtain eighth data, and the data protocol type of the eighth data at least comprises one of the following: CSI2 protocol, PCIe protocol, DSI protocol.

According to another aspect of the embodiment of the present utility model, there is also provided a vehicle-mounted camera system, including: the camera data transmission device and the upper computer are used for receiving fifth data output by the camera data transmission device.

Optionally, the upper computer includes: an in-vehicle host for managing the fifth data, and/or an in-vehicle display device for displaying the fifth data.

According to another aspect of an embodiment of the present utility model, there is also provided a vehicle including: the vehicle-mounted camera system.

In the embodiment of the utility model, the serial device chip is introduced at the transmitting end of the camera data transmission to convert the D-PHY protocol data into the A-PHY protocol data, the deserializer chip is introduced at the receiving end to convert the A-PHY protocol data back into the D-PHY protocol data, the A-PHY protocol standardized interface transmission of the camera data is realized on the basis of being compatible with the existing camera scheme, the universality is strong, the transmission rate based on the A-PHY protocol transmission is high, the packet error rate is low, the transmission distance of 15m is supported at most, the data, the control signals and the power supply can be transmitted through the same cable, the complexity and the cost of the wire harness design are reduced, the anti-electromagnetic interference capability is strong, the delay is low, the built-in function is safe, the requirement of long-distance transmission of the vehicle-mounted high-resolution camera data can be met, the technical problems of poor universality and low efficiency of the related camera data transmission scheme and difficulty in meeting the use requirement are effectively solved.

Drawings

The accompanying drawings, which are included to provide a further understanding of the utility model and are incorporated in and constitute a part of this specification, illustrate embodiments of the utility model and together with the description serve to explain the utility model and do not constitute a limitation on the utility model. In the drawings:

fig. 1 is a schematic structural view of an alternative camera data transmission device according to an embodiment of the present utility model;

FIG. 2 is a schematic diagram of an alternative data acquisition module according to an embodiment of the present utility model;

FIG. 3 is a schematic diagram of an alternative data conversion module according to an embodiment of the present utility model;

fig. 4 is a schematic structural diagram of an alternative vehicle-mounted camera system according to an embodiment of the present utility model.

Detailed Description

In order that those skilled in the art will better understand the present utility model, a technical solution in the embodiments of the present utility model will be clearly and completely described below with reference to the accompanying drawings in which it is apparent that the described embodiments are only some embodiments of the present utility model, not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the present utility model without making any inventive effort, shall fall within the scope of the present utility model.

It should be noted that the terms "first," "second," and the like in the description and the claims and drawings of the present utility model are used for distinguishing between similar objects and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used may be interchanged where appropriate such that the embodiments of the utility model described herein may be implemented in sequences other than those illustrated or otherwise described herein. Furthermore, the terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed but may include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus.

For a better understanding of the embodiments of the present utility model, some nouns or translations of terms that appear during the description of the embodiments of the present utility model are explained first as follows:

MIPI (Mobile Industry Processor Interface ) is a alliance established by ARM, nokia, ST, TI and other companies in 2003, and aims to standardize interfaces inside a mobile phone, such as a camera, a display screen interface, a radio frequency/baseband interface and the like, so that the complexity of mobile phone design is reduced, the design flexibility is improved, and currently more mature interfaces are applied with DSI (Display Serial Interface ) and CSI (Camera Serial Interface, imaging serial interface) and have more complex protocol structures.

Wherein the DSI defines a high-speed serial interface between the processor and the display module; the CSI defines a high-speed serial interface between the processor and the camera module; CSI2 is the second generation protocol standard of CSI, and its Physical Layer (Physical Layer) supports two protocol clusters, D-PHY and CPHY.

The D-PHY is used to provide a physical layer definition of DSI and CSI, which requires one clock channel and one or more data channels, all of which need to support high-speed data transmission and forward Escape mode, and the data channels are classified into two types, bi-directional and uni-directional, wherein bi-directional is semi-bi-directional. D-PHY can only implement short range physical layer transmission, and bridging solutions have to be used when long range transmission is required.

The a-PHY is a new generation of physical layer specifications, which is designed as an asymmetric data link in a point-to-point topology, with the capability of high-speed unidirectional data, embedded bidirectional control data, etc., and the capability of adding power transmission on the same cable, in order to provide data transmission physical layer support across the entire vehicle distance, and its main core advantages are: 1) Simpler system integration and lower cost; 2) The transmission distance is long and can reach 15 meters at maximum; 3) High performance, 5-gear transmission rates (2, 4, 8, 12 and 16 Gbps) and even 48Gbps and more in the future; 4) High reliability, ultra low 10 ^-19 Packet error rate, the unprecedented reliability is realized; 5) The system has high anti-interference capability, adopts a unique physical layer retransmission system, and has ultrahigh anti-interference capability.

PCIe (Peripheral Component Interconnect express, peripheral component interconnect), which is a high-speed serial computer expansion bus standard, belongs to high-speed serial point-to-point dual-channel high-bandwidth transmission, and the connected devices allocate exclusive channel bandwidths, do not share bus bandwidths, and support end-to-end reliability transmission, hot plug, QOS, and other functions.

The GPIO (General Porpose Intput Output, general input/output port) can control the output and input of the GPIO through software, is a common pin in popular terms, and can control the high and low levels of the pin to read or write the GPIO.

An I2C bus is a simple, bi-directional two-wire synchronous serial bus that requires only one data wire and one clock wire to transfer information between devices connected to the bus.

The present utility model will be described in detail with reference to specific embodiments and drawings.

Fig. 1 is a schematic structural diagram of an alternative camera data transmission device according to an embodiment of the present utility model, as shown in fig. 1, where the device includes: at least one data acquisition module 1 and a data conversion module 2, wherein the data acquisition module 1 comprises a camera module 11 and a serializer chip 12, and the data conversion module 2 comprises a deserializer chip 21 and a programmable logic device 22.

The camera module 11 is configured to convert the collected first data into second data based on a D-PHY protocol, and transmit the second data to the serializer chip 12;

the serializer chip 12 is connected with the camera module 11, and is used for converting the second data into third data based on the A-PHY protocol and transmitting the third data to the deserializer chip 21;

the deserializer chip 21 is connected to the serializer chip 12 for converting the third data into fourth data based on the D-PHY protocol and transmitting the fourth data to the programmable logic device 22;

the programmable logic device 22 is connected to the deserializer chip 21, and is configured to parse the fourth data to obtain fifth data, and output the fifth data.

As an alternative embodiment, the programmable logic device 22 may be a field programmable gate array (Field Programmable Gate Array, abbreviated as FPGA).

Fig. 2 is a schematic diagram of an alternative data acquisition module 1 according to an embodiment of the present utility model.

As shown in fig. 2, the camera module 11 in the data acquisition module 1 includes: a camera sensor 111, a first processing module 112, and a first D-PHY interface 113, wherein:

the camera sensor 111 is configured to collect first data, where the first data may be image data or video data.

The first processing module 112 is a specific logic circuit, and is configured to convert the first data into sixth data based on the CSI2 protocol, generate a first control signal corresponding to the sixth data, and use the sixth data and the first control signal together as second data, where a type of the first control signal at least includes one of the following: GPIO signals, I2C signals;

a first D-PHY interface 113, comprising: a first CSI2 interface 1131 for transmitting the sixth data to the serializer chip, and a first control signal interface 1132 for transmitting the first control signal to the serializer chip.

As shown in fig. 2, the serializer chip 12 in the data acquisition module 1 includes: a second D-PHY interface 121, a second processing module 122, and a first a-PHY interface 12, wherein:

a second D-PHY interface 121, comprising: a second CSI2 interface 1211 for receiving sixth data, and a second control signal interface 1212 for receiving the first control signal;

the second processing module 122 is a specific logic circuit, and is configured to convert the sixth data and the first control signal into third data based on the a-PHY protocol;

a first a-PHY interface 123 for transmitting the third data to the deserializer chip 21.

Taking a 1500W pixel 30fps camera as an example, the data format is generally RAW16, taking CSI protocol overhead and a-PHY protocol overhead into consideration, multiplying by 1.25 and 1.1 multiplying factors respectively, and the minimum transmission rate needs 1500 x 104 x 30 x 16 x 1.25 x 1.1=9.9 Gbps, i.e. the a-PHY can fully meet the transmission bandwidth requirement.

As an alternative embodiment, the connection between the serializer chip 12 and the deserializer chip 21 is made by a cable, wherein the type of cable includes one of the following: coaxial Cable (COAX Cable, COAX), shielded twisted pair Cable (Shielded Twisted Pair, STP). The two cables also belong to cables commonly used in the current camera data transmission scheme, namely, the scheme of the utility model does not need to replace the transmission cable, so that the cost can be saved, and the development time can be reduced.

Fig. 3 is a schematic diagram of an alternative data conversion module 2 according to an embodiment of the present utility model.

As shown in fig. 3, the deserializer chip 21 in the data conversion module 2 includes: at least one second a-PHY interface 211, a third processing module 212, and a third D-PHY interface 213, wherein:

at least one second a-PHY interface 211 for receiving at least one set of third data, that is, the deserializer chip 21 may receive data transmitted by a plurality of camera modules simultaneously by integrating a plurality of second a-PHY interfaces;

the third processing module 212 is a specific logic circuit, and is configured to convert the third data into fourth data based on the D-PHY protocol, where the fourth data includes at least one set of seventh data based on the CSI2 protocol and a second control signal corresponding to the seventh data, and the type of the second control signal at least includes one of the following: GPIO signals, I2C signals;

a third D-PHY interface 213, comprising: at least one third CSI2 interface 2131 for transmitting at least one set of seventh data to the programmable logic device 22, and a third control signal interface 2132 for transmitting second control signals to the programmable logic device 22. Corresponding to the plurality of second a-PHY interfaces, the deserializer chip 21 may meet the bandwidth requirement of simultaneous transmission of multiple sets of data by integrating the plurality of third CSI2 interfaces.

As shown in fig. 3, the programmable logic device 22 in the data conversion module 2 at least includes: a fourth D-PHY interface 221, a fourth processing module 222, and a fifth D-PHY interface 223, wherein:

a fourth D-PHY interface 221, comprising: at least one fourth CSI2 interface 2211 for receiving at least one set of seventh data, and a fourth control signal interface 2212 for receiving a second control signal;

the fourth processing module 222 is a specific logic circuit, and is configured to parse at least one set of seventh data and the second control signal to obtain fifth data, where a data protocol type of the fifth data includes at least one of the following: CSI2 protocol, PCIe protocol and DSI protocol;

the fifth D-PHY interface 223 includes at least one of: a fifth CSI2 interface 2231 for outputting fifth data based on CSI2 protocol, a PCIe interface 2232 for outputting fifth data based on PCIe protocol, and a DSI interface 2233 for outputting fifth data based on DSI protocol.

In practical application, in the programmable logic device 22, the fourth processing module 222 may parse the received data according to the use requirement, and then package the parsed data according to the format of the PCIe protocol, and output the parsed data through the PCIe interface 2232; only data transfer processing may be performed, that is, received data may be directly output through the fifth CSI2 interface 2231; of course, the received data may be parsed into a format of DSI protocol and output through DSI interface 2233.

Optionally, as shown in fig. 3, the programmable logic device further includes: a fifth processing module 224 and a dynamic random access memory (Dynamic Random Access Memory, DRAM) 225, wherein:

the fifth processing module 224 is a specific logic circuit, and is configured to store the fifth data into the dynamic random access memory 225 for preprocessing to obtain the eighth data, where a data protocol type of the eighth data at least includes one of the following: CSI2 protocol, PCIe protocol, DSI protocol. The preprocessed eighth data is also output from the corresponding interface under the fifth D-PHY interface 223.

Through the above embodiment, the programmable logic device 22 can perform data distribution through multiple protocols, so that the method has strong flexibility and can meet multiple application scenes.

In the embodiment of the utility model, the serial device chip is introduced at the transmitting end of the camera data transmission to convert the D-PHY protocol data into the A-PHY protocol data, the deserializer chip is introduced at the receiving end to convert the A-PHY protocol data back into the D-PHY protocol data, the A-PHY protocol standardized interface transmission of the camera data is realized on the basis of being compatible with the existing camera scheme, the universality is strong, the transmission rate based on the A-PHY protocol transmission is high, the packet error rate is low, the transmission distance of 15m is supported at most, the data, the control signals and the power supply can be transmitted through the same cable, the complexity and the cost of the wire harness design are reduced, the anti-electromagnetic interference capability is strong, the delay is low, the built-in function is safe, the requirement of long-distance transmission of the vehicle-mounted high-resolution camera data can be met, the technical problems of poor universality and low efficiency of the related camera data transmission scheme and difficulty in meeting the use requirement are effectively solved.

On the basis of the camera data transmission device, the embodiment of the utility model also provides a vehicle-mounted camera system, which mainly comprises: the camera data transmission device and the upper computer are used for receiving the fifth data output by the camera data transmission device.

Optionally, the upper computer includes: an in-vehicle host for managing the fifth data, and/or an in-vehicle display device for displaying the fifth data. The fifth data based On the CSI2 protocol or the PCIe protocol may be output to a System On Chip (SOC) of the vehicle-mounted host, and the fifth data based On the DSI protocol may be directly output to the vehicle-mounted display device for display.

Fig. 4 shows a schematic diagram of an alternative vehicle-mounted camera system, wherein the system includes two data acquisition modules 41 and 42, a data conversion module 43, a vehicle-mounted host 44, and a vehicle-mounted display device 45. The camera module 411 in the data acquisition module 41 transmits the acquired data to the serializer chip 412, and the serializer chip 412 converts the data into an a-PHY protocol format; the camera module 421 transmits the collected data to the serializer chip 422, and the serializer chip 422 converts the data into an a-PHY protocol format; the serializer chip 412 and the serializer chip 422 respectively transmit the data to the deserializer chip 431 in the data conversion module 43 through the COAX cable or the STP cable, and the deserializer chip 431 converts the data into a D-PHY protocol format and then transmits the data to the programmable logic device 432; the programmable logic device 432 performs operations such as parsing and preprocessing on the data, outputs the obtained data in PCIe protocol format and CSI2 protocol format to the system-in-vehicle chip 441 in the vehicle-mounted host 44, and outputs the obtained data in DSI protocol format to the vehicle-mounted display device 45 for display.

On the basis of the vehicle-mounted camera system, the embodiment of the utility model also provides a vehicle, and the vehicle is provided with the vehicle-mounted camera system.

In the several embodiments provided in the present utility model, it should be understood that the disclosed technology may be implemented in other manners. The above-described embodiments of the apparatus are merely exemplary, and the division of units may be a logic function division, and there may be another division manner in actual implementation, for example, multiple units or components may be combined or integrated into another system, or some features may be omitted, or not performed. Alternatively, the coupling or direct coupling or communication connection shown or discussed with each other may be through some interfaces, units or modules, or may be in electrical or other forms.

The units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed over a plurality of units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

In addition, each functional unit in the embodiments of the present utility model may be integrated in one processing unit, or each unit may exist alone physically, or two or more units may be integrated in one unit. The integrated units may be implemented in hardware or in software functional units.

The foregoing is merely a preferred embodiment of the present utility model and it should be noted that modifications and adaptations to those skilled in the art may be made without departing from the principles of the present utility model, which are intended to be comprehended within the scope of the present utility model.

Claims (10)

1. A camera data transmission device, comprising: at least one data acquisition module and a data conversion module, wherein the data acquisition module comprises a camera module and a serializer chip, the data conversion module comprises a deserializer chip and a programmable logic device, wherein,

the camera module is used for converting the collected first data into second data based on a D-PHY protocol and transmitting the second data to the serializer chip;

the serializer chip is connected with the camera module and is used for converting the second data into third data based on an A-PHY protocol and transmitting the third data to the deserializer chip;

the deserializer chip is connected with the serializer chip and is used for converting the third data into fourth data based on a D-PHY protocol and transmitting the fourth data to the programmable logic device;

the programmable logic device is connected with the deserializer chip and is used for analyzing the fourth data to obtain fifth data and outputting the fifth data.

2. The device according to claim 1, wherein the camera module comprises:

the camera sensor is used for acquiring the first data;

the first processing module is configured to convert the first data into sixth data based on a CSI2 protocol, generate a first control signal corresponding to the sixth data, and use the sixth data and the first control signal together as the second data, where a type of the first control signal at least includes one of: GPIO signals, I2C signals;

a first D-PHY interface, comprising: a first CSI2 interface for transmitting the sixth data to the serializer chip, and a first control signal interface for transmitting the first control signal to the serializer chip.

3. The apparatus of claim 2, wherein the serializer chip includes:

a second D-PHY interface, comprising: a second CSI2 interface for receiving the sixth data, and a second control signal interface for receiving the first control signal;

a second processing module for converting the sixth data and the first control signal into the third data based on an a-PHY protocol;

and the first A-PHY interface is used for transmitting the third data to the deserializer chip.

4. The apparatus of claim 1, wherein the device comprises a plurality of sensors,

the serializer chip and the deserializer chip are connected through a cable, wherein the type of the cable comprises one of the following: coaxial cable, shielded twisted pair cable.

5. The apparatus of claim 1, wherein the deserializer chip comprises:

at least one second a-PHY interface for receiving at least one set of the third data;

a third processing module, configured to convert the third data into the fourth data based on the D-PHY protocol, where the fourth data includes at least one set of seventh data based on the CSI2 protocol and a second control signal corresponding to the seventh data, and a type of the second control signal includes at least one of: GPIO signals, I2C signals;

a third D-PHY interface, comprising: at least one third CSI2 interface for transmitting at least one set of the seventh data to the programmable logic device, and a third control signal interface for transmitting the second control signal to the programmable logic device.

6. The apparatus of claim 5, wherein the programmable logic device comprises:

a fourth D-PHY interface, comprising: at least one fourth CSI2 interface for receiving at least one set of the seventh data, and a fourth control signal interface for receiving the second control signal;

a fourth processing module, configured to parse at least one set of the seventh data and the second control signal to obtain the fifth data, where a data protocol type of the fifth data at least includes one of the following: CSI2 protocol, PCIe protocol and DSI protocol;

a fifth D-PHY interface comprising at least one of: a fifth CSI2 interface for outputting fifth data based on CSI2 protocol, a PCIe interface for outputting fifth data based on PCIe protocol, and a DSI interface for outputting fifth data based on DSI protocol.

7. The apparatus of claim 6, wherein the programmable logic device further comprises: a fifth processing module and a dynamic random access memory, wherein,

the fifth processing module is configured to store the fifth data into the dynamic random access memory for preprocessing to obtain eighth data, where a data protocol type of the eighth data at least includes one of the following: CSI2 protocol, PCIe protocol, DSI protocol.

8. A vehicle-mounted camera system, comprising:

the camera data transmission device of any one of claims 1 to 7;

and the upper computer is used for receiving the fifth data output by the camera data transmission device.

9. The system of claim 8, wherein the system further comprises a controller configured to control the controller,

the upper computer includes: and the vehicle-mounted host is used for managing the fifth data and/or the vehicle-mounted display equipment is used for displaying the fifth data.

10. A vehicle, characterized by comprising: the in-vehicle camera system of claim 8 or claim 9.