CN219512557U - CP voltage clamping circuit - Google Patents
CP voltage clamping circuit Download PDFInfo
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- CN219512557U CN219512557U CN202320309975.7U CN202320309975U CN219512557U CN 219512557 U CN219512557 U CN 219512557U CN 202320309975 U CN202320309975 U CN 202320309975U CN 219512557 U CN219512557 U CN 219512557U
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- 239000013256 coordination polymer Substances 0.000 title claims abstract 15
- 230000000087 stabilizing effect Effects 0.000 claims abstract description 40
- 238000010586 diagram Methods 0.000 description 8
- 238000004891 communication Methods 0.000 description 4
- 230000008878 coupling Effects 0.000 description 3
- 238000010168 coupling process Methods 0.000 description 3
- 238000005859 coupling reaction Methods 0.000 description 3
- 238000000034 method Methods 0.000 description 3
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000003993 interaction Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
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Abstract
The utility model discloses a CP voltage clamping circuit, which comprises a first resistor R1, a first clamping unit and a second clamping unit; one end of the first resistor R1 is connected with a CP signal, the other end of the first resistor R1 is sequentially connected with the first clamping unit and the second clamping unit, the first clamping unit comprises a diode D1, a three-terminal voltage stabilizing chip U1, a second resistor R2 and a third resistor R3, the second clamping unit comprises a diode D2, a three-terminal voltage stabilizing chip U2, a fourth resistor R4 and a fifth resistor R5, and further comprises a sixth resistor R6, one end of the sixth resistor R6 is connected with a connecting node between the three-terminal voltage stabilizing chip U2 and the fourth resistor R4, and the other end of the sixth resistor R6 outputs the CP signal. The CP voltage clamping circuit provided by the utility model can clamp the voltage of the CP signal within the required range through a simple circuit, and has low cost and high precision.
Description
Technical Field
The utility model belongs to the field of integrated circuits, and particularly relates to a CP voltage clamping circuit.
Background
Along with the high-speed development of technology, new energy automobiles are more and more, and therefore, the demand for charging piles is more and more vigorous, and in the working process of the charging piles, in order to monitor the interaction state between the charging piles and the electric vehicle, the voltage of a CP (control pilot) signal is usually required to be detected, so that the voltage of the CP signal is ensured to be required to output +12v or-12v in the pilot control.
In the prior art, the voltage of the CP signal is mostly maintained by adopting a DC/DC circuit or an independent DC/DC module, which increases the complexity and cost of the circuit, and deteriorates the performance of conductive EMC (electromagnetic compatibility), so how to ensure the voltage accuracy of the CP signal by a simple circuit is a problem to be solved.
Disclosure of Invention
The utility model provides a CP voltage clamping circuit which is used for solving the problem of ensuring the voltage precision of a CP signal through a simple circuit.
In order to solve the technical problems, the utility model provides a CP voltage clamping circuit, which comprises a first resistor R1, a first clamping unit and a second clamping unit; one end of the first resistor R1 is connected with a CP signal, and the other end of the first resistor R1 is sequentially connected with the first clamping unit and the second clamping unit;
the first clamping unit comprises a diode D1, a three-terminal voltage stabilizing chip U1, a second resistor R2 and a third resistor R3; the anode of the diode D1 is connected with the other end of the first resistor R1, the cathode of the diode D1 is connected to the input end of the three-terminal voltage stabilizing chip U1, and the second resistor R2 is arranged at the two ends of the diode D1 and the three-terminal voltage stabilizing chip U1 in parallel; one end of the third resistor R3 is connected with a connecting node between the output end of the three-terminal voltage stabilizing chip U1 and the second resistor R2, and the other end of the third resistor R3 and the grounding end of the three-terminal voltage stabilizing chip U1 are grounded;
the second clamping unit comprises a diode D2, a three-terminal voltage stabilizing chip U2, a fourth resistor R4 and a fifth resistor R5; the three-terminal voltage stabilizing chip U2 is arranged at two ends of the fourth resistor R4 in parallel, the input end of the three-terminal voltage stabilizing chip U2 is connected to a connecting node between the diode D1 and the second resistor R2, the grounding end of the three-terminal voltage stabilizing chip U2 is connected with the cathode of the diode D2, one end of the fifth resistor R5 is connected with a connecting node between the output end of the three-terminal voltage stabilizing chip U2 and the fourth resistor R4, and the other end of the fifth resistor R5 and the anode of the diode D2 are grounded;
the three-terminal voltage stabilizing circuit further comprises a sixth resistor R6, one end of the sixth resistor R6 is connected to a connecting node between the three-terminal voltage stabilizing chip U2 and the fourth resistor R4, and the other end of the sixth resistor R6 outputs the CP signal.
Further, when the input voltage at the end of the first resistor R1 is equal to or greater than 12V, the diode D1 is turned on, and the diode D2 is turned off, a clamping voltage Vmid between the first resistor R1 and the sixth resistor R6 1 ＝2.5V*(R1+R2)/R2。
Further, when the ratio of the resistance of the second resistor R2 to the resistance of the third resistor R3 is 3.8:1, the clamping voltage between the first resistor R1 and the sixth resistor R6 is 11.2V to 12.8V.
Further, when the input voltage at the end of the first resistor R1 is less than or equal to 12V, the diode D1 is turned off, and the diode D2 is turned on, a clamping voltage Vmid between the first resistor R1 and the sixth resistor R6 2 ＝2.5V*(R4+R5)/R4。
Further, when the ratio of the resistance of the fourth resistor R4 to the resistance of the fifth resistor R5 is 1: and 3.8, the clamping voltage between the first resistor R1 and the sixth resistor R6 is-11.2 to-12.8V.
Further, the three-terminal voltage stabilizing chip U1 and the three-terminal voltage stabilizing chip U2 are three-terminal adjustable 431 voltage stabilizing chips.
Further, the resistance value of the sixth resistor R6 is 1kΩ.
Compared with the prior art, the CP voltage clamping circuit provided by the utility model has the following beneficial effects:
according to the CP voltage clamping circuit provided by the utility model, the positive voltage of +12V is clamped between 11.2V and 12.8V by the first clamping unit, the negative voltage of-12V is clamped between-11.2 and-12.8V by the second clamping unit, and the voltage of a CP signal can be clamped in a required range by a simple circuit, so that the cost is low and the precision is high.
Drawings
In order to more clearly illustrate the embodiments of the present utility model or the technical solutions of the prior art, the drawings that are required in the embodiments or the description of the prior art will be briefly described, and it is apparent that the drawings in the following description are only some embodiments of the present utility model, but not all embodiments, and other drawings obtained according to these drawings without inventive effort are all within the scope of the present utility model.
Fig. 1 is a schematic diagram of a CP voltage clamp circuit according to an embodiment of the present utility model;
fig. 2 is a circuit diagram of a first clamping unit in a CP voltage clamping circuit according to an embodiment of the present utility model;
FIG. 3 is a circuit diagram of a separate clamp of a second clamp unit in a CP voltage clamp circuit according to an embodiment of the present utility model;
FIG. 4 is a schematic diagram of a first embodiment of a CP voltage clamp circuit according to an embodiment of the present utility model;
fig. 5 is a schematic diagram of a second embodiment of a CP voltage clamp circuit according to an embodiment of the present utility model.
Detailed Description
In order to make the objects, technical solutions and advantages of the present utility model more apparent, the present utility model will be described in further detail with reference to the accompanying drawings and specific embodiments. It should be understood that the specific embodiments described herein are for purposes of illustration only and are not intended to limit the scope of the utility model.
In order that the present disclosure may be more fully described and fully understood, the following description is provided by way of illustration of embodiments and specific examples of the present utility model; this is not the only form of practicing or implementing the utility model as embodied. The description covers the features of the embodiments and the method steps and sequences for constructing and operating the embodiments. However, other embodiments may be utilized to achieve the same or equivalent functions and sequences of steps. All other embodiments, which can be made by those skilled in the art based on the embodiments of the utility model without making any inventive effort, are intended to be within the scope of the utility model.
It should be noted that the terms "first," "second," and the like in the description and the claims of the present utility model and the above figures are used for distinguishing between similar objects and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used may be interchanged where appropriate such that the embodiments of the utility model described herein may be implemented in sequences other than those illustrated or otherwise described herein.
In the description of the embodiments of the present utility model, unless otherwise indicated, "/" means or, for example, a/B may represent a or B; the text "and/or" is merely an association relation describing the associated object, and indicates that three relations may exist, for example, a and/or B may indicate: in addition, in the description of the embodiments of the present utility model, "plural" means two or more, and other words and the like, it is to be understood that the preferred embodiments described herein are for illustration and explanation of the present utility model only, and are not intended to limit the present utility model, and embodiments of the present utility model and features in the embodiments may be combined with each other without conflict.
Referring to fig. 1-5, in order to solve the problem of how to ensure the voltage accuracy of the CP signal by a simple circuit, an embodiment of the present utility model provides a CP voltage clamping circuit. As shown in fig. 1, a schematic structural diagram of a CP voltage clamping circuit according to an embodiment of the present utility model includes a first resistor R1, a first clamping unit, and a second clamping unit, where one end of the first resistor R1 is connected to a CP signal, and the other end of the first resistor R1 is sequentially connected to the first clamping unit and the second clamping unit.
In the embodiment of the utility model, the first clamping unit comprises a diode D1, a three-terminal voltage stabilizing chip U1, a second resistor R2 and a third resistor R3; specifically, the positive pole of diode D1 is connected with the other end of first resistance R1, and diode D1's negative pole inserts three terminal steady voltage chip U1's input, and the parallelly connected both ends that set up at above-mentioned diode D1 and three terminal steady voltage chip U1 of second resistance R2, and the one end of third resistance R3 is connected with the connected node between three terminal steady voltage chip U1 output and the second resistance R2, and the other end of third resistance R3 all connects to ground with three terminal steady voltage chip U1's ground terminal.
Further, the second clamping unit comprises a diode D2, a three-terminal voltage stabilizing chip U2, a fourth resistor R4 and a fifth resistor R5; the three-terminal voltage stabilizing chip U2 is arranged at two ends of the fourth resistor R4 in parallel, the input end of the three-terminal voltage stabilizing chip U2 is connected with a connecting node between the diode D1 and the second resistor R2, and the grounding end of the three-terminal voltage stabilizing chip U2 is connected with the cathode of the diode D2; one end of the fifth resistor R5 is connected with a connecting node between the output end of the three-terminal voltage stabilizing chip U2 and the fourth resistor R4, and the other end of the fifth resistor R5 and the anode of the diode D2 are grounded.
Further, the CP signal clamping circuit further includes a sixth resistor R6, specifically, one end of the sixth resistor R6 is connected to a connection node between the three-terminal voltage stabilizing chip U2 and the fourth resistor R4, and the other end of the sixth resistor R6 is configured to output a CP signal.
In the utility model, because the existing alternating-current charging pile and the European and American non-vehicle charging machine both need CP signals as control guide signals, the vehicle determines how much current is charged by identifying the duty ratio of the CP signals, and the European and American non-vehicle charging machine carries out carrier communication by the CP signals so as to realize communication between the vehicle and the charging pile, the voltage requirement precision of the CP signals is higher, the voltage of the CP signals needs to output +12V or-12V voltage in guide control, and the voltage of the CP signals needs to be clamped when PWM (Pulsewidthmodulation wave) waves are sent or PWM waves are not sent, in practical application, the voltage of +12V needs to be clamped between 11.2V and 12.8V, and the voltage of-12V needs to be clamped between-11.2 and-12.8V.
Referring to fig. 2, in a circuit diagram of a CP voltage clamping circuit provided by the embodiment of the present utility model, when an input voltage at a terminal of a first resistor R1 is equal to or greater than 12V, a diode D1 is turned on, a diode D2 is turned off, and a ratio of a resistance value of a second resistor R2 to a resistance value of a third resistor R3 is adjusted to be about 3.8:1, the clamping voltage between the first resistor R1 and the sixth resistor R6 can be 11.2V-12.8V, thereby meeting the condition that the clamping voltage between the first resistor R1 and the sixth resistor R6 is near +12V, and the clamping voltage between the specific first resistor R1 and the sixth resistor R6
Vmid1＝2.5V*(R1+R2)/R2。
Referring to fig. 3, in a circuit diagram of a CP voltage clamping circuit provided by the embodiment of the present utility model, when the input voltage at the end of the first resistor R1 is less than or equal to 12V, the diode D1 is turned off, the diode D2 is turned on, and the ratio of the resistance values of the fourth resistor R4 and the fifth resistor R5 is adjusted to be 1:3.8, the clamping voltage between the first resistor R1 and the sixth resistor R6 can be between-11.2 and-12.8V, thereby meeting the condition that the clamping voltage between the first resistor R1 and the sixth resistor R6 is near-12V, and the specific clamping voltage Vmid between the first resistor R1 and the sixth resistor R6 2 ＝2.5V*(R4+R5)/R4。
Further, in the present utility model, the diode D1 and the diode D2 are preferably configured as anti-reflection diodes, the three-terminal voltage stabilizing chip U1 and the three-terminal voltage stabilizing chip U2 are preferably configured as three-terminal adjustable 431 voltage stabilizing chips, and the R6 is configured as a resistor with a fixed resistance value of 1kΩ.
Referring to fig. 4, in a first embodiment of a CP voltage clamping circuit provided by the present utility model, when the input of the end of the first resistor R1 is a PWM wave of +13.536, the positive voltage of the output channel Vout is clamped at +12.1v, that is, the clamping voltage between the first resistor R1 and the sixth resistor R6 is +12.1v, so as to meet the requirement of clamping the voltage of +12v between 11.2V and 12.8v; referring to fig. 5, in a second embodiment of the CP voltage clamping circuit provided by the present utility model, when the input of the end of the first resistor R1 is PWM of-13.535V, the negative voltage of the output channel Vout is clamped at-12.1V, that is, the clamping voltage between the first resistor R1 and the sixth resistor R6 is-12.1V, so as to meet the requirement of clamping the voltage of-12V between-11.2 and-12.8V, which further proves the feasibility of the CP signal clamping circuit provided by the present utility model.
According to the CP voltage clamping circuit provided by the utility model, the positive voltage of +12V is clamped between 11.2V and 12.8V by the first clamping unit, the negative voltage of-12V is clamped between-11.2 and-12.8V by the second clamping unit, and the voltage of a CP signal can be clamped in a required range by a simple circuit, so that the cost is low and the precision is high.
In the several embodiments provided in the present utility model, it should be understood that the disclosed apparatus, device and method may be implemented in other manners. For example, the apparatus embodiments described above are merely illustrative, e.g., the division of elements is merely a logical functional division, and there may be additional divisions of actual implementation, e.g., multiple elements or components may be combined or integrated into another system, or some features may be omitted, or not performed. Alternatively, the coupling or direct coupling or communication connection shown or discussed with each other may be an indirect coupling or communication connection via some interfaces, devices or units, which may be in electrical, mechanical or other form.
The foregoing description of the preferred embodiments of the utility model is not intended to be limiting, but rather is intended to cover all modifications, equivalents, and alternatives falling within the spirit and principles of the utility model.
Claims (7)
1. The CP voltage clamping circuit is characterized by comprising a first resistor R1, a first clamping unit and a second clamping unit; one end of the first resistor R1 is connected with a CP signal, and the other end of the first resistor R1 is sequentially connected with the first clamping unit and the second clamping unit;
the first clamping unit comprises a diode D1, a three-terminal voltage stabilizing chip U1, a second resistor R2 and a third resistor R3; the anode of the diode D1 is connected with the other end of the first resistor R1, the cathode of the diode D1 is connected to the input end of the three-terminal voltage stabilizing chip U1, and the second resistor R2 is arranged at the two ends of the diode D1 and the three-terminal voltage stabilizing chip U1 in parallel; one end of the third resistor R3 is connected with a connecting node between the output end of the three-terminal voltage stabilizing chip U1 and the second resistor R2, and the other end of the third resistor R3 and the grounding end of the three-terminal voltage stabilizing chip U1 are grounded;
the second clamping unit comprises a diode D2, a three-terminal voltage stabilizing chip U2, a fourth resistor R4 and a fifth resistor R5; the three-terminal voltage stabilizing chip U2 is arranged at two ends of the fourth resistor R4 in parallel, the input end of the three-terminal voltage stabilizing chip U2 is connected to a connecting node between the diode D1 and the second resistor R2, the grounding end of the three-terminal voltage stabilizing chip U2 is connected with the cathode of the diode D2, one end of the fifth resistor R5 is connected with a connecting node between the output end of the three-terminal voltage stabilizing chip U2 and the fourth resistor R4, and the other end of the fifth resistor R5 and the anode of the diode D2 are grounded;
the three-terminal voltage stabilizing circuit further comprises a sixth resistor R6, one end of the sixth resistor R6 is connected to a connecting node between the three-terminal voltage stabilizing chip U2 and the fourth resistor R4, and the other end of the sixth resistor R6 outputs the CP signal.
2. A CP voltage clamp circuit as defined in claim 1, wherein,
when the input voltage at the end of the first resistor R1 is more than or equal to 12V, the diode D1 is turned on, and the diode D2 is turned off, the clamping voltage Vmid between the first resistor R1 and the sixth resistor R6 1 ＝2.5V*(R1+R2)/R2。
3. The CP voltage clamp circuit of claim 2 wherein when the ratio of the resistance of said second resistor R2 to said third resistor R3 is 3.8:1, the clamping voltage between the first resistor R1 and the sixth resistor R6 is 11.2V to 12.8V.
4. A CP voltage clamp circuit as defined in claim 1, wherein,
when the input voltage at the end of the first resistor R1 is less than or equal to 12V, the diode D1 is turned off, and the diode D2 is turned on, the clamping voltage Vmid between the first resistor R1 and the sixth resistor R6 2 ＝2.5V*(R4+R5)/R4。
5. The CP voltage clamp circuit of claim 4 wherein when the ratio of the resistance of said fourth resistor R4 to said fifth resistor R5 is 1: and 3.8, the clamping voltage between the first resistor R1 and the sixth resistor R6 is-11.2 to-12.8V.
6. The CP voltage clamp circuit of claim 1 wherein said three terminal regulator die U1 and said three terminal regulator die U2 are both three terminal adjustable 431 regulator die.
7. The CP voltage clamp circuit of claim 1 wherein said sixth resistor R6 has a resistance of 1kΩ.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202320309975.7U CN219512557U (en) | 2023-02-24 | 2023-02-24 | CP voltage clamping circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202320309975.7U CN219512557U (en) | 2023-02-24 | 2023-02-24 | CP voltage clamping circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN219512557U true CN219512557U (en) | 2023-08-11 |
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ID=87525348
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202320309975.7U Active CN219512557U (en) | 2023-02-24 | 2023-02-24 | CP voltage clamping circuit |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN219512557U (en) |
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2023
- 2023-02-24 CN CN202320309975.7U patent/CN219512557U/en active Active
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