CN219496499U - Bus voltage acquisition and monitoring circuit - Google Patents
Bus voltage acquisition and monitoring circuit Download PDFInfo
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- CN219496499U CN219496499U CN202320072560.2U CN202320072560U CN219496499U CN 219496499 U CN219496499 U CN 219496499U CN 202320072560 U CN202320072560 U CN 202320072560U CN 219496499 U CN219496499 U CN 219496499U
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Abstract
The utility model relates to a bus voltage acquisition and monitoring circuit, which comprises a main control chip, a step-down amplifying circuit and a comparison circuit, wherein the step-down amplifying circuit is used for generating a voltage small signal, the input end of the bus voltage is connected with the input end of the step-down amplifying circuit, the output end of the step-down amplifying circuit is connected with the main control chip, the comparison circuit is connected with the step-down amplifying circuit in parallel, and the output end of the comparison circuit is connected with the main control chip; the comparison circuit comprises a first comparator, a second comparator and a threshold resistor, one end of the threshold resistor is connected with the output end of the buck amplifying circuit, the input end of the first comparator and the input end of the second comparator are respectively connected with the threshold resistor, and the output end of the first comparator and the output end of the second comparator are both connected with the main control chip. And when the motor stalls due to undervoltage of the bus voltage, the main control chip can make corresponding compensation actions according to the fault notification software.
Description
Technical Field
The utility model relates to the field of circuit detection, in particular to a bus voltage acquisition and monitoring circuit.
Background
In the current hybrid system, the schemes for collecting bus voltage by a motor controller mainly comprise two types: one is to calculate the bus voltage by using an isolation amplifier and a differential circuit; and the other is to collect bus voltage by adopting the coordination of a Hall sensor and a conditioning circuit. The traditional technology in the market only has a single function of sampling voltage, and does not comprise monitoring functions such as undervoltage, overvoltage and the like. When overvoltage and undervoltage conditions of bus voltage occur, and no monitoring feedback means exists, the IGBT is possibly damaged because the IGBT is not turned off in time, and the normal operation of the automobile is affected.
Disclosure of Invention
The utility model provides a bus voltage acquisition and monitoring circuit, which aims to solve the problem that overvoltage or undervoltage condition detection is lacking in the prior art.
The utility model provides a bus voltage acquisition and monitoring circuit, which comprises a main control chip, a buck amplification circuit and a comparison circuit, wherein the buck amplification circuit is used for generating a voltage small signal, the bus voltage input end is connected with the input end of the buck amplification circuit, the output end of the buck amplification circuit is connected with the main control chip, the comparison circuit is connected with the buck amplification circuit in parallel, and the output end of the comparison circuit is connected with the main control chip; the comparison circuit comprises a first comparator for detecting whether undervoltage, a second comparator for detecting whether overvoltage and a threshold resistor for adjusting a detection threshold, one end of the threshold resistor is connected with the output end of the buck amplification circuit, the input end of the first comparator and the input end of the second comparator are respectively connected with the threshold resistor, and the output end of the first comparator and the output end of the second comparator are both connected with the main control chip and are used for transmitting the flag bit of the overvoltage or the undervoltage.
As a further improvement of the utility model, the buck amplifying circuit comprises a resistor R1, a resistor R2, an isolation amplifier and a differential amplifier, wherein one end of the resistor R1 is connected with the bus voltage input end, the other end of the resistor R1 is connected with the vin+ pin of the isolation amplifier, one end of the resistor R2 is connected with the other end of the resistor R1, the other end of the resistor R2 is connected with the Vin-pin of the isolation amplifier, the other end of the resistor R2 is grounded, the positive pin of the differential amplifier is connected with the Vout+ pin of the isolation amplifier, and the negative pin of the differential amplifier is connected with the Vout-pin of the isolation amplifier.
As a further improvement of the utility model, the output pin of the differential amplifier is connected with the main control chip.
As a further improvement of the utility model, the threshold resistor comprises a resistor R3, a resistor R4 and a resistor R5, wherein one end of the resistor R3 is connected with the output pin of the differential amplifier, one end of the resistor R4 is connected with the other end of the resistor R3, one end of the resistor R5 is connected with the other end of the resistor R4, and the other end of the resistor R5 is grounded.
As a further improvement of the utility model, the positive pin of the first comparator is connected with the other end of the resistor R3, and the negative pin of the second comparator is connected with the other end of the resistor R4.
As a further development of the utility model, both the negative leg of the first comparator and the positive leg of the second comparator are connected to a reference voltage VT.
The beneficial effects of the utility model are as follows: the circuit design of undervoltage and overvoltage is newly added in the existing circuit, fault signals are fed back to the main control chip, the damage of the IGBT due to overhigh voltage is effectively prevented when the overvoltage occurs, and when the motor stalls due to undervoltage of bus voltage, the main control chip can make corresponding compensation actions according to the fault notification software, so that the influence on the normal operation of the circuit is avoided.
Drawings
Fig. 1 is a circuit diagram of the present utility model.
Detailed Description
The present utility model will be described in further detail with reference to the drawings and examples, in order to make the objects, technical solutions and advantages of the present utility model more apparent. It should be noted that the words "front", "back", "left", "right", "upper" and "lower" used in the following description refer to directions in the drawings, and the words "bottom" and "top", "inner" and "outer" refer to directions toward or away from, respectively, the geometric center of a particular component.
As shown in fig. 1, the utility model provides a bus voltage acquisition and monitoring circuit, which comprises a main control chip, a buck amplification circuit and a comparison circuit, wherein the buck amplification circuit is used for generating a voltage small signal, the bus voltage input end is connected with the input end of the buck amplification circuit, the output end of the buck amplification circuit is connected with the main control chip, the comparison circuit is connected with the buck amplification circuit in parallel, and the output end of the comparison circuit is connected with the main control chip; the comparison circuit comprises a first comparator for detecting whether undervoltage, a second comparator for detecting whether overvoltage and a threshold resistor for adjusting a detection threshold, one end of the threshold resistor is connected with the output end of the buck amplification circuit, the input end of the first comparator and the input end of the second comparator are respectively connected with the threshold resistor, and the output end of the first comparator and the output end of the second comparator are both connected with the main control chip and are used for transmitting the flag bit of the overvoltage or the undervoltage.
As an embodiment of the utility model, the buck amplifying circuit comprises a resistor R1, a resistor R2, an isolation amplifier and a differential amplifier, wherein one end of the resistor R1 is connected with the busbar voltage input end, the other end of the resistor R1 is connected with the vin+ pin of the isolation amplifier, one end of the resistor R2 is connected with the other end of the resistor R1, the other end of the resistor R2 is connected with the Vin-pin of the isolation amplifier, the other end of the resistor R2 is grounded, the positive pin of the differential amplifier is connected with the vout+ pin of the isolation amplifier, and the negative pin of the differential amplifier is connected with the Vout-pin of the isolation amplifier.
As another embodiment of the present utility model, the output pin of the differential amplifier is connected with the main control chip.
As another embodiment of the present utility model, the threshold resistor includes a resistor R3, a resistor R4, and a resistor R5, one end of the resistor R3 is connected to the output pin of the differential amplifier, one end of the resistor R4 is connected to the other end of the resistor R3, one end of the resistor R5 is connected to the other end of the resistor R4, and the other end of the resistor R5 is grounded.
As another embodiment of the present utility model, the positive pin of the first comparator is connected to the other end of the resistor R3, and the negative pin of the second comparator is connected to the other end of the resistor R4.
As another embodiment of the present utility model, the negative pin of the first comparator and the positive pin of the second comparator are both connected to the reference voltage VT.
The utility model provides a bus voltage acquisition and monitoring circuit, which is characterized in that a circuit design of undervoltage and overvoltage is newly added in the existing circuit, a fault signal is fed back to a main control chip, the damage of an IGBT (insulated gate bipolar transistor) due to over-high voltage is effectively prevented when the overvoltage occurs, and when a motor stalls due to the undervoltage of the bus voltage, the main control chip can make corresponding compensation actions according to fault notification software, so that the normal operation of the circuit is prevented from being influenced.
In the circuit, the resistor R1 is used as a voltage dividing resistor, the bus voltage input end inputs the detection voltage and then carries out voltage dividing treatment, then the detection voltage is input into the isolation amplifier to output the bus voltage after voltage reduction, and the signal is amplified by the differential amplifier to form a bus voltage small signal. And the bus voltage small signal output from the step-down amplifying circuit is respectively used as one input signal of the first comparator and the second comparator, and the other input signal of the first comparator and the second comparator share one reference voltage VT. The three series resistors can be provided with overvoltage and undervoltage thresholds, and the resistance values of the resistor R3, the resistor R4 and the resistor R5 can be adjusted according to the requirements of different lines; and then the two comparators output the flag bits of the overvoltage and the undervoltage of the bus voltage, when the bus voltage small signal is smaller than the undervoltage threshold value, the first comparator outputs a low-level signal to the main control chip, and if the bus voltage small signal is larger than the overvoltage threshold value, the second comparator outputs a low-level signal to the main control chip, otherwise, the bus voltage is normal. The first comparator and the second comparator can detect the overvoltage and undervoltage conditions of the bus voltage, and timely feed the overvoltage and undervoltage conditions back to the main control chip, and the normal operation of the whole circuit is ensured through subsequent software and hardware operation. Wherein undervoltage threshold = VT, (r3+r4+r5)/(r4+r5); overvoltage threshold = VT (r3+r4+r5)/R5.
The detection process of this scheme is described below by way of a specific example. Assuming that the bus voltage is 500-800V, when the bus voltage is 500V, r1=480kΩ, r2=100deg.Ω, and after the voltage is divided by the resistor R1, the input voltage of vin+ pin of the isolation amplifier is 500 x 100/(480000+100) =0.104V. When the bus voltage is 800V, the input voltage of the vin+ pin of the isolation amplifier is 0.167V. Assuming that the gain multiple of the isolation amplifier is 8, when the bus voltage is 500V, the voltages output by the vout+ pin and the Vout-pin of the isolation amplifier are 0.104×8=0.832V, and when the bus voltage is 800V, the voltages output by the vout+ pin and the Vout-pin of the isolation amplifier are 0.167×8=1.34V. When the output voltage is amplified by 4 times through the differential amplifier (the multiple is adjustable), the obtained voltage is called a bus voltage small signal for convenience in description, so that when the bus voltage is 500-800V, the bus voltage small signal range is 3.33-5.35V. Assuming vt=3.3v, r3=10Ω, r4=10kΩ, r5=16kΩ, then the under-voltage threshold=3.3v, over-voltage threshold=5.36V. When the bus voltage small signal is smaller than the undervoltage threshold, the first comparator outputs a low-level signal to the main control chip, and when the bus voltage small signal is larger than the overvoltage threshold, the second comparator outputs a low-level signal to the main control chip.
The foregoing is a further detailed description of the utility model in connection with the preferred embodiments, and it is not intended that the utility model be limited to the specific embodiments described. It will be apparent to those skilled in the art that several simple deductions or substitutions may be made without departing from the spirit of the utility model, and these should be considered to be within the scope of the utility model.
Claims (6)
1. The bus voltage acquisition and monitoring circuit is characterized by comprising a main control chip, a step-down amplifying circuit and a comparison circuit, wherein the step-down amplifying circuit is used for generating a voltage small signal, the bus voltage input end is connected with the input end of the step-down amplifying circuit, the output end of the step-down amplifying circuit is connected with the main control chip, the comparison circuit is connected with the step-down amplifying circuit in parallel, and the output end of the comparison circuit is connected with the main control chip; the comparison circuit comprises a first comparator for detecting whether undervoltage, a second comparator for detecting whether overvoltage and a threshold resistor for adjusting a detection threshold, one end of the threshold resistor is connected with the output end of the buck amplification circuit, the input end of the first comparator and the input end of the second comparator are respectively connected with the threshold resistor, and the output end of the first comparator and the output end of the second comparator are both connected with the main control chip and are used for transmitting the flag bit of the overvoltage or the undervoltage.
2. The bus voltage acquisition and monitoring circuit according to claim 1, wherein the buck amplification circuit comprises a resistor R1, a resistor R2, an isolation amplifier and a differential amplifier, one end of the resistor R1 is connected with the bus voltage input end, the other end of the resistor R1 is connected with the vin+ pin of the isolation amplifier, one end of the resistor R2 is connected with the other end of the resistor R1, the other end of the resistor R2 is connected with the Vin-pin of the isolation amplifier, the other end of the resistor R2 is grounded, the positive pin of the differential amplifier is connected with the vout+ pin of the isolation amplifier, and the negative pin of the differential amplifier is connected with the Vout-pin of the isolation amplifier.
3. The bus voltage acquisition and monitoring circuit of claim 2, wherein the output pins of the differential amplifier are connected to the main control chip.
4. A bus voltage acquisition and monitoring circuit according to claim 3, wherein the threshold resistor comprises a resistor R3, a resistor R4 and a resistor R5, one end of the resistor R3 is connected to the output pin of the differential amplifier, one end of the resistor R4 is connected to the other end of the resistor R3, one end of the resistor R5 is connected to the other end of the resistor R4, and the other end of the resistor R5 is grounded.
5. The bus voltage acquisition and monitoring circuit according to claim 4, wherein a positive pin of the first comparator is connected to the other end of the resistor R3, and a negative pin of the second comparator is connected to the other end of the resistor R4.
6. The bus voltage acquisition and monitoring circuit of claim 5, wherein the negative leg of the first comparator and the positive leg of the second comparator are both connected to a reference voltage VT.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202320072560.2U CN219496499U (en) | 2023-01-10 | 2023-01-10 | Bus voltage acquisition and monitoring circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202320072560.2U CN219496499U (en) | 2023-01-10 | 2023-01-10 | Bus voltage acquisition and monitoring circuit |
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| Publication Number | Publication Date |
|---|---|
| CN219496499U true CN219496499U (en) | 2023-08-08 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202320072560.2U Active CN219496499U (en) | 2023-01-10 | 2023-01-10 | Bus voltage acquisition and monitoring circuit |
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|---|---|
| CN (1) | CN219496499U (en) |
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2023
- 2023-01-10 CN CN202320072560.2U patent/CN219496499U/en active Active
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