CN219458897U - Anti-interference circuit and switching power supply - Google Patents
Anti-interference circuit and switching power supply Download PDFInfo
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- CN219458897U CN219458897U CN202223552360.1U CN202223552360U CN219458897U CN 219458897 U CN219458897 U CN 219458897U CN 202223552360 U CN202223552360 U CN 202223552360U CN 219458897 U CN219458897 U CN 219458897U
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
- Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
- Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes
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Abstract
The application is applicable to the technical field of switching power supplies and provides an anti-interference circuit and a switching power supply. The anti-interference circuit comprises a first rectifying unit, a second rectifying unit, a resistor unit, a switch unit and a capacitor unit. The first rectifying unit is used for being connected between the power supply and the resistance unit in series, the resistance unit is respectively used for being electrically connected with the switch unit and the high-voltage starting pin of the chip, the second rectifying unit is used for being connected between the power supply and the capacitance unit in series, and the switch unit is electrically connected with the capacitance unit. When the power supply outputs the peak voltage, the switch unit is conducted, the peak voltage is transmitted to the capacitor unit, and the capacitor unit is used for storing the peak voltage. In the embodiment of the application, the peak voltage is transmitted to the capacitor unit by the switch unit, so that the peak voltage is prevented from being transmitted to the chip, the chip is prevented from being interfered and damaged by the peak voltage, and the reliability of the switch power supply is improved.
Description
Technical Field
The application belongs to the technical field of switching power supplies, and particularly relates to an anti-interference circuit and a switching power supply.
Background
Most of the control chips in the existing switching power supplies adopt a mode of integrating multiple functions and are provided with high-voltage starting pins, and the high-voltage starting pins of the chips are always directly connected with the power supply. When the power supply outputs peak voltage, the chip directly connected with the power supply can be disturbed and damaged, and the normal operation of the switching power supply is affected.
Disclosure of Invention
The embodiment of the application provides an anti-interference circuit and a switching power supply, which can solve the problem that a chip in the existing switching power supply is interfered and damaged.
In a first aspect, an embodiment of the present application provides an anti-interference circuit, including a first rectifying unit, a second rectifying unit, a resistor unit, a switch unit, and a capacitor unit;
the first rectifying unit is used for being connected in series between a power supply and the resistance unit, the resistance unit is respectively used for being electrically connected with the switch unit and a high-voltage starting pin of the chip, the second rectifying unit is used for being connected in series between the power supply and the capacitance unit, and the switch unit is electrically connected with the capacitance unit;
when the power supply outputs spike voltage, the switch unit is conducted to transmit the spike voltage to the capacitor unit, and the capacitor unit is used for storing the spike voltage.
In a possible implementation manner of the first aspect, the first rectifying unit includes a first diode and a second diode, an anode of the first diode is electrically connected to an anode of the power supply, an anode of the second diode is electrically connected to a cathode of the power supply, and a cathode of the second diode is electrically connected to a cathode of the first diode and the resistor unit, respectively.
In a possible implementation manner of the first aspect, the second rectifying unit includes a third diode, a fourth diode, a fifth diode, and a sixth diode;
the anode of the third diode is respectively used for being electrically connected with the cathode of the fourth diode and the anode of the power supply, the cathode of the third diode is respectively electrically connected with the cathode of the sixth diode, the capacitance unit and the switch unit, the anode of the fourth diode is electrically connected with the anode of the fifth diode and grounded, and the cathode of the fifth diode is respectively used for being electrically connected with the anode of the sixth diode and the cathode of the power supply.
In a possible implementation manner of the first aspect, the resistor unit includes a first resistor, a first end of the first resistor is electrically connected to a cathode of the first diode and a cathode of the second diode, and a second end of the first resistor is electrically connected to the switch unit and a high voltage start pin of the chip, respectively.
In a possible implementation manner of the first aspect, the resistor unit further includes at least one second resistor, and the second resistor is connected in series with the first resistor.
In a possible implementation manner of the first aspect, the switching unit includes a third resistor and a seventh diode, a first end of the third resistor is electrically connected to the capacitor unit and the second rectifying unit, a second end of the third resistor is electrically connected to a cathode of the seventh diode, and an anode of the seventh diode is electrically connected to the resistor unit and a high voltage start pin of the chip, respectively.
In a possible implementation manner of the first aspect, the capacitor unit includes a first capacitor, a first end of the first capacitor is electrically connected to the second rectifying unit, and a second end of the first capacitor is grounded.
In a possible implementation manner of the first aspect, the capacitor unit further includes at least one second capacitor, and the second capacitor is connected in parallel with the first capacitor.
In a possible implementation manner of the first aspect, the anti-interference circuit further includes a discharge unit, a first end of the discharge unit is electrically connected to the second rectifying unit, and a second end of the discharge unit is electrically connected to the switching unit and the capacitor unit, respectively.
In a second aspect, embodiments of the present application provide a switching power supply, including an anti-interference circuit as set forth in any one of the first aspects.
Compared with the prior art, the embodiment of the application has the beneficial effects that:
the anti-interference circuit provided by the embodiment of the application comprises a first rectifying unit, a second rectifying unit, a resistor unit, a switch unit and a capacitor unit. The first rectifying unit is connected in series between the power supply and the resistance unit and used for rectifying a voltage signal output by the power supply and transmitting the voltage signal to the resistance unit. The second rectifying unit is connected in series between the power supply and the capacitance unit and is used for rectifying and transmitting the voltage signal output by the power supply to the capacitance unit. The switch unit is used for being electrically connected with the resistor unit and the high-voltage starting pin of the chip respectively, and is used for transmitting the peak voltage output by the power supply to the capacitor unit when the peak voltage is output by the power supply, and the capacitor unit is used for storing the peak voltage. The anti-interference circuit provided by the embodiment of the application can transmit the peak voltage output by the power supply to the capacitor unit through the switch unit, so that the peak voltage is prevented from being transmitted to the chip, the chip is prevented from being interfered and damaged by the peak voltage, and the reliability of the switch power supply is improved.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings that are required for the embodiments or the description of the prior art will be briefly described below, it being obvious that the drawings in the following description are only some embodiments of the present application, and that other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
FIG. 1 is a schematic block diagram of an anti-tamper circuit provided in an embodiment of the present application;
fig. 2 is a schematic circuit connection diagram of an anti-interference circuit according to an embodiment of the present application.
In the figure: 10. a first rectifying unit; 20. a second rectifying unit; 30. a resistor unit; 40. a switching unit; 50. a capacitor unit; 60. a discharge unit; 01. an anti-interference circuit; 02. a power supply; 03. and a chip.
Detailed Description
In the following description, for purposes of explanation and not limitation, specific details are set forth, such as particular system configurations, techniques, etc. in order to provide a thorough understanding of the embodiments of the present application. It will be apparent, however, to one skilled in the art that the present application may be practiced in other embodiments that depart from these specific details. In other instances, detailed descriptions of well-known systems, devices, circuits, and methods are omitted so as not to obscure the description of the present application with unnecessary detail.
It should be understood that the terms "comprises" and/or "comprising," when used in this specification and the appended claims, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof.
It should also be understood that the term "and/or" as used in this specification and the appended claims refers to any and all possible combinations of one or more of the associated listed items, and includes such combinations.
As used in this specification and the appended claims, the term "if" may be interpreted in context as "when …" or "upon" or "in response to determining" or "in response to detecting". Similarly, the phrase "if a determination" or "if a [ described condition or event ] is detected" may be interpreted in the context of meaning "upon determination" or "in response to determination" or "upon detection of a [ described condition or event ]" or "in response to detection of a [ described condition or event ]".
In addition, in the description of the present application and the appended claims, the terms "first," "second," "third," and the like are used merely to distinguish between descriptions and are not to be construed as indicating or implying relative importance.
Reference in the specification to "one embodiment" or "some embodiments" or the like means that a particular feature, structure, or characteristic described in connection with the embodiment is included in one or more embodiments of the application. Thus, appearances of the phrases "in one embodiment," "in some embodiments," "in other embodiments," and the like in the specification are not necessarily all referring to the same embodiment, but mean "one or more but not all embodiments" unless expressly specified otherwise. The terms "comprising," "including," "having," and variations thereof mean "including but not limited to," unless expressly specified otherwise.
Most of the control chips in the existing switching power supplies adopt a mode of integrating multiple functions and are provided with high-voltage starting pins, and the high-voltage starting pins of the chips are always directly connected with the power supply. When the power supply outputs peak voltage, the chip directly connected with the power supply can be disturbed and damaged, and the normal operation of the switching power supply is affected.
Based on the above-described problems, the anti-interference circuit 01 provided in the embodiment of the present application includes the first rectifying unit 10, the second rectifying unit 20, the resistor unit 30, the switch unit 40, and the capacitor unit 50. The first rectifying unit 10 is connected in series between the power source 02 and the resistor unit 30, and is configured to rectify a voltage signal output by the power source 02 and transmit the rectified voltage signal to the resistor unit 30. The second rectifying unit 20 is connected in series between the power source 02 and the capacitor unit 50, and is configured to rectify a voltage signal output by the power source 02 and transmit the rectified voltage signal to the capacitor unit 50. The switch unit 40 is electrically connected to the resistor unit 30 and the high voltage start pin of the chip 03, and is used for transmitting the spike voltage output by the power source 02 to the capacitor unit 50 when the power source 02 outputs the spike voltage, and the capacitor unit 50 is used for storing the spike voltage. The anti-interference circuit 01 provided by the embodiment of the application can transmit the peak voltage output by the power supply 02 to the capacitor unit 50 by arranging the switch unit 40, so that the peak voltage is prevented from being transmitted to the chip 03, the chip 03 is prevented from being interfered and damaged by the peak voltage, and the reliability of the switch power supply 02 is improved.
In order to illustrate the technical solutions described in the present application, the following description is made by specific examples.
Fig. 1 shows a schematic block diagram of an anti-interference circuit 01 according to an embodiment of the present application. Referring to fig. 1, the rectifier includes a first rectifying unit 10, a second rectifying unit 20, a resistor unit 30, a switching unit 40, and a capacitor unit 50. The first rectifying unit 10 is used for being connected in series between the power supply 02 and the resistor unit 30, the resistor unit 30 is respectively used for being electrically connected with the switch unit 40 and a high-voltage starting pin of the chip 03, the second rectifying unit 20 is used for being connected in series between the power supply 02 and the capacitor unit 50, and the switch unit 40 is electrically connected with the capacitor unit 50.
Specifically, the first rectifying unit 10 is configured to be connected in series between the power source 02 and the resistor unit 30, and configured to rectify a voltage signal output by the power source 02 and transmit the rectified voltage signal to the resistor unit 30. The second rectifying unit 20 is connected in series between the power source 02 and the capacitor unit 50, and is configured to rectify a voltage signal output by the power source 02 and transmit the rectified voltage signal to the capacitor unit 50. The switch unit 40 is electrically connected to the resistor unit 30 and the high voltage start pin of the chip 03, and is used for transmitting the spike voltage output by the power source 02 to the capacitor unit 50 when the power source 02 outputs the spike voltage, and the capacitor unit 50 is used for storing the spike voltage. The anti-interference circuit 01 provided by the embodiment of the application can transmit the peak voltage output by the power supply 02 to the capacitor unit 50 by arranging the switch unit 40, so that the peak voltage is prevented from being transmitted to the chip 03, the chip 03 is prevented from being interfered and damaged by the peak voltage, and the reliability of the switch power supply is improved.
The spike voltage output from the power supply 02 includes a spike signal or a voltage higher than the withstand voltage of the chip 03. When the spike voltage outputted from the power source 02 is a spike signal, the switch unit 40 is turned on, the spike signal is transmitted to the capacitor unit 50, and the capacitor unit 50 stores the spike signal. The spike pulse signal is prevented from being transmitted to the chip 03, the chip 03 is prevented from being interfered and damaged by the spike pulse signal, and the reliability of the switching power supply 02 is improved. When the peak voltage output by the power supply 02 is higher than the voltage withstanding value of the chip 03, the peak voltage can be transmitted to the capacitor unit 50, so as to prevent the peak voltage higher than the voltage withstanding value of the chip 03 from being transmitted to the chip 03, and thus the internal structure of the chip 03 is disturbed and damaged, and the reliability of the switching power supply is improved.
The switch unit 40 in the present application can also transmit abnormal signals or spike voltages generated by different environments to the capacitor unit 50, so as to prevent the chip 03 from being damaged. Meanwhile, the capacitor unit 50 can return stored energy to the main circuit, so that the utilization rate of the electric energy is improved.
For example, the designer may choose the type of the high voltage start chip 03 according to the actual situation, for example, the type of the chip 03 having a high voltage start pin (HV) is commonly used, such as: LD7791, OB6683, NCP1246, TEA18362, etc., and various packages such as SOP-16, SOP-8, etc. of such chip 03 can be selected, and the scheme of the present application is described with reference to chip 03 with model OB 6683. When the input voltage is 30V, the voltage range that the HV pin of the chip 03 with the model OB6683 can bear is 0.7V-700V, that is, the maximum voltage value that the HV pin of the chip 03 with the model OB6683 can bear is 700V. When the Hi-point test is performed on the chip 03, the HV pin is connected with the oscilloscope for detection, and the maximum peak voltage can be detected to be 1.12KV. At this time, the peak voltage value is far greater than the maximum voltage value that the HV pin of the chip 03 can bear, and the chip 03 can be disturbed and damaged, which affects the normal operation of the product. The switch unit 40 is connected to the HV pin of the chip 03, so as to prevent the spike voltage from being transmitted to the chip 03, which results in the internal structure of the chip 03 being disturbed and damaged, and improve the reliability of the switching power supply.
It should be noted that, the anti-interference circuit 01 provided in the application may also be tested in various application scenarios such as SURGR, ESD, etc. Compared with the prior circuit, the anti-interference circuit 01 provided with the switch unit 40 has stronger anti-interference capability and obviously improves the protection capability of the chip 03.
In one embodiment of the present application, as shown in fig. 2, the first rectifying unit 10 includes a first diode D1 and a second diode D2, wherein an anode of the first diode D1 is electrically connected to a positive electrode of the power source 02, an anode of the second diode D2 is electrically connected to a negative electrode of the power source 02, and a cathode of the second diode D2 is electrically connected to a cathode of the first diode D1 and the resistor unit 30, respectively.
Specifically, the first diode D1 and the second diode D2 have unidirectional conductivity, and are both used for rectifying, so that the alternating current output by the power supply 02 is rectified, and the current fluctuation input into the loop is prevented from being too large, so that the function of the chip 03 is prevented from being affected. The first diode D1 is used for rectifying the current output by the positive electrode of the power supply 02, and the second diode D2 is used for rectifying the current of the negative electrode of the power supply 02, so that the alternating current flowing out of the positive electrode of the power supply 02 and the negative electrode of the power supply 02 is ensured to be more stable.
In one embodiment of the present application, as shown in fig. 2, the second rectifying unit 20 includes a third diode D3, a fourth diode D4, a fifth diode D5, and a sixth diode D6.
The anode of the third diode D3 is electrically connected to the cathode of the fourth diode D4 and the anode of the power source 02, the cathode of the third diode D3 is electrically connected to the cathode of the sixth diode D6, the capacitor unit 50 and the switch unit 40, the anode of the fourth diode D4 is electrically connected to the anode of the fifth diode D5 and grounded, and the cathode of the fifth diode D5 is electrically connected to the anode of the sixth diode D6 and the cathode of the power source 02.
Specifically, the third diode D3, the fourth diode D4, the fifth diode D5, and the sixth diode D6 constitute a full-bridge rectifier circuit. When the current flows out from the positive electrode of the power supply 02, the current can flow through the third diode D3 and the fifth diode D5 and flow back to the negative electrode of the power supply 02; when the current flows out from the cathode of the power supply 02, the current can flow through the sixth diode D6 and the fourth diode D4 and flow back to the anode of the power supply 02, so that the current of the anode of the power supply 02 and the cathode of the power supply 02 is rectified. The full-bridge rectifying circuit can improve rectifying efficiency and has high utilization rate.
In one embodiment of the present application, as shown in fig. 2, the resistor unit 30 includes a first resistor R1, a first end of the first resistor R1 is electrically connected to the cathode of the first diode D1 and the cathode of the second diode D2, and a second end of the first resistor R1 is electrically connected to the switch unit 40 and the high voltage start pin of the chip 03, respectively.
Specifically, the first resistor R1 plays a role in current limiting, so as to prevent the voltage signal output by the power supply 02 from being excessively large after being rectified by the first rectifying unit 10, and thus the normal operation of the chip 03 is affected. When the voltage signal output by the power supply 02 is within the voltage range that can be borne by the chip 03, current flows from the power supply 02, flows through the first rectifying unit 10 and the first resistor R1, and flows into the chip 03. When the voltage signal output by the power supply 02 is a spike voltage, that is, when the spike voltage value is higher than the withstand voltage value of the chip 03, the current flows out from the power supply 02, flows through the first rectifying unit 10 and the first resistor R1, flows into the switching unit 40 and the capacitor unit 50, and avoids the damage to the chip 03 caused by the spike voltage transmitted to the chip 03.
For example, the designer may choose the number of the first resistors R1 and the resistance value of the first resistors R1 according to the actual situation. For example, a first resistor R1 is selected as the resistor unit 30, where the resistance value of the first resistor R1 may be 10kΩ, which plays a role in limiting the ac power in the circuit.
In one embodiment of the present application, as shown in fig. 2, the resistor unit 30 further includes at least one second resistor R2, and the second resistor R2 and the first resistor R1 are connected in series.
Specifically, the second resistor R2 and the first resistor R1 are connected in series, and both have a current limiting function, so that the voltage signal output by the power supply 02 is prevented from being excessively large in the voltage signal flowing into the chip 03 after being rectified by the first rectifying unit 10, and the normal operation of the chip 03 is affected. The number of the second resistors R2 is not limited, and one or more second resistors R2 may be set according to actual circuit requirements to limit the alternating current in the circuit.
For example, the designer may choose the number of the second resistors R2 and the resistance value of the second resistors R2 according to the actual situation. For example, a second resistor R2 with a resistance value of 10kΩ may be selected, or two second resistors R2 with resistance values of 5kΩ may be selected, which may both have a current limiting effect on the ac in the circuit.
In one embodiment of the present application, as shown in fig. 2, the resistor unit 30 further includes a fourth resistor, where a first end of the fourth resistor is electrically connected to a second end of the second resistor R2 and the switch unit 40, and a second end of the fourth resistor is electrically connected to a high voltage start pin of the chip 03.
Specifically, the fourth resistor plays a role in current limiting, and meanwhile, the fourth resistor is electrically connected with the high-voltage starting pin of the chip 03, so that the chip 03 can be prevented from being damaged due to the fact that the chip 03 is impacted by high current. The number of the fourth resistors is not limited, and one or more fourth resistors can be set according to actual circuit requirements to limit the alternating current in the circuit.
In one embodiment of the present application, the switching unit 40 includes a third resistor R3 and a seventh diode D7, a first end of the third resistor R3 is electrically connected to the capacitor unit 50 and the second rectifying unit 20, a second end of the third resistor R3 is electrically connected to a cathode of the seventh diode D7, and an anode of the seventh diode D7 is electrically connected to the resistor unit 30 and the high voltage start pin of the chip 03, respectively.
Specifically, the seventh diode D7 in the switching unit 40 has a unidirectional conduction characteristic, when the voltage signal output by the power source 02 is within the voltage range that can be borne by the chip 03, the voltage at the cathode of the seventh diode D7 is not lower than the voltage at the anode of the seventh diode D7, at this time, the voltage difference between the anode and the cathode of the seventh diode D7 does not reach the conduction voltage drop of the seventh diode D7, and the seventh diode D7 is not conducting. When the voltage signal output by the power supply 02 is a peak voltage, the voltage of the anode of the seventh diode D7 is far greater than the voltage of the cathode of the seventh diode D7, and at this time, the voltage difference between the anode and the cathode of the seventh diode D7 is far greater than the conduction voltage drop (0.7V) of the seventh diode D7, and the seventh diode D7 is turned on. The peak voltage is transmitted to the capacitor unit 50 through the seventh diode D7 and the third resistor R3, so that the chip 03 is prevented from being damaged due to the transmission of the peak voltage to the chip 03. The third resistor R3 plays a role in current limiting, and meanwhile, the third resistor R3 can also improve the influence of electromagnetic interference on a circuit and protect the seventh diode D7 from being damaged. The third resistor R3 and the seventh diode D7 form the switching unit 40, which can protect the chip 03 from being disturbed and damaged, and improve the reliability of the product.
It should be noted that the switching unit 40 is further electrically connected to a voltage transformation unit, where the voltage transformation unit may be a step-up transformer. When the voltage signal output by the power supply 02 is within the voltage range that the chip 03 can bear, the cathode of the seventh diode D7 is under the action of the step-up transformer, and the voltage value of the cathode of the seventh diode D7 is always higher than the voltage value of the anode of the seventh diode D7. Therefore, when the voltage signal output by the power supply 02 is within the voltage range that the chip 03 can withstand, the seventh diode D7 is in the off state, and the switching unit 40 is not turned on, and the voltage signal output by the power supply 02 cannot be transmitted to the capacitor unit 50.
In one embodiment of the present application, the capacitor unit 50 includes a first capacitor C1, a first end of the first capacitor C1 is electrically connected to the second rectifying unit 20, and a second end of the first capacitor C1 is grounded.
Specifically, the first capacitor C1 is used for storing energy, that is, the spike voltage output by the power supply 02 flows into the first capacitor C1 after passing through the switching unit 40, and the first capacitor C1 is used for storing the spike voltage. Meanwhile, the first capacitor C1 can reflux stored energy into the main circuit, and the electric energy utilization rate is improved.
The first capacitor C1 is also used to store the electric energy flowing through the second rectifying unit 20 when the voltage signal outputted by the power supply 02 is within the voltage range that the chip 03 can withstand.
In one embodiment of the present application, the capacitor unit 50 further includes at least one second capacitor C2, and the second capacitor C2 is connected in parallel to the first capacitor C1.
Specifically, the second capacitor C2 and the first capacitor C1 are connected in parallel, and both have an energy storage function, and the peak voltage output by the power supply 02 can flow into the first capacitor C1 and the second capacitor C2 after passing through the switching unit 40, where the first capacitor C1 and the second capacitor C2 are used for storing the peak voltage. The number of the second capacitors C2 is not limited, and one or more second capacitors C2 may be set according to actual circuit requirements to store the input spike voltage.
In one embodiment of the present application, the anti-interference circuit 01 further includes a discharging unit 60, a first end of the discharging unit 60 is electrically connected to the second rectifying unit 20, and a second end of the discharging unit 60 is electrically connected to the switching unit 40 and the capacitor unit 50, respectively.
Specifically, the discharging unit 60 is connected in series between the second rectifying unit 20 and the capacitor unit 50, and the voltage signal output by the power source 02 may flow into the discharging unit 60 after passing through the second rectifying unit 20. The discharging unit 60 is used for discharging the input voltage, and preventing the reliability of the circuit from being influenced by the excessive voltage.
In one embodiment of the present application, the discharging unit 60 includes an eighth diode D8 and a third capacitor C3, wherein an anode of the eighth diode D8 is electrically connected to the first terminal of the third capacitor C3 and the second rectifying unit 20, and a cathode of the eighth diode D8 is electrically connected to the second terminal of the third capacitor C3 and the capacitor unit 50, respectively.
Specifically, the current flows from the positive electrode of the power supply 02, flows through the third diode D3, the third capacitor C3, or the eighth diode D8, and flows into the capacitor unit 50. At this time, the third capacitor C3 is in a charged state. The current flows from the negative electrode of the power supply 02, through the sixth diode D6, the third capacitor C3 or the eighth diode D8, and into the capacitor unit 50. At this time, the third capacitor C3 is still in a charged state. Accordingly, the eighth diode D8 may form a discharge loop with the third capacitor C3, and may be used to discharge the electric energy in the third capacitor C3.
The application also discloses a switching power supply, including foretell anti-interference circuit 01, switching power supply adopts foretell anti-interference circuit 01, can prevent spike voltage input to chip 03, avoids chip 03 to receive the interference and damage, improves switching power supply reliability.
Since the processing and the functions implemented by the switching power supply in this embodiment basically correspond to the embodiments, principles and examples of the anti-interference circuit 01, the description of this embodiment is not exhaustive, and reference may be made to the related descriptions in the foregoing embodiments, which are not repeated herein.
The above embodiments are only for illustrating the technical solution of the present application, and are not limiting; although the present application has been described in detail with reference to the foregoing embodiments, it should be understood by those of ordinary skill in the art that: the technical scheme described in the foregoing embodiments can be modified or some technical features thereof can be replaced by equivalents; such modifications and substitutions do not depart from the spirit and scope of the technical solutions of the embodiments of the present application, and are intended to be included in the scope of the present application.
Claims (10)
1. An anti-interference circuit is characterized by comprising a first rectifying unit, a second rectifying unit, a resistor unit, a switch unit and a capacitor unit;
the first rectifying unit is used for being connected in series between a power supply and the resistance unit, the resistance unit is respectively used for being electrically connected with the switch unit and a high-voltage starting pin of the chip, the second rectifying unit is used for being connected in series between the power supply and the capacitance unit, and the switch unit is electrically connected with the capacitance unit;
when the power supply outputs spike voltage, the switch unit is conducted to transmit the spike voltage to the capacitor unit, and the capacitor unit is used for storing the spike voltage.
2. The anti-interference circuit of claim 1, wherein the first rectifying unit comprises a first diode and a second diode, an anode of the first diode is electrically connected to an anode of the power supply, an anode of the second diode is electrically connected to a cathode of the power supply, and a cathode of the second diode is electrically connected to a cathode of the first diode and the resistor unit, respectively.
3. The anti-interference circuit of claim 1, wherein the second rectifying unit comprises a third diode, a fourth diode, a fifth diode, and a sixth diode;
the anode of the third diode is respectively used for being electrically connected with the cathode of the fourth diode and the anode of the power supply, the cathode of the third diode is respectively electrically connected with the cathode of the sixth diode, the capacitance unit and the switch unit, the anode of the fourth diode is electrically connected with the anode of the fifth diode and grounded, and the cathode of the fifth diode is respectively used for being electrically connected with the anode of the sixth diode and the cathode of the power supply.
4. The anti-interference circuit of claim 2, wherein the resistor unit comprises a first resistor, a first end of the first resistor is electrically connected to the cathode of the first diode and the cathode of the second diode, respectively, and a second end of the first resistor is electrically connected to the switch unit and the high voltage start pin of the chip, respectively.
5. The tamper resistant circuit of claim 4 wherein said resistive element further comprises at least a second resistor, said second resistor being in series with said first resistor.
6. The anti-interference circuit of claim 1, wherein the switching unit comprises a third resistor and a seventh diode, a first end of the third resistor is electrically connected with the capacitor unit and the second rectifying unit, respectively, a second end of the third resistor is electrically connected with a cathode of the seventh diode, and an anode of the seventh diode is electrically connected with the resistor unit and a high voltage start pin of the chip, respectively.
7. The anti-interference circuit of claim 1, wherein the capacitor unit comprises a first capacitor, a first end of the first capacitor is electrically connected to the second rectifying unit, and a second end of the first capacitor is grounded.
8. The anti-tamper circuit of claim 7, wherein the capacitive unit further comprises at least one second capacitor connected in parallel with the first capacitor.
9. The anti-tamper circuit of claim 1, further comprising a discharge unit having a first end electrically connected to the second rectifying unit and a second end electrically connected to the switching unit and the capacitive unit, respectively.
10. A switching power supply comprising an anti-interference circuit as claimed in any one of claims 1 to 9.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202223552360.1U CN219458897U (en) | 2022-12-26 | 2022-12-26 | Anti-interference circuit and switching power supply |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202223552360.1U CN219458897U (en) | 2022-12-26 | 2022-12-26 | Anti-interference circuit and switching power supply |
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| CN219458897U true CN219458897U (en) | 2023-08-01 |
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|---|---|---|---|
| CN202223552360.1U Active CN219458897U (en) | 2022-12-26 | 2022-12-26 | Anti-interference circuit and switching power supply |
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| CN (1) | CN219458897U (en) |
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- 2022-12-26 CN CN202223552360.1U patent/CN219458897U/en active Active
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