CN219417591U - Single battery voltage detection circuit and battery detection chip - Google Patents
Single battery voltage detection circuit and battery detection chip Download PDFInfo
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- CN219417591U CN219417591U CN202320690061.XU CN202320690061U CN219417591U CN 219417591 U CN219417591 U CN 219417591U CN 202320690061 U CN202320690061 U CN 202320690061U CN 219417591 U CN219417591 U CN 219417591U
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
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- Y02E60/10—Energy storage using batteries
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Abstract
The utility model discloses a single battery voltage detection circuit and a battery detection chip, which are suitable for the technical field of batteries. The positive electrode and the negative electrode of the single battery to be tested are correspondingly connected with the first output ends of the two photoelectric solid state relays respectively, and the first input control ends of the two photoelectric solid state relays are connected with one end of the first resistor; the second input control ends of the two photoelectric solid state relays are connected with the singlechip; the second output end of the photoelectric solid-state relay corresponding to the positive electrode and the negative electrode of the single battery to be tested is correspondingly connected with one end of the second resistor and one end of the third resistor; the other end of the second resistor is connected with the other end of the third resistor and is connected with the positive input end of the operational amplifier; one end of the third resistor is connected with the negative input end of the operational amplifier, and the output end of the operational amplifier is connected with the singlechip. The voltage of a single battery is collected through the control of the singlechip, and other batteries are not output in the voltage collection process, so that the battery voltage of other single batteries is prevented from being consumed.
Description
Technical Field
The utility model relates to the technical field of batteries, in particular to a single battery voltage detection circuit and a battery detection chip.
Background
With the development of technology, batteries are increasingly widely used, for example, a low-speed electric vehicle still adopts 12V multi-lead-acid battery to be connected in series, when the output voltage is rated value after a charger is selected, when the voltage of one battery of the series battery pack is too high, other batteries cannot be fully charged, and when the voltage of one battery is too low, the service life of the battery can be influenced due to the fact that the other batteries are overcharged. An Analog Front End (AFE) acquisition chip designed by an integrated circuit (Integrated Circuit, IC) company at present can finish detecting various indexes of a battery, mainly aims at a lithium battery, and the single-unit acquisition voltage is generally not more than 5V and cannot meet the acquisition requirement of a 12V single-unit lead-acid battery.
In the prior art, a higher single battery is divided into an AD range by collecting resistor voltage division, each string is matched with proper resistor voltage division and then is sampled and acquired by AD, fig. 1 is a schematic diagram of the existing resistor voltage division acquisition, as shown in fig. 1, n batteries are connected in series, wherein CELL0 is a first battery cathode, CELL1 is a first battery anode (a second battery cathode), and so on, CELn is an nth battery anode, two resistors are connected in series between the first battery anode and the first battery cathode, and the two resistor series voltage division points are used as voltage sampling points of the first battery to be sent into an ADC pin of a single chip microcomputer, so on to realize voltage division. The scheme is simpler, but the resistance accuracy of each string of resistors cannot be guaranteed, the total resistance of the resistors after the direct current resistor and the external voltage dividing resistor of the battery are connected in parallel is very small, and a discharging loop is formed to always consume the battery voltage.
Therefore, it is highly desirable to find a single cell voltage detection circuit.
Disclosure of Invention
The utility model aims to provide a single battery voltage detection circuit and a battery detection chip, which realize the voltage acquisition of a single battery through the control of a singlechip, and do not output other batteries in the voltage acquisition process of the single battery so as to save power consumption and avoid consuming the battery voltages of other single batteries. In addition, when the output end of the single battery is connected with the operational amplifier, the voltage division is realized only through one second resistor, the number of the resistor voltage division is reduced, and the resistance precision of the resistor is controlled in a uniform range so as to ensure the resistance precision.
In order to solve the technical problems, the utility model provides a single battery voltage detection circuit, which comprises at least two photoelectric solid state relays, at least one single battery to be detected, a first resistor, a second resistor, a third resistor, an operational amplifier and a singlechip;
the positive electrode and the negative electrode of the single battery to be tested are correspondingly connected with the first output ends of the two photoelectric solid state relays respectively, the first input control ends of the two photoelectric solid state relays are connected with one end of the first resistor, and the other end of the first resistor is connected with a power supply; the second input control ends of the two photoelectric solid state relays are connected with the singlechip;
the second output end of the photoelectric solid-state relay corresponding to the positive electrode and the negative electrode of the single battery to be detected is correspondingly connected with one end of the second resistor and one end of the third resistor; the other end of the second resistor is connected with the other end of the third resistor and is connected with the positive input end of the operational amplifier; one end of the third resistor is connected with the negative input end of the operational amplifier, and the output end of the operational amplifier is connected with the singlechip.
Preferably, when the pin number of the singlechip is smaller than a preset number, the circuit further comprises an expansion circuit;
the second input control ends of the two photoelectric solid-state relays are connected with GPIO pins of the expansion circuit, and IO pins of the expansion circuit are respectively connected with one end of a pull-up resistor; and the IO pin is connected with the singlechip.
Preferably, the IO pins of the extension circuit are respectively connected with one end of a pull-up resistor, and the extension circuit comprises:
the number of the pull-up resistors is the same as the number of the IO pins, and the IO pins of the expansion circuit are correspondingly connected with one end of the pull-up resistors.
Preferably, the first capacitor is further included;
the first capacitor is connected with the third resistor in parallel, one end of the first capacitor is connected with the second output end of the photoelectric solid-state relay corresponding to the negative electrode of the single battery to be tested, and the other end of the first capacitor is connected with the other end of the second resistor.
Preferably, the circuit further comprises a fourth resistor;
one end of the fourth resistor is connected with the output end of the operational amplifier, and the other end of the fourth resistor is connected with the singlechip.
Preferably, the circuit further comprises an equalization circuit;
the equalization circuit comprises an optical coupler, an MOS tube, a first diode, a second diode, a fifth resistor, a sixth resistor, a seventh resistor and an eighth resistor;
the positive electrode of the single battery to be tested is respectively connected with one end of the fifth resistor, one end of the sixth resistor and the cathode of the first diode; the other end of the fifth resistor is connected with one output end of the optical coupler, and the other end of the sixth resistor is connected with the drain electrode of the MOS tube; the grid electrode of the MOS tube is respectively connected with one end of the seventh resistor, the cathode of the second diode and the other output end of the optical coupler;
the negative electrode of the single battery to be tested is respectively connected with the anode of the first diode, the source electrode of the MOS tube, the other end of the seventh resistor and the anode of the second diode;
the positive input end of the optical coupler is connected with one end of the eighth resistor, and the other end of the eighth resistor is connected with a power supply; and the negative input end of the optical coupler is connected with the singlechip.
Preferably, the second capacitor is further included;
one end of the second capacitor is respectively connected with one end of the fifth resistor, one end of the sixth resistor and the cathode of the first diode; and the other end of the second capacitor is connected with the negative electrode of the single battery to be tested.
Preferably, the operational amplifier is a differential operational amplifier.
Preferably, the first diode and the second diode are zener diodes.
In order to solve the technical problems, the utility model also provides a battery detection chip which comprises the single battery voltage detection circuit.
The utility model provides a single battery voltage detection circuit, which comprises at least two photoelectric solid state relays, at least one single battery to be detected, a first resistor, a second resistor, a third resistor, an operational amplifier and a singlechip; the positive electrode and the negative electrode of the single battery to be tested are correspondingly connected with the first output ends of the two photoelectric solid state relays respectively, the first input control ends of the two photoelectric solid state relays are connected with one end of a first resistor, and the other end of the first resistor is connected with a power supply; the second input control ends of the two photoelectric solid state relays are connected with the singlechip; the second output end of the photoelectric solid-state relay corresponding to the positive electrode and the negative electrode of the single battery to be tested is correspondingly connected with one end of the second resistor and one end of the third resistor; the other end of the second resistor is connected with the other end of the third resistor and is connected with the positive input end of the operational amplifier; one end of the third resistor is connected with the negative input end of the operational amplifier, and the output end of the operational amplifier is connected with the singlechip. The circuit realizes the voltage acquisition of a single battery through the control of the singlechip, does not output other batteries in the voltage acquisition process of the single battery, so as to save power consumption and avoid the consumption of the battery voltages of other single batteries. In addition, when the output end of the single battery is connected with the operational amplifier, the voltage division is realized only through one second resistor, the number of the resistor voltage division is reduced, and the resistance precision of the resistor is controlled in a uniform range so as to ensure the resistance precision.
In addition, the utility model also provides a battery detection chip which has the same beneficial effects as the single battery voltage detection circuit.
Drawings
For a clearer description of embodiments of the present utility model, the drawings that are required to be used in the embodiments will be briefly described, it being apparent that the drawings in the following description are only some embodiments of the present utility model, and other drawings may be obtained according to the drawings without inventive effort for those skilled in the art.
FIG. 1 is a schematic diagram of a prior resistor voltage division acquisition;
fig. 2 is a block diagram of a single battery voltage detection circuit according to an embodiment of the present utility model;
fig. 3 is a schematic structural diagram of an equalization circuit according to an embodiment of the present utility model.
Detailed Description
The following description of the embodiments of the present utility model will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present utility model, but not all embodiments. Based on the embodiments of the present utility model, all other embodiments obtained by a person of ordinary skill in the art without making any inventive effort are within the scope of the present utility model.
The utility model provides a single battery voltage detection circuit and a battery detection chip, wherein the single battery voltage detection circuit and the battery detection chip are controlled by a single chip microcomputer to realize the voltage acquisition of a single battery, and no output is made to other batteries in the voltage acquisition process of the single battery, so that the power consumption is saved, and the battery voltage of other single batteries is avoided. In addition, when the output end of the single battery is connected with the operational amplifier, the voltage division is realized only through one second resistor, the number of the resistor voltage division is reduced, and the resistance precision of the resistor is controlled in a uniform range so as to ensure the resistance precision.
In order to better understand the aspects of the present utility model, the present utility model will be described in further detail with reference to the accompanying drawings and detailed description.
Note that, n batteries in fig. 1 are connected in series, where CELL0 is a first battery cathode, and CELL1 is a first battery anode (a second battery cathode); CELL2 is the second battery anode (third battery cathode); CELL3 is the third battery anode (fourth battery cathode); CELL4 is the fourth battery anode (fifth battery cathode); CELn-1 is the n-1 th battery anode (n-th battery cathode); CELLn is the nth battery anode; every two resistors are connected in series between the positive and negative of one battery, and the voltage dividing points of the two resistors connected in series are used as voltage sampling points of the battery and sent to ADC pins of the single chip microcomputer, and voltage division is realized through the series resistors, so that the total resistance is smaller and the battery voltages of other single batteries are consumed.
The single battery voltage detection circuit provided by the utility model can solve the technical problems, can be applied to a 5V lithium battery, can be applied to a 12V lead-acid battery, and can be set according to actual conditions.
Fig. 2 is a block diagram of a single battery voltage detection circuit provided by an embodiment of the present utility model, and as shown in fig. 2, the circuit includes at least two photoelectric solid state relays 1, at least one single battery 2 to be detected, a first resistor, a second resistor, a third resistor, an operational amplifier and a single chip microcomputer 3;
the positive electrode and the negative electrode of the single battery 2 to be tested are correspondingly connected with the first output ends of the two photoelectric solid state relays 1 respectively, the first input control ends of the two photoelectric solid state relays 1 are connected with one end of a first resistor, and the other end of the first resistor is connected with a power supply; the second input control ends of the two photoelectric solid state relays 1 are connected with the singlechip 3;
the second output end of the photoelectric solid-state relay 1 corresponding to the positive electrode and the negative electrode of the single battery 2 to be tested is correspondingly connected with one end of the second resistor and one end of the third resistor; the other end of the second resistor is connected with the other end of the third resistor and is connected with the positive input end of the operational amplifier; one end of the third resistor is connected with the negative input end of the operational amplifier, and the output end of the operational amplifier is connected with the singlechip 3.
Specifically, at least one of the number of the single batteries 2 to be tested may have a plurality of single batteries 2 to be tested simultaneously, and the connection relationship of the plurality of single batteries to be tested is the same as the connection relationship of one single battery to be tested in fig. 2, and fig. 2 only illustrates the connection relationship of one single battery to be tested. The two poles of one single battery 2 to be tested are respectively connected with the first output ends of the two photoelectric solid state relays 1, namely, the positive pole is connected with the first output end of the first photoelectric solid state relay 1, the negative pole is connected with the first output end of the second photoelectric solid state relay 1, or the negative pole is connected with the first output end of the first photoelectric solid state relay 1, and the positive pole is connected with the first output end of the second photoelectric solid state relay 1. The second output end of the photoelectric solid-state relay 1 is finally connected with the singlechip 3, and the voltage value of the single battery 2 to be detected can be obtained through the difference value of the voltage values of the two second output ends. The two poles of the single battery 2 to be tested cannot be positioned at the same photoelectric solid state relay 1.
The type of the photoelectric solid state relay 1 is not limited, and may be a two-channel relay or a single-channel relay. At least two photoelectric solid state relays 1 in the present embodiment are single-channel photoelectric solid state relays 1. If the two-channel photoelectric solid state relay 1 is adopted, at least two photoelectric solid state relays 1 in the above embodiment are at least one photoelectric solid state relay 1, and accordingly the connection relationship is changed.
The first input control ends of the two photoelectric solid-state relays 1 are connected with one end of a first resistor, and the number of the first resistors in the embodiment is not limited to one, but the first resistors are classified according to the action of the resistors and unified into the first resistor. As shown in fig. 2, the number of the first resistors in this embodiment may be one or more, and if there are a plurality, the first resistors include R1 and R1'. The number of the photoelectric solid-state relays 1 is the same as that of the first resistors, the two first input control ends are correspondingly connected with one ends of the two first resistors, and the other ends of the first resistors are connected with power supply voltage. The first resistor is used as a pull-up resistor of the optoelectronic solid state relay 1, and the power supply voltage can be 3.3V.
The second input control ends of the two photoelectric solid-state relays 1 are connected with the single chip microcomputer 3, and the single cell positive electrode and the single cell negative electrode are respectively output through the second output ends under the control of the single chip microcomputer 3. As shown in fig. 2, the positive electrode is output through OUT1 and the negative electrode is output through OUT2 for a single cell.
The second output end of the photoelectric solid-state relay 1 corresponding to the positive electrode and the negative electrode of the single battery 2 to be detected is correspondingly connected with one end of the second resistor R2 and one end of the third resistor R3. The other end of the second resistor R2 is connected with the other end of the third resistor R3 and is connected with the positive input end of the operational amplifier U1. The second resistor R2 and the third resistor R3 have the function of uniformly dividing and sampling the output single battery voltage to reduce sampling errors so as to meet the requirement that the input voltage is smaller than the preset voltage, and the preset voltage can be set to be 5V.
One end of the third resistor R3 is connected with the negative input end of the operational amplifier U1, the output end of the operational amplifier U1 is connected with the single chip microcomputer 3, and the operational amplifier U1 is used for realizing voltage differential acquisition of the single battery 2 to be tested.
The single battery voltage detection circuit provided by the embodiment of the utility model comprises at least two photoelectric solid-state relays, at least one single battery to be detected, a first resistor, a second resistor, a third resistor, an operational amplifier and a singlechip; the positive electrode and the negative electrode of the single battery to be tested are correspondingly connected with the first output ends of the two photoelectric solid state relays respectively, the first input control ends of the two photoelectric solid state relays are connected with one end of a first resistor, and the other end of the first resistor is connected with a power supply; the second input control ends of the two photoelectric solid state relays are connected with the singlechip; the second output end of the photoelectric solid-state relay corresponding to the positive electrode and the negative electrode of the single battery to be tested is correspondingly connected with one end of the second resistor and one end of the third resistor; the other end of the second resistor is connected with the other end of the third resistor and is connected with the positive input end of the operational amplifier; one end of the third resistor is connected with the negative input end of the operational amplifier, and the output end of the operational amplifier is connected with the singlechip. The circuit realizes the voltage acquisition of a single battery through the control of the singlechip, does not output other batteries in the voltage acquisition process of the single battery, so as to save power consumption and avoid the consumption of the battery voltages of other single batteries. In addition, when the output end of the single battery is connected with the operational amplifier, the voltage division is realized only through one second resistor, the number of the resistor voltage division is reduced, and the resistance precision of the resistor is controlled in a uniform range so as to ensure the resistance precision.
On the basis of the embodiment, when the pin number of the singlechip is smaller than the preset number, the circuit further comprises an expansion circuit;
the second input control ends of the two photoelectric solid-state relays are connected with GPIO pins of the expansion circuit, and IO pins of the expansion circuit are respectively connected with one end of the pull-up resistor; the IO pin is connected with the singlechip.
Specifically, in the above embodiment, the single-chip microcomputer 3 is connected with the single-chip microcomputer 3, the pin resources of the single-chip microcomputer 3 are occupied, and as the number of the batteries is multiple, the voltage detection of the multiple batteries occupies the pins of the single-chip microcomputer 3, so that the pins of other functional modules connected with the single-chip microcomputer 3 are occupied, and the expansion circuit U2 is utilized to realize the expansion of the single-chip microcomputer 3 so as to reduce the Input Output (IO) port use of the single-chip microcomputer 3. The second input control ends of the two photoelectric solid state relays 1 are connected with pins of general purpose input/output ports (General Purpose Input Output, GPIO) of the expansion circuit U2, and the number of the GPIO pins is the same as that of the photoelectric solid state relays 1. The IO pins of the expansion circuit U2 are respectively connected with one end of the pull-up resistor, as shown in fig. 2, the number of IO pins is 4, and the SCL pin, the SDA pin, the INT pin and the RESET pin which correspond to the two-wire serial bus (Inter Integrated Circuit, I2C) pins are four pins.
As an embodiment, the IO pins of the extension circuit are respectively connected with one ends of pull-up resistors, and the extension circuit includes:
the number of the pull-up resistors is the same as the number of the IO pins, and the IO pins of the expansion circuit are correspondingly connected with one end of the pull-up resistors.
That is, there are four pins in the IO pins, the number of pull-up resistors is 4 (R9, R10, R11 and R12), the IO pins are respectively connected to one ends of the 4 pull-up resistors, and the other ends of the 4 pull-up resistors are all connected to a power supply. The pull-up resistor is used for ensuring stable communication between the expansion circuit U2 and the singlechip 3.
As an embodiment, the circuit further comprises a first capacitor;
the first capacitor is connected with the third resistor in parallel, one end of the first capacitor is connected with the second output end of the photoelectric solid-state relay corresponding to the negative electrode of the single body to be tested, and the other end of the first capacitor is connected with the other end of the second resistor.
Specifically, the first capacitor is used for filtering the collected single voltage signal and guaranteeing the purity of the input signal to the operational amplifier. As shown in fig. 2, the connection relationship between the first capacitor C1 and the third resistor R3 is parallel connection, one end of the first capacitor C1 is connected to the second output end of the photoelectric solid-state relay 1 corresponding to the single battery 2 to be tested, and the other end of the first capacitor C1 is connected to the other end of the second resistor R2.
As an embodiment, the circuit further comprises a fourth resistor;
one end of the fourth resistor is connected with the output end of the operational amplifier, and the other end of the fourth resistor is connected with the singlechip.
Specifically, as shown in fig. 2, the fourth resistor R4 is used to send the battery voltage collected by the operational amplifier U1 to the ADC pin of the single-chip microcomputer 3. The number of the fourth resistors R4 is not limited in this embodiment, and may be set according to practical situations, for example, a line between the op-amp U1 and the singlechip 3 is long, and in order to reduce interference, a plurality of fourth resistors R4 are used to be connected in series.
In addition, one end of the third capacitor C3 in fig. 2 is connected to the positive terminal of the power supply of the operational amplifier U1, and the other end of the third capacitor C3 is grounded. One end of the fourth capacitor C4 is connected with the VDD end of the expansion circuit U2, and the other end of the fourth capacitor C4 is grounded.
As an embodiment, the operational amplifier in the circuit is a differential operational amplifier.
The differential operational amplifier has higher common-mode voltage input capability, and differential acquisition of battery voltage of the single battery to be tested is realized. The differential operational amplifier in this embodiment may be a high-side differential operational amplifier, or may be another differential operational amplifier, which is not limited herein and may be set according to practical situations.
As shown in fig. 2, the single chip 3 sends a communication instruction to the I2C I/O port of the extension circuit U2 through the I2C, so that the p1_3 of the GPIO pin of the extension circuit U2 outputs a low level (cell1_s is a low level), and the other pins are all high levels; at this time, the 3 pin and the 4 pin (the first input control end and the second input control end) of the photoelectric solid state relay 1 are completely conducted through CELL 1_S; the positive electrode CELL1 of the single battery to be tested is conducted through the 5 pin and the 6 pin (the first output end and the second output end) of the photoelectric solid state relay 1, the second resistor R2 and the third resistor R3 are divided, the first capacitor C1 is connected to the IN+ pin of the operational amplifier U1 after being filtered, the negative electrode CELL0 of the single battery to be tested is conducted through the 5 pin and the 6 pin (the first output end and the second output end) of the photoelectric solid state relay 1 and is connected to the IN-pin of the operational amplifier U1, and the voltage is sent to the ADC pin of the single chip microcomputer 3 through the fourth resistor R4 after the differential operation of the operational amplifier U1, and the single chip microcomputer 3 records the voltage as the single voltage of the single battery to be tested through the operation; when other to-be-detected single batteries CEL1_ … … CEL1_n are low level, the working principle is the same as that when CEL1_S is low level; the singlechip 3 continuously sends I2C communication instructions to the expansion circuit 3 to enable the P0_0-P1_7 to output low level in a round-robin manner, so that round-robin real-time acquisition of voltages (each single battery to be detected) of the first battery to the nth battery is realized.
It is understood that in this embodiment, only one unit cell is described, and the description of other unit cells is the same. When a plurality of single batteries exist, the connection relation of the single batteries is the same as that of the single batteries to be tested, a corresponding photoelectric solid-state relay is added for inputting other single batteries, meanwhile, the input of the corresponding photoelectric solid-state relay is connected with other GPIO pins of the expansion circuit, correspondingly, the output of OUT1 and OUT2 of the corresponding other single batteries is connected to a corresponding operational amplifier, and the connection relation of the corresponding single batteries to be tested and the connection relation of the single voltages to the operational amplifier is the same.
According to the corresponding connection relation among the expansion circuit, the first capacitor and the fourth resistor, which is provided by the embodiment of the utility model, the I2C communication is used for controlling the IO port by the singlechip through the arrangement of the expansion circuit, so that the use of the IO port of the singlechip is reduced, and the occupied resources of the IO port are saved. The arrangement of the first capacitor ensures that the input signal to the operational amplifier is pure, and the arrangement of the fourth resistor reduces interference.
On the basis of the embodiment, the equalization management is needed for the battery with the over-high single voltage, so the circuit also comprises an equalization circuit;
the equalizing circuit comprises an optical coupler, a MOS tube, a first diode, a second diode, a fifth resistor, a sixth resistor, a seventh resistor and an eighth resistor;
the anode of the single battery to be tested is respectively connected with one end of the fifth resistor, one end of the sixth resistor and the cathode of the first diode; the other end of the fifth resistor is connected with one output end of the optical coupler, and the other end of the sixth resistor is connected with the drain electrode of the MOS tube; the grid electrode of the MOS tube is respectively connected with one end of the seventh resistor, the cathode of the second diode and the other output end of the optical coupler;
the negative electrode of the single battery to be tested is respectively connected with the anode of the first diode, the source electrode of the MOS tube, the other end of the seventh resistor and the anode of the second diode;
the positive input end of the optical coupler is connected with one end of an eighth resistor, and the other end of the eighth resistor is connected with a power supply; the negative input end of the optical coupler is connected with the singlechip.
Specifically, fig. 3 is a schematic structural diagram of an equalization circuit according to an embodiment of the present utility model, as shown in fig. 3, only one single battery 2 to be measured is taken as an example, and may include a plurality of single batteries to be measured connected, where a connection relationship between the plurality of single batteries to be measured is the same as a connection relationship between one single battery to be measured, and a positive electrode of the single battery 2 to be measured is connected to one end of a fifth resistor R5, to one end of a sixth resistor R6, and to a cathode of a first diode DZ 1. The other end of the fifth resistor R5 is connected to one output terminal of the optocoupler U3, that is, the collector output terminal of the optocoupler U3. The other end of the sixth resistor R6 is connected to the drain of the MOS transistor Q1, and the gate of the Metal-Oxide-Semiconductor Field-Effect Transistor (MOS) transistor Q1 is connected to one end of the seventh resistor R7 and to the cathode of the second diode DZ2, and is connected to the other output end of the optocoupler U3, that is, the emitter output end of the optocoupler U3. The negative electrode of the single battery 2 to be tested is connected with the anode of the first diode DZ1, the source electrode of the MOS tube Q1 and the other end of the seventh resistor R7, and is connected with the anode of the second diode DZ 2. And a diode exists at the input end corresponding to the input end of the ground optical coupler U3, the anode of the diode is connected with a power supply, and the cathode of the diode is connected with the singlechip 3. The MOS tube Q1 is used for conducting the equalization resistor and the single battery, and discharging the single battery with higher voltage difference to enable the voltage difference to be consistent with the battery voltage of other single batteries. The battery voltage balance of the single battery is realized through the on and off of the MOS tube Q1 under the action of the sixth resistor R6. The fifth resistor R5 and the seventh resistor R7 are used for providing proper voltage division bias for the conduction of the MOS transistor Q1 through the conduction of the optocoupler U3.
The first diode DZ1 is used for stabilizing the input voltage of the battery not to exceed the limit value of the battery voltage, and the second diode DZ2 is used for protecting the MOS transistor Q1 and preventing the voltage from the grid electrode to the source electrode from exceeding the limit loss MOS transistor Q1 of the MOS Vgs.
As an embodiment, the circuit further comprises a second capacitor;
one end of the second capacitor is respectively connected with one end of the fifth resistor, one end of the sixth resistor and the cathode of the first diode; the other end of the second capacitor is connected with the negative electrode of the single battery to be tested.
Specifically, the second capacitor is used for filtering the battery voltage of the unit battery to be tested. The connection relation is shown in fig. 3, and one end of the second capacitor C2 is respectively connected with one end of the fifth resistor R5, one end of the sixth resistor R6 and the cathode of the first diode DZ 1; the other end of the second capacitor C2 is connected with the negative electrode of the single battery 2 to be tested.
As an embodiment, the first diode and the second diode are zener diodes.
The voltage stabilizing diode is characterized in that the current at two ends of the voltage stabilizing diode basically keeps unchanged before reverse electrification is broken down. Thus, after the voltage regulator is connected to the circuit, if the voltage at each point in the circuit fluctuates due to the power supply voltage, or other reasons, the voltage at both ends of the load will remain substantially unchanged.
As shown in fig. 3, when the singlechip 3 finds that the voltage of a certain battery is higher than that of other batteries in the process of collecting the electric pressure circulation of the battery cells, the equalization circuit starts to work at the moment; for example, when the cell voltage is collected, the cell voltage of the current cell2 to be measured is found to be higher than that of other sections, at the moment, the singlechip 3 sends a low-level signal to the CB1, and the pin at the input end of the optocoupler U3 is conducted through the low level sent by the singlechip 3; the secondary output pin of the optical coupler is conducted, and the MOS tube Q1 is conducted through bias provided by the partial voltage of the CELL1, the resistor R5 and the resistor R7 and the voltage stabilization of the second diode DZ 2; the sixth resistor R6 of the equalizing resistor is connected in parallel with the space between the battery anode CELL1 of the single battery 2 to be tested and the battery cathode CELL0 of the single battery 2 to be tested, and discharges the single battery 2 to be tested; meanwhile, the battery single electric pressure tracking acquisition circuit acquires the voltage of each battery in real time, and when the battery voltage of the single battery 2 to be detected is found to be the same as other batteries, the singlechip 3 sends an instruction to turn off the MOS tube Q1 so as to realize balanced turn-off; the overvoltage balance control principle of other batteries is the same as that of the other batteries.
It can be understood that in this embodiment, description is only performed for one single battery, description conditions of other single batteries are the same, and when a plurality of single batteries exist, connection relationships of the single batteries are the same as those of the single batteries to be tested so as to be connected to other output ends of the optical coupler, and accordingly, the single chip microcomputer is connected to other input ends of the corresponding optical coupler so as to control the corresponding other single batteries. The connection relation of the equalization circuit provided by the embodiment realizes the equalization management of different batteries of the battery pack, ensures that the voltage errors of the batteries are within a certain range so as to avoid overcharging caused by larger single voltage errors, and prolongs the service life of the batteries.
Finally, the embodiment of the present utility model further provides a battery detection chip, which includes the above-mentioned single battery voltage detection circuit, and since the above description of each component is detailed, the description of this embodiment is omitted.
The utility model provides a battery detection chip, which comprises a single battery voltage detection circuit, wherein the circuit comprises at least two photoelectric solid state relays, at least one single battery to be detected, a first resistor, a second resistor, a third resistor, an operational amplifier and a singlechip; the positive electrode and the negative electrode of the single battery to be tested are correspondingly connected with the first output ends of the two photoelectric solid state relays respectively, the first input control ends of the two photoelectric solid state relays are connected with one end of a first resistor, and the other end of the first resistor is connected with a power supply; the second input control ends of the two photoelectric solid state relays are connected with the singlechip; the second output end of the photoelectric solid-state relay corresponding to the positive electrode and the negative electrode of the single battery to be tested is correspondingly connected with one end of the second resistor and one end of the third resistor; the other end of the second resistor is connected with the other end of the third resistor and is connected with the positive input end of the operational amplifier; one end of the third resistor is connected with the negative input end of the operational amplifier, and the output end of the operational amplifier is connected with the singlechip. The chip realizes the voltage acquisition of the single battery through the control of the singlechip, does not output other batteries in the voltage acquisition process of the single battery, so as to save power consumption and avoid the consumption of the battery voltages of other single batteries. In addition, when the output end of the single battery is connected with the operational amplifier, the voltage division is realized only through one second resistor, the number of the resistor voltage division is reduced, and the resistance precision of the resistor is controlled in a uniform range so as to ensure the resistance precision.
The single battery voltage detection circuit and the battery detection chip provided by the utility model are described in detail above. In the description, each embodiment is described in a progressive manner, and each embodiment is mainly described by the differences from other embodiments, so that the same similar parts among the embodiments are mutually referred. For the device disclosed in the embodiment, since it corresponds to the method disclosed in the embodiment, the description is relatively simple, and the relevant points refer to the description of the method section. It should be noted that it will be apparent to those skilled in the art that various modifications and adaptations of the utility model can be made without departing from the principles of the utility model and these modifications and adaptations are intended to be within the scope of the utility model as defined in the following claims.
It should also be noted that in this specification, relational terms such as first and second, and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Moreover, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one … …" does not exclude the presence of other like elements in a process, method, article, or apparatus that comprises the element.
Claims (10)
1. The single battery voltage detection circuit is characterized by comprising at least two photoelectric solid state relays, at least one single battery to be detected, a first resistor, a second resistor, a third resistor, an operational amplifier and a single chip microcomputer;
the positive electrode and the negative electrode of the single battery to be tested are correspondingly connected with the first output ends of the two photoelectric solid state relays respectively, the first input control ends of the two photoelectric solid state relays are connected with one end of the first resistor, and the other end of the first resistor is connected with a power supply; the second input control ends of the two photoelectric solid state relays are connected with the singlechip;
the second output end of the photoelectric solid-state relay corresponding to the positive electrode and the negative electrode of the single battery to be detected is correspondingly connected with one end of the second resistor and one end of the third resistor; the other end of the second resistor is connected with the other end of the third resistor and is connected with the positive input end of the operational amplifier; one end of the third resistor is connected with the negative input end of the operational amplifier, and the output end of the operational amplifier is connected with the singlechip.
2. The single cell voltage detection circuit according to claim 1, wherein when the number of pins of the single chip microcomputer is smaller than a preset number, the circuit further comprises an expansion circuit;
the second input control ends of the two photoelectric solid-state relays are connected with GPIO pins of the expansion circuit, and IO pins of the expansion circuit are respectively connected with one end of a pull-up resistor; and the IO pin is connected with the singlechip.
3. The single cell voltage detection circuit according to claim 2, wherein the IO pins of the extension circuit are respectively connected with one end of a pull-up resistor, comprising:
the number of the pull-up resistors is the same as the number of the IO pins, and the IO pins of the expansion circuit are correspondingly connected with one end of the pull-up resistors.
4. A cell voltage detection circuit according to any one of claims 1 to 3, further comprising a first capacitor;
the first capacitor is connected with the third resistor in parallel, one end of the first capacitor is connected with the second output end of the photoelectric solid-state relay corresponding to the negative electrode of the single battery to be tested, and the other end of the first capacitor is connected with the other end of the second resistor.
5. The cell voltage detection circuit of claim 4, further comprising a fourth resistor;
one end of the fourth resistor is connected with the output end of the operational amplifier, and the other end of the fourth resistor is connected with the singlechip.
6. The cell voltage detection circuit according to claim 5, further comprising an equalization circuit;
the equalization circuit comprises an optical coupler, an MOS tube, a first diode, a second diode, a fifth resistor, a sixth resistor, a seventh resistor and an eighth resistor;
the positive electrode of the single battery to be tested is respectively connected with one end of the fifth resistor, one end of the sixth resistor and the cathode of the first diode; the other end of the fifth resistor is connected with one output end of the optical coupler, and the other end of the sixth resistor is connected with the drain electrode of the MOS tube; the grid electrode of the MOS tube is respectively connected with one end of the seventh resistor, the cathode of the second diode and the other output end of the optical coupler;
the negative electrode of the single battery to be tested is respectively connected with the anode of the first diode, the source electrode of the MOS tube, the other end of the seventh resistor and the anode of the second diode;
the positive input end of the optical coupler is connected with one end of the eighth resistor, and the other end of the eighth resistor is connected with a power supply; and the negative input end of the optical coupler is connected with the singlechip.
7. The cell voltage detection circuit of claim 6, further comprising a second capacitor;
one end of the second capacitor is respectively connected with one end of the fifth resistor, one end of the sixth resistor and the cathode of the first diode; and the other end of the second capacitor is connected with the negative electrode of the single battery to be tested.
8. The cell voltage detection circuit of claim 1, wherein the op-amp is a differential op-amp.
9. The cell voltage detection circuit of claim 7, wherein the first diode and the second diode are zener diodes.
10. A battery detection chip comprising the single cell voltage detection circuit according to any one of claims 1 to 9.
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| CN202320690061.XU CN219417591U (en) | 2023-03-31 | 2023-03-31 | Single battery voltage detection circuit and battery detection chip |
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| CN202320690061.XU CN219417591U (en) | 2023-03-31 | 2023-03-31 | Single battery voltage detection circuit and battery detection chip |
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