CN219268750U - Control circuit of power driver - Google Patents
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- CN219268750U CN219268750U CN202223544994.2U CN202223544994U CN219268750U CN 219268750 U CN219268750 U CN 219268750U CN 202223544994 U CN202223544994 U CN 202223544994U CN 219268750 U CN219268750 U CN 219268750U
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Abstract
The present utility model provides a control circuit of a driver, the control circuit comprising: the device comprises a CPU, an optocoupler driving unit, an RS485 communication unit and a CAN bus communication unit; the optocoupler driving unit is used for outputting rotating speed and steering control signals to the power driving bottom plate according to a first control signal sent by the CPU; the RS485 communication unit is used for transmitting the received first communication signal output by the power driving base plate to the CPU; the CAN bus communication unit is used for transmitting the received second communication signal output by the power bottom plate to the CPU; the CPU is also used for sending a first control signal to the optocoupler driving unit according to the received first communication signal and the received second communication signal. The problem that the service life of a power driver is shortened due to heat generation in a power driving mode in the prior art is solved.
Description
Technical Field
The present disclosure relates to electronic technology, and more particularly, to a control circuit of a power driver.
Background
In the field of armored vehicles, a direct current motor is one of important driving components of the armored vehicle, and accurate control of the direct current motor is important for the armored vehicle. The power driver is usually used for driving the direct current motor, however, in the prior art, the power driver and the control of the power driver are integrally designed through a circuit board, and the control of the direct current motor is realized by sharing one controller, however, the power driver can generate larger heat, and the service life of the power driver is reduced.
It can be seen that the power driving method in the prior art has the problem that the service life of the power driver is reduced due to heat generation.
Disclosure of Invention
Aiming at the defects existing in the prior art, the utility model provides a control circuit of a power driver, which solves the problem that the service life of the power driver is reduced due to heat generation in a power driving mode existing in the prior art.
The present utility model provides a control circuit of a power driver, the control circuit comprising: the device comprises a CPU, an optocoupler driving unit, an RS485 communication unit and a CAN bus communication unit; the optocoupler driving unit is respectively connected with the CPU and the power driving bottom plate and is used for outputting rotating speed and steering control signals to the power driving bottom plate according to a first control signal sent by the CPU; the RS485 communication unit is respectively connected with the CPU and the power driving bottom plate and is used for transmitting the received first communication signal output by the power driving bottom plate to the CPU; the CAN bus communication unit is respectively connected with the CPU and the power driving base plate and is used for transmitting the received second communication signal output by the power base plate to the CPU; the CPU is also used for sending a first control signal to the optocoupler driving unit according to the received first communication signal and the received second communication signal.
Optionally, the optocoupler driving unit includes: the optical coupler driving chip, the first resistor, the second resistor, the third resistor, the fourth resistor, the optical coupler driving chip, the fifth resistor, the sixth resistor, the seventh resistor and the eighth resistor; the first end of the first resistor is connected with the first power supply end, and the second end of the first resistor is respectively connected with the optocoupler driving chip and the CPU; the first end of the second resistor is connected with the first power supply end, and the second end of the second resistor is respectively connected with the optocoupler driving chip and the CPU; the first end of the third resistor is connected with the first power supply end, and the second end of the third resistor is respectively connected with the optocoupler driving chip and the CPU; the first end of the fourth resistor is connected with the first power supply end, and the second end of the fourth resistor is respectively connected with the optocoupler driving chip and the CPU; the first end of the fifth resistor is connected with the optocoupler driving chip, and the second end of the fifth resistor is connected with the power driving bottom plate; the first end of the sixth resistor is connected with the optocoupler driving chip, and the second end of the sixth resistor is connected with the power driving bottom plate; the first end of the seventh resistor is connected with the optocoupler driving chip, and the second end of the seventh resistor is connected with the power driving bottom plate; and the first end of the eighth resistor is connected with the optocoupler driving chip, and the second end of the eighth resistor is connected with the power driving bottom plate.
Optionally, the RS485 communication unit includes an RS485 communication chip, and the model of the RS485 communication chip is ADM2582EBRWZ; the CAN bus communication unit comprises a CAN bus communication chip, and the model of the CAN bus communication chip is ISO1050DUBR.
Optionally, the control circuit further includes: a first relay and a second relay; the first relay is respectively connected with the CPU and the power driving bottom plate and is used for controlling whether to output a starting signal sent by the CPU to the power driving bottom plate or not; the second relay is respectively connected with the CPU and the power driving bottom plate and used for controlling whether to output a start ready signal sent by the CPU to the power driving bottom plate.
Optionally, the control circuit further includes: a power management unit; the power management unit is respectively connected with an external power supply, the CPU, the RS485 communication unit and the CAN bus communication unit and is used for converting the external power supply voltage into working voltages of the CPU, the RS485 communication unit and the CAN bus communication unit.
Optionally, the power management unit includes: the device comprises a filter, a first transformer, a second transformer and a third transformer; the filter is respectively connected with the external power supply, the first transformer and the second transformer, and is used for filtering the first voltage output by the external power supply and outputting the first voltage to the first transformer and the second transformer respectively; the first transformer is respectively connected with the first ends of the RS485 communication unit and the CAN bus communication unit, and is used for converting the first voltage into a second voltage and outputting the second voltage to the RS485 communication unit and the CAN bus communication unit respectively; the second transformer is connected with the second end of the CAN bus communication unit and is used for converting the first voltage into a second voltage and outputting the second voltage to the CAN bus communication unit; the third transformer is respectively connected with the second transformer and the CPU, and is used for converting the second working voltage output by the second transformer into a third working voltage and outputting the third working voltage to the CPU.
Optionally, the control circuit further includes: a power indication unit, the power indication unit comprising: a tenth resistor and a diode; the first end of the tenth resistor is connected with the output end of the second transformer, and the second end of the tenth resistor is connected with the anode of the diode; the cathode of the diode is grounded.
Optionally, the control circuit further includes: a reset unit; the reset unit is connected with the CPU and is used for resetting the CPU.
Optionally, the control circuit further includes: a crystal oscillator unit; the crystal oscillator unit is connected with the CPU and is used for providing a clock signal for the CPU.
Optionally, the control circuit further includes: a data storage unit; the data storage unit is connected with the CPU and used for storing data of the CPU.
Compared with the prior art, the utility model has the following beneficial effects:
the optical coupler driving unit outputs rotating speed and steering control signals to the power driving base plate according to first control signals sent by the CPU, the power driving base plate realizes driving control of the direct current motor according to the rotating speed and the steering control signals, the RS485 communication unit receives first communication signals output by the power driving base plate, the CAN bus communication unit receives second communication signals output by the power driving base plate, the CPU CAN send the first control signals according to the received first communication signals and second communication signals, and the rotating speed and the steering of the motor CAN be adjusted according to feedback. The control circuit of the power driver independently provides a control signal for the power driving bottom plate, so that the control of the direct current motor is realized, compared with the independent control circuit in the prior art, the control circuit can reduce the heating value, prevent the power driver from aging rapidly, prolong the service life of the power driver and improve the reliability of the power driver.
Drawings
Fig. 1 is a block diagram of a control circuit of a power driver according to an embodiment of the present utility model;
fig. 2 is a circuit diagram of an RS485 communication unit and a CAN bus communication unit provided by an embodiment of the present utility model;
fig. 3 is a circuit diagram of an optocoupler driving unit according to an embodiment of the present utility model;
fig. 4 is a circuit diagram of a first relay and a second relay according to an embodiment of the present utility model;
fig. 5 and fig. 6 are circuit diagrams of a power management unit according to an embodiment of the present utility model;
fig. 7 is a circuit diagram of a power indication unit according to an embodiment of the present utility model;
fig. 8 is a circuit diagram of a data storage unit according to an embodiment of the present utility model.
Detailed Description
The technical scheme of the utility model is further described below with reference to the accompanying drawings and examples.
Fig. 1 is a block diagram of a control circuit of a power driver according to an embodiment of the present utility model, as shown in fig. 1, where the control circuit includes: the device comprises a CPU100, an optocoupler driving unit 200, an RS485 communication unit 300 and a CAN bus communication unit 400;
the optocoupler driving unit 200 is respectively connected with the CPU100 and the power driving base plate, and is configured to output a rotation speed and a steering control signal to the power driving base plate according to a first control signal sent by the CPU100;
the RS485 communication unit 300 is respectively connected to the CPU100 and the power driving base board, and is configured to transmit a received first communication signal output by the power driving base board to the CPU100;
the CAN bus communication unit 400 is respectively connected to the CPU100 and the power driving chassis, and is configured to transmit a second communication signal output by the received power chassis to the CPU100;
the CPU100 is further configured to send a first control signal to the optocoupler driving unit 200 according to the received first communication signal and second communication signal.
In this embodiment, the optocoupler driving unit 200 outputs a rotation speed and a steering control signal to the power driving base board according to a first control signal sent by the CPU100, and the power driving base board further realizes driving control of the dc motor according to the rotation speed and the steering control signal, where the rotation speed and the steering control signal include: a high-speed reverse rotation control signal, a high-speed forward rotation control signal, a low-speed reverse rotation control signal, and a low-speed forward rotation control signal. The first communication signal output by the power driving base plate is received through the RS485 communication unit 300, the second communication signal output by the power driving base plate is received through the CAN bus communication unit 400, the CPU100 CAN send out a first control signal according to the received first communication signal and second communication signal, and the motor CAN be adjusted in rotation speed and steering according to feedback. Compared with the prior art, the control circuit is independently provided, so that the heating value can be reduced, the power driver can be prevented from being aged rapidly, the service life of the power driver is prolonged, and the reliability of the power driver is improved.
It should be noted that, in this embodiment, the specific model of the CPU100 is C8051F040/2/4/6, and the present utility model does not relate to improvement of the computer program, and the improvement point is the connection relationship. Fig. 2 is a circuit diagram of an RS485 communication unit 300 and a CAN bus communication unit 400 provided by the embodiment of the present utility model, as shown in fig. 2, a specific model adopted by an RS485 communication chip U1 in the RS485 communication unit 300 is ADM2582EBRWZ, and is specifically connected to a power driving base board through a pin 17 and a pin 18, and is connected to a CPU100 through a pin 4 and a pin 7; the specific model adopted by the CAN bus communication chip U2 in the CAN bus communication unit 400 is ISO1050DUBR, and is connected with the power driving bottom plate through a pin 6 and a pin 7, and is connected with the CPU100 through a pin 2 and a pin 3; two different types of communication data are respectively transmitted by arranging the CAN bus communication unit 400 and the RS485 communication unit 300.
Fig. 3 is a circuit diagram of an optocoupler driving unit 200 according to an embodiment of the present utility model, as shown in fig. 3, the optocoupler driving unit 200 includes: the optical coupler driving chip U3, the first resistor R1, the second resistor R2, the third resistor R3, the fourth resistor R4, the optical coupler driving chip U3, the fifth resistor R5, the sixth resistor R6, the seventh resistor R7 and the eighth resistor R8; the first end of the first resistor R1 is connected with the first power supply end, and the second end of the first resistor R1 is respectively connected with the optocoupler driving chip U3 and the CPU100; the first end of the second resistor R2 is connected with the first power supply end, and the second end of the second resistor R2 is respectively connected with the optocoupler driving chip U3 and the CPU100; the first end of the third resistor R3 is connected with the first power supply end, and the second end of the third resistor R3 is respectively connected with the optocoupler driving chip U3 and the CPU100; the first end of the fourth resistor R4 is connected with the first power supply end, and the second end of the fourth resistor R4 is respectively connected with the optocoupler driving chip U3 and the CPU100; the first end of the fifth resistor R5 is connected with the optocoupler driving chip U3, and the second end of the fifth resistor R5 is connected with the power driving bottom plate; the first end of the sixth resistor R6 is connected with the optocoupler driving chip U3, and the second end of the sixth resistor R6 is connected with the power driving bottom plate; the first end of the seventh resistor R7 is connected with the optocoupler driving chip U3, and the second end of the seventh resistor R7 is connected with the power driving bottom plate; the first end of the eighth resistor R8 is connected with the optocoupler driving chip U3, and the second end of the eighth resistor R8 is connected with the power driving bottom plate.
In this embodiment, the CPU100 and the driving base plate may be isolated by the optocoupler driving chip U3, specifically, the first control signal sent by the CPU100 is received by the 16 th pin, the 14 th pin, the 12 th pin and the 10 th pin of the optocoupler driving chip, the high-speed reverse signal is output to the power driving base plate through the second end of the fifth resistor R5, the high-speed forward signal is output to the power driving base plate through the second end of the sixth resistor R6, the low-speed reverse signal is output to the power driving base plate through the second end of the seventh resistor R7, the low-speed forward signal is output to the power driving base plate through the second end of the eighth resistor R8, and the specific model adopted by the optocoupler driving chip U3 may be TLP521-4-SM.
Fig. 4 is a circuit diagram of a first relay U4 and a second relay U5 according to an embodiment of the present utility model, as shown in fig. 4, where the control circuit further includes: a first relay U4; the first relay U4 is connected to the CPU100 and the power driving chassis, respectively, and is configured to control whether to output a start signal sent by the CPU100 to the power driving chassis.
The control circuit further includes: a second relay U5; the second relay U5 is connected to the CPU100 and the power driving chassis, respectively, and is configured to control whether to output a ready-to-start signal sent by the CPU100 to the power driving chassis.
In this embodiment, the first relay U4 is used to output a start signal to the power driving base plate, to control whether the dc motor is started, and the second relay U5 is used to output a start ready signal to the power driving base plate. The specific model used for the first relay U4 and the second relay U5 may be PVG612APBF.
Fig. 5 and fig. 6 are circuit diagrams of a power management unit according to an embodiment of the present utility model, where, as shown in fig. 5 and fig. 6, the control circuit further includes: a power management unit; the power management unit is respectively connected with an external power supply, the CPU100, the RS485 communication unit 300 and the CAN bus communication unit 400, and is used for converting the external power supply voltage into working voltages of the CPU100, the RS485 communication unit 300 and the CAN bus communication unit 400.
The power management unit includes: a filter LC, a first transformer U6, a second transformer U7 and a third transformer U8; the filter LC is respectively connected with the external power supply, the first transformer U6 and the second transformer U7, and is used for filtering the first voltage output by the external power supply and outputting the first voltage to the first transformer U6 and the second transformer U7 respectively; the first transformer U6 is connected to the first ends of the RS485 communication unit 300 and the CAN bus communication unit 400, and is configured to convert the first voltage into a second voltage, and further configured to output the second voltage to the RS485 communication unit 300 and the CAN bus communication unit 400, respectively; the second transformer U7 is connected to the second end of the CAN bus communication unit 400, and is configured to convert the first voltage into a second voltage, and further configured to output the second voltage to the CAN bus communication unit 400; the third transformer U8 is connected to the second transformer U7 and the CPU100, respectively, and is configured to convert the second working voltage output by the second transformer U7 into a third working voltage, and further configured to output the third working voltage to the CPU 100.
In this embodiment, the filter LC is connected to an external power supply, and is used to filter an input external voltage, convert the received first voltage into a second voltage through the first transformer U6, where the second voltage may be used as the working voltage of the RS485 communication unit 300 and the CAN bus communication unit 400, the second transformer U7 converts the first voltage into the second voltage, the second voltage is used to energize the other end of the CAN bus communication unit 400, the third transformer U8 converts the second voltage into a third voltage, the third voltage is used as the working voltage of the CPU100, the first voltage is 24V, the second voltage is 5V, and the third voltage is 3.3V.
It should be noted that, the specific model of the filter LC may be DJLCDY, the specific models of the second transformer U7 and the third transformer U8 may be NDU06-18SV0, and the specific model of the third transformer U8 may be AMS1117-3.3.
Fig. 7 is a circuit diagram of a power indication unit according to an embodiment of the present utility model, as shown in fig. 7, where the control circuit further includes: a power indication unit, the power indication unit comprising: a tenth resistor R10 and a diode D1; a first end of the tenth resistor R10 is connected to the output end of the second transformer U7, and a second end of the tenth resistor R10 is connected to the anode of the diode D1; the cathode of the diode D1 is grounded.
In this embodiment, when the second transformer U7 normally outputs the second voltage, the diode D1 is turned on, and the diode D1 emits light to prompt the user to turn on the power of the control circuit, and when the diode D1 is turned off, the diode D1 is used to prompt the user to turn off the power of the control circuit. The specific model of diode D1 may be L-53SGD.
Fig. 8 is a circuit diagram of a data storage unit according to an embodiment of the present utility model, as shown in fig. 8, where the control circuit further includes: a data storage unit U9; the data storage unit U9 is connected to the CPU100, and is configured to store data of the CPU 100.
It should be noted that, the specific model of the data storage unit U9 may be FM24CL16, and is specifically connected to the CPU100 through the pin 5 and the pin 6.
In another embodiment of the present utility model, the control circuit further includes: a reset unit; the reset unit is connected to the CPU100 and is configured to reset the CPU 100. It should be noted that the model of the reset unit may be MAX811TEUX-T.
In another embodiment of the present utility model, the control circuit further includes: a crystal oscillator unit; the crystal oscillator unit is connected with the CPU100 and is used for providing a clock signal for the CPU 100. The specific model of the crystal oscillator unit can be HX0-53B-22.1184MHZ.
It should be noted that in this document, relational terms such as "first" and "second" and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Moreover, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one … …" does not exclude the presence of other like elements in a process, method, article, or apparatus that comprises the element.
Finally, it is noted that the above embodiments are only for illustrating the technical solution of the present utility model and not for limiting the same, and although the present utility model has been described in detail with reference to the preferred embodiments, it should be understood by those skilled in the art that modifications and equivalents may be made thereto without departing from the spirit and scope of the technical solution of the present utility model, which is intended to be covered by the scope of the claims of the present utility model.
Claims (10)
1. A control circuit for a power driver, the control circuit comprising: the device comprises a CPU, an optocoupler driving unit, an RS485 communication unit and a CAN bus communication unit;
the optocoupler driving unit is respectively connected with the CPU and the power driving bottom plate and is used for outputting rotating speed and steering control signals to the power driving bottom plate according to a first control signal sent by the CPU;
the RS485 communication unit is respectively connected with the CPU and the power driving bottom plate and is used for transmitting the received first communication signal output by the power driving bottom plate to the CPU;
the CAN bus communication unit is respectively connected with the CPU and the power driving bottom plate and is used for transmitting the received second communication signal output by the power driving bottom plate to the CPU;
the CPU is also used for sending a first control signal to the optocoupler driving unit according to the received first communication signal and the received second communication signal.
2. The control circuit of a power driver of claim 1, wherein the optocoupler drive unit comprises: the optical coupler driving chip, the first resistor, the second resistor, the third resistor, the fourth resistor, the optical coupler driving chip, the fifth resistor, the sixth resistor, the seventh resistor and the eighth resistor;
the first end of the first resistor is connected with the first power supply end, and the second end of the first resistor is respectively connected with the optocoupler driving chip and the CPU;
the first end of the second resistor is connected with the first power supply end, and the second end of the second resistor is respectively connected with the optocoupler driving chip and the CPU;
the first end of the third resistor is connected with the first power supply end, and the second end of the third resistor is respectively connected with the optocoupler driving chip and the CPU;
the first end of the fourth resistor is connected with the first power supply end, and the second end of the fourth resistor is respectively connected with the optocoupler driving chip and the CPU;
the first end of the fifth resistor is connected with the optocoupler driving chip, and the second end of the fifth resistor is connected with the power driving bottom plate;
the first end of the sixth resistor is connected with the optocoupler driving chip, and the second end of the sixth resistor is connected with the power driving bottom plate;
the first end of the seventh resistor is connected with the optocoupler driving chip, and the second end of the seventh resistor is connected with the power driving bottom plate;
and the first end of the eighth resistor is connected with the optocoupler driving chip, and the second end of the eighth resistor is connected with the power driving bottom plate.
3. The control circuit of a power driver of claim 1, wherein the RS485 communication unit comprises an RS485 communication chip, the model of the RS485 communication chip being ADM2582EBRWZ; the CAN bus communication unit comprises a CAN bus communication chip, and the model of the CAN bus communication chip is ISO1050DUBR.
4. The control circuit of a power driver of claim 1, wherein the control circuit further comprises: a first relay and a second relay;
the first relay is respectively connected with the CPU and the power driving bottom plate and is used for controlling whether to output a starting signal sent by the CPU to the power driving bottom plate or not;
the second relay is respectively connected with the CPU and the power driving bottom plate and used for controlling whether to output a start ready signal sent by the CPU to the power driving bottom plate.
5. The control circuit of a power driver of claim 1, wherein the control circuit further comprises: a power management unit;
the power management unit is respectively connected with an external power supply, the CPU, the RS485 communication unit and the CAN bus communication unit and is used for converting the external power supply voltage into working voltages of the CPU, the RS485 communication unit and the CAN bus communication unit.
6. The control circuit of a power driver of claim 5, wherein the power management unit comprises: the device comprises a filter, a first transformer, a second transformer and a third transformer;
the filter is respectively connected with the external power supply, the first transformer and the second transformer, and is used for filtering the first voltage output by the external power supply and outputting the first voltage to the first transformer and the second transformer respectively;
the first transformer is respectively connected with the first ends of the RS485 communication unit and the CAN bus communication unit, and is used for converting the first voltage into a second voltage and outputting the second voltage to the RS485 communication unit and the CAN bus communication unit respectively;
the second transformer is connected with the second end of the CAN bus communication unit and is used for converting the first voltage into a second voltage and outputting the second voltage to the CAN bus communication unit;
the third transformer is respectively connected with the second transformer and the CPU, and is used for converting the second working voltage output by the second transformer into a third working voltage and outputting the third working voltage to the CPU.
7. The control circuit of a power driver of claim 6, wherein the control circuit further comprises: a power indication unit, the power indication unit comprising: a tenth resistor and a diode;
the first end of the tenth resistor is connected with the output end of the second transformer, and the second end of the tenth resistor is connected with the anode of the diode;
the cathode of the diode is grounded.
8. The control circuit of a power driver of claim 1, wherein the control circuit further comprises: a reset unit;
the reset unit is connected with the CPU and is used for resetting the CPU.
9. The control circuit of a power driver of claim 1, wherein the control circuit further comprises: a crystal oscillator unit;
the crystal oscillator unit is connected with the CPU and is used for providing a clock signal for the CPU.
10. The control circuit of a power driver of claim 1, wherein the control circuit further comprises: a data storage unit;
the data storage unit is connected with the CPU and used for storing data of the CPU.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
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| CN202223544994.2U CN219268750U (en) | 2022-12-29 | 2022-12-29 | Control circuit of power driver |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202223544994.2U CN219268750U (en) | 2022-12-29 | 2022-12-29 | Control circuit of power driver |
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| CN219268750U true CN219268750U (en) | 2023-06-27 |
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| CN202223544994.2U Active CN219268750U (en) | 2022-12-29 | 2022-12-29 | Control circuit of power driver |
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| CN (1) | CN219268750U (en) |
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- 2022-12-29 CN CN202223544994.2U patent/CN219268750U/en active Active
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