CN219246068U - Multi-interface data processing core board - Google Patents

Multi-interface data processing core board Download PDF

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Publication number
CN219246068U
CN219246068U CN202222998509.2U CN202222998509U CN219246068U CN 219246068 U CN219246068 U CN 219246068U CN 202222998509 U CN202222998509 U CN 202222998509U CN 219246068 U CN219246068 U CN 219246068U
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interface
pins
core board
data processing
processing core
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CN202222998509.2U
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朱泽诚
卢建明
蒋宝
高振浩
钟小平
辛永荣
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Shenzhen Liangzuan Technology Co ltd
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Shenzhen Liangzuan Technology Co ltd
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    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00Energy efficient computing, e.g. low power processors, power management or thermal management

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Abstract

The utility model relates to a multi-interface data processing core board, which is characterized by comprising: the multifunctional portable electronic device comprises a core board, a processor, a memory module, a storage and a power module which are electrically connected, wherein the core board is provided with multiple interfaces, and the multiple interfaces comprise a TF card interface, a USB interface, an expansion interface, a display interface, an audio interface, a camera interface, a power interface and an Ethernet interface. The stamp hole pin is adopted, so that the stamp hole pin can be connected with external equipment, and the connection direction is set to be vertical, so that the occupied space can be reduced, and the universality of the core board can be improved; the stamp hole pins are arranged at equal intervals, so that the core board can be matched and connected with other external equipment, and the performance of the external equipment is improved; the capability of the core board for connecting with peripheral devices can be expanded by adding multiple interfaces, such as a TF card interface, a USB interface, an expansion interface, a display interface and the like, on the core board.

Description

Multi-interface data processing core board
Technical Field
The utility model relates to the technical field of core boards, in particular to a multi-interface data processing core board.
Background
The core board is an electronic main board for packaging and encapsulating the core functions of the MINI PC. Most core boards integrate a CPU, memory devices and pins, and are connected to a mating backplane through pins to implement a system chip in a certain area. Such a system is also often referred to as an embedded development platform or the like. Since the core board integrates the general functions of the core, it has the versatility that one core board can customize various different backplanes, which greatly improves the development efficiency of the data processing apparatus. Because the core board is separated as an independent module, the development difficulty is reduced, and the stability and maintainability of the system are improved. A group of intelligent devices are often provided with a plurality of groups of core boards with different systems, and users can change the operating system of the device by only plugging the device with the core boards with different systems, so that the intelligent device is convenient to use and is widely used.
With the advent of the intelligent age, a single core board is required to have multiple functions so as to be applicable to the fields of intelligent hardware, industrial internet of things and the like. The interface and the function that many core boards have in the present market are extremely limited, can't satisfy the requirement of a plurality of trades and fields such as vending equipment, face recognition equipment, intelligent robot, O2O intelligent device, self-service terminal.
Disclosure of Invention
The utility model aims to solve the technical problems that a plurality of embedded core boards in the current market have extremely limited interfaces and functions, cannot meet the requirements of a plurality of industries and fields, and provides a multi-interface data processing core board aiming at the defects of the prior art, which comprises the following components:
the core board is provided with a plurality of interfaces, wherein the interfaces comprise a TF card interface, a USB interface, an expansion interface, a display interface, an audio interface, a camera interface, a power interface and an Ethernet interface;
the processor is provided with a plurality of functional pins, the multi-interface data processing core board is provided with a stamp Kong Yinjiao, and the stamp hole pins are used for leading out the plurality of functional pins of the processor;
the stamp hole pins are uniformly arranged on the multi-interface data processing core board, and the stamp hole pins can be connected with external equipment in the vertical direction.
Preferably, the spacing between the stamp hole pins is 1.0mm.
Preferably, 196 stamp hole pins are arranged, and 196 stamp hole pins are respectively connected with the processor.
Preferably, 196 stamp hole pins respectively refer to:
1 st to 9 th pins are HDMI interface pins;
pins 11 to 20 are MIPI-CSI interface pins;
pins 22 to 31 are MIPI interface pins;
the 33 th to 37 th pins, the 41 st to 49 th pins, the 80 th to 83 th pins, the 107 th to 118 th pins and the 125 th to 126 th pins are GPIO interface pins;
pins 51 to 60 and 62 to 72 are LVDS interface pins;
pins 73 to 78 are SIP interface pins;
pins 84 to 85, 102 to 103, 105 to 106 and 123 to 124 are I2C interface pins;
the 86 th to 87 th pins, 89 th to 94 th pins and 96 th to 97 th pins are USB interface pins;
pins 98 to 101 and 148 to 151 are UART interface pins;
pins 120-122 are ADC interface pins;
the 128 th to 147 th pins are Ethernet interface pins;
pins 152 to 159 are interface pins of the TF card;
pins 160 to 171 and 173 to 175 are WIFI+BT pins;
pins 176-185 are I2S interface pins;
the 187 th to 196 th pins are eDP interface pins.
Preferably, the processor is a rayleigh micro RK3288 processor.
Preferably, the expansion interface includes PWM interface, IR interface, UART interface, ADC interface, GPIO interface, I2C interface, and SPI interface.
Preferably, the display interface includes an LVDS interface, an HDMI interface, an MIPI interface, and an eDP interface.
Preferably, the audio interface includes a headphone interface, a microphone interface, and an I2S interface.
The multi-interface data processing core board has the following beneficial effects:
(1) The stamp hole pin is adopted, so that the stamp hole pin can be connected with external equipment, and the connection direction is set to be vertical, so that the occupied space can be reduced, and the universality of the core board can be improved;
(2) The stamp hole pins are arranged at equal intervals, so that the core board can be matched and connected with other external equipment, and the performance of the external equipment is improved;
(3) The multi-interface, such as TF card interface, USB interface, expansion interface, display interface, etc., is added on the core board, which can expand the ability of the core board to connect with the peripheral equipment;
(4) By arranging the power supply module, the power supply module can provide voltages with various different requirements to stably supply power to different functional modules on the core board, so that the expansibility of the core board is ensured;
(5) The processor is selected as a Rayleigh core micro RK3288 processor, integrates a four-core Cortex-A17 processing chip and a Mali-T764 high-performance four-core GPU, can support video decoding in various formats, can be applied to various intelligent terminal equipment, and can be widely applied to the fields of face recognition, face payment, edge calculation, voice recognition analysis and Internet of things.
Drawings
In order to more clearly illustrate the embodiments of the present utility model or the technical solutions in the prior art, the drawings that are required in the embodiments or the description of the prior art will be briefly described, and it is obvious that the drawings in the following description are only some embodiments of the present utility model, and other drawings may be obtained according to the structures shown in these drawings without inventive effort for a person skilled in the art. The utility model will be further described with reference to the accompanying drawings and examples, in which:
FIG. 1 is a schematic diagram of the functional modules of a multi-interface data processing core board of the present utility model;
FIG. 2 is a schematic diagram of a processor in a multi-interface data processing core board of the present utility model coupled to multiple interfaces;
FIG. 3 is a schematic diagram of a preferred architecture of a multi-interface data processing core board of the present utility model;
FIG. 4 is a schematic diagram of the stamp hole pin configuration of the multi-interface data processing core board of the present utility model.
In the figure, a 101-processor, a 102-memory module, a 103-memory, a 104-power module, a 21-TF card interface, a 22-USB interface, a 23-expansion interface, a 24-display interface, a 25-audio interface, a 26-camera interface, a 27-power interface and a 28-Ethernet interface are shown.
Detailed Description
The following description of the embodiments of the present utility model will be made clearly and fully with reference to the accompanying drawings, in which it is evident that the embodiments described are only some, but not all embodiments of the utility model. All other embodiments, which can be made by those skilled in the art based on the embodiments of the utility model without making any inventive effort, are intended to be within the scope of the utility model.
It should be noted that, if directional indications (such as up, down, left, right, front, and rear … …) are included in the embodiments of the present utility model, the directional indications are merely used to explain the relative positional relationship, movement conditions, etc. between the components in a specific posture (as shown in the drawings), and if the specific posture is changed, the directional indications are correspondingly changed.
In addition, if there is a description of "first", "second", etc. in the embodiments of the present utility model, the description of "first", "second", etc. is for descriptive purposes only and is not to be construed as indicating or implying a relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defining "a first" or "a second" may explicitly or implicitly include at least one such feature. In addition, the technical solutions of the embodiments may be combined with each other, but it is necessary to base that the technical solutions can be realized by those skilled in the art, and when the technical solutions are contradictory or cannot be realized, the combination of the technical solutions should be considered to be absent and not within the scope of protection claimed in the present utility model.
FIG. 1 is a schematic diagram of the functional modules of a multi-interface data processing core board of the present utility model; FIG. 2 is a schematic diagram of a multi-interface connection of a processor 101 in a multi-interface data processing core board of the present utility model;
FIG. 3 is a schematic diagram of a preferred architecture of a multi-interface data processing core board of the present utility model; FIG. 4 is a schematic diagram of the stamp hole pin configuration of the multi-interface data processing core board of the present utility model. Referring to fig. 1 to fig. 4, in a multi-interface data processing core board provided in a first embodiment of the present utility model, at least:
the core board is provided with a plurality of interfaces including a TF card interface 21, a USB interface 22, an expansion interface 23, a display interface 24, an audio interface 25, a camera interface 26, a power interface 27 and an ethernet interface 28 through a processor 101, a memory module 102, a storage 103 and a power module 104 which are electrically connected.
In one embodiment, processor 101 is selected as rayleigh micro RK3288. The Rayleigh core micro RK3288 is an ARM architecture core chip and integrates a Mali-T764 high-performance four-core GPU. RK3288 possesses image processing capabilities and interface applications, and is applicable in hundreds of industries such as advertising machines, all-in-one machines, POS machines, vehicle-mounted, robots, gaming devices, video conferencing systems, educational tablets, karaoke entertainment, medical, security/monitoring/police, industrial control, ioT, VR, face recognition, face payment, edge computing, voice recognition analysis, etc.
In one embodiment, the memory module 102 may be selected as an LPDDR3 memory, which may effectively increase the memory read/write speed.
In one embodiment, the power module 104 may be selected as RK808-B. Through setting up power module 104, power module 104 can provide the voltage of multiple different demands, carries out stable power supply for the functional module of difference on this core board, has guaranteed the expansibility of this core board.
In one embodiment, the Ethernet interface 28 has the advantages of flexible networking, multi-point communication, unlimited transmission distance, high speed, etc.
The expansion interface 23 includes a PWM interface, an IR interface, a UART interface, an ADC interface, a GPIO interface, an I2C interface, and an SPI interface. The IR interface is mainly used for connecting infrared equipment, and the UART interface is mainly used for connecting universal asynchronous receiver transmitter. The display interface 24 includes an LVDS interface, an HDMI interface, an MIPI interface, and an eDP interface. The display interface 24 supports a two-screen display function. In practical application, the dual-screen different display function enables the core board to drive the liquid crystal screen with two different sizes, resolutions and output interfaces, so that the core board can be applied to intelligent terminal equipment with dual-screen display, such as a dual-screen cash register, a dual-screen advertisement machine, a vending machine and the like, and has wider application scenes. The audio interface 25 includes an earphone interface, a microphone interface, and an I2S interface. The camera interface 26 includes a MIPI-CSI interface. The camera interface 26 is mainly used for inputting camera signals, and is mainly used in fields of monitoring, image recognition and the like. The USB interface 22 includes a USB 2.0 interface, a USB 2.0OTG interface. The USB interface 22 has a wide application space, and can be connected to various peripheral devices such as a camera, a touch screen, and a printer.
In one embodiment, the processor 101 is provided with a plurality of functional pins, and the multi-interface data processing core board is provided with stamp hole pins for leading out the plurality of functional pins of the processor 101. Stamp hole pins are uniformly arranged on the multi-interface data processing core board, and the stamp hole pins can be connected with external equipment in the vertical direction.
The spacing between stamp hole pins in this embodiment is 1.0mm. The spacing between the stamp hole pins can also be adjusted according to actual needs.
In one embodiment, 196 stamp hole pins are provided, and 196 stamp hole pins are each connected to the processor 101. 196 stamp hole pins are respectively referred to as:
1 st to 9 th pins are HDMI interface pins; pins 11 to 20 are MIPI-CSI interface pins; pins 22 to 31 are MIPI interface pins; the 33 th to 37 th pins, the 41 st to 49 th pins, the 80 th to 83 th pins, the 107 th to 118 th pins and the 125 th to 126 th pins are GPIO interface pins; pins 51 to 60 and 62 to 72 are LVDS interface pins; pins 73 to 78 are SIP interface pins; pins 84 to 85, 102 to 103, 105 to 106 and 123 to 124 are I2C interface pins; the 86 th to 87 th pins, 89 th to 94 th pins and 96 th to 97 th pins are USB interface pins; pins 98 to 101 and 148 to 151 are UART interface pins; pins 120-122 are ADC interface pins; the 128 th to 147 th pins are Ethernet interface pins; pins 152 to 159 are interface pins of the TF card; pins 160 to 171 and 173 to 175 are WIFI+BT pins; pins 176-185 are I2S interface pins; the 187 th to 196 th pins are eDP interface pins.
Through the design of the embodiment, the utility model has the beneficial effects that:
(1) The stamp hole pin is adopted, so that the stamp hole pin can be connected with external equipment, and the connection direction is set to be vertical, so that the occupied space can be reduced, and the universality of the core board can be improved;
(2) The stamp hole pins are arranged at equal intervals, so that the core board can be matched and connected with other external equipment, and the performance of the external equipment is improved;
(3) The multi-interface, such as TF card interface, USB interface, expansion interface, display interface, etc., is added on the core board, which can expand the ability of the core board to connect with the peripheral equipment;
(4) By arranging the power supply module, the power supply module can provide voltages with various different requirements to stably supply power to different functional modules on the core board, so that the expansibility of the core board is ensured;
(5) The processor is selected as a Rayleigh core micro RK3288 processor, integrates a four-core Cortex-A17 processing chip and a Mali-T764 high-performance four-core GPU, can support video decoding in various formats, can be applied to various intelligent terminal equipment, and can be widely applied to the fields of face recognition, face brushing payment, edge calculation, voice recognition analysis and Internet of things.
While the utility model has been described with reference to certain embodiments, it will be understood by those skilled in the art that various changes may be made and equivalents may be substituted without departing from the scope of the utility model. In addition, many modifications may be made to adapt a particular situation to the teachings of the utility model without departing from its scope. Therefore, it is intended that the utility model not be limited to the particular embodiment disclosed, but that the utility model will include all embodiments falling within the scope of the appended claims.

Claims (8)

1. A multi-interface data processing core board, comprising:
the core board is provided with a plurality of interfaces, wherein the interfaces comprise a TF card interface, a USB interface, an expansion interface, a display interface, an audio interface, a camera interface, a power interface and an Ethernet interface;
the processor is provided with a plurality of functional pins, the multi-interface data processing core board is provided with a stamp Kong Yinjiao, and the stamp hole pins are used for leading out the plurality of functional pins of the processor;
the stamp hole pins are uniformly arranged on the multi-interface data processing core board, and the stamp hole pins can be connected with external equipment in the vertical direction.
2. The multi-interface data processing core board of claim 1, wherein the stamp hole pins are 1.0mm apart.
3. The multi-interface data processing core board of claim 1, wherein 196 stamp hole pins are provided, and 196 stamp hole pins are respectively connected with the processor.
4. A multi-interface data processing core board according to claim 3, wherein 196 of said stamp hole pins are respectively referred to as:
1 st to 9 th pins are HDMI interface pins;
pins 11 to 20 are MIPI-CSI interface pins;
pins 22 to 31 are MIPI interface pins;
the 33 th to 37 th pins, the 41 st to 49 th pins, the 80 th to 83 th pins, the 107 th to 118 th pins and the 125 th to 126 th pins are GPIO interface pins;
pins 51 to 60 and 62 to 72 are LVDS interface pins;
pins 73 to 78 are SIP interface pins;
pins 84 to 85, 102 to 103, 105 to 106 and 123 to 124 are I2C interface pins;
the 86 th to 87 th pins, 89 th to 94 th pins and 96 th to 97 th pins are USB interface pins;
pins 98 to 101 and 148 to 151 are UART interface pins;
pins 120-122 are ADC interface pins;
the 128 th to 147 th pins are Ethernet interface pins;
pins 152 to 159 are interface pins of the TF card;
pins 160 to 171 and 173 to 175 are WIFI+BT pins;
pins 176-185 are I2S interface pins;
the 187 th to 196 th pins are eDP interface pins.
5. The multi-interface data processing core board of any of claims 1-4, wherein the processor is a rayleigh micro RK3288 processor.
6. The multi-interface data processing core board of claim 5, wherein:
the expansion interface comprises a PWM interface, an IR interface, a UART interface, an ADC interface, a GPIO interface, an I2C interface and an SPI interface.
7. The multi-interface data processing core board of claim 5, wherein:
the display interface comprises an LVDS interface, an HDMI interface, an MIPI interface and an eDP interface.
8. The multi-interface data processing core board of claim 5, wherein:
the audio interface includes an earphone interface, a microphone interface, and an I2S interface.
CN202222998509.2U 2022-11-10 2022-11-10 Multi-interface data processing core board Active CN219246068U (en)

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CN202222998509.2U CN219246068U (en) 2022-11-10 2022-11-10 Multi-interface data processing core board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202222998509.2U CN219246068U (en) 2022-11-10 2022-11-10 Multi-interface data processing core board

Publications (1)

Publication Number Publication Date
CN219246068U true CN219246068U (en) 2023-06-23

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Country Link
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