CN219204146U

CN219204146U - Dual-battery management circuit and electronic equipment

Info

Publication number: CN219204146U
Application number: CN202320014844.6U
Authority: CN
Inventors: 谢光裕; 赵楠; 江广浪; 李雷妮; 封鹏; 牛高; 陈志列
Original assignee: Nantong Evoc Intelligent Technology Co ltd
Current assignee: Evoc Hi Tech Holdings Group Ltd
Priority date: 2023-01-04
Filing date: 2023-01-04
Publication date: 2023-06-16
Anticipated expiration: 2033-01-04

Abstract

The application provides a double-battery management circuit and electronic equipment, wherein the double-battery management circuit comprises a control module, a first battery selection signal is output when an external power supply is connected, and the electric quantity of a first battery is obtained when the external power supply is not connected; outputting a second battery selection signal when the electric quantity of the first battery is larger than the preset electric quantity, and outputting a third battery selection signal when the electric quantity of the first battery is smaller than or equal to the preset electric quantity; the first battery switching module charges and discharges the first battery according to the second battery selection signal; and the second battery switching module charges and discharges the second battery according to the first battery selection signal and the third battery selection signal. According to the battery switching control circuit, the switching process of the first battery and the second battery is managed through the control circuit, the charging and discharging processes of the first battery and the second battery are controlled through the battery switching circuit respectively, no special chip is needed, the occupied volume is small, and the cost is low.

Description

Dual-battery management circuit and electronic equipment

Technical Field

The application belongs to the technical field of electronic circuits, and particularly relates to a double-battery management circuit and electronic equipment.

Background

Along with the continuous development of notebook computers, the power consumption requirements of users on the notebook computers are higher and higher, the standby time and the endurance time of the notebook computers become one of key performance indexes of products, and particularly, the requirements on the endurance time of the notebook computers are higher for some working environments needing long-term endurance outdoors.

In order to improve the endurance time of the notebook computer, a dual-battery scheme can be generally adopted to supply power for the notebook computer. However, the current dual battery scheme generally adopts two charging chips or a unique foreign battery selection chip to manage the dual batteries, so that the dual battery scheme occupies a large volume and has high cost.

Disclosure of Invention

The utility model aims at providing a double battery management circuit, and it is great to aim at solving traditional double battery management circuit occupation volume, the higher problem of cost.

In order to achieve the above object, in a first aspect, an embodiment of the present application provides a dual battery management circuit, including a control module, a first battery switching module, and a second battery switching module;

the control module is respectively and electrically connected with the first battery switching module and the second battery switching module;

the control module is configured to output a first battery selection signal when the external power supply is connected, and acquire the electric quantity of the first battery when the external power supply is not connected; outputting the second battery selection signal when the electric quantity of the first battery is larger than the preset electric quantity, and outputting a third battery selection signal when the electric quantity of the first battery is smaller than or equal to the preset electric quantity;

The first battery switching module is configured to charge and discharge the first battery according to the first battery selection signal and the second battery selection signal;

the second battery switching module is configured to charge and discharge a second battery according to the first battery selection signal and the third battery selection signal.

In a possible implementation manner of the first aspect, the first battery switching module includes a first PMOS transistor, a second PMOS transistor, a third triode, a fourth NMOS transistor, a fifth NMOS transistor, a sixth NMOS transistor, a seventh NMOS transistor, an eighth NMOS transistor, a ninth NMOS transistor, a first diode, and a second diode;

the drain electrode of the first PMOS tube is respectively and electrically connected with the drain electrode of the second PMOS tube and the positive electrode of the first diode, the source electrode of the second PMOS tube is respectively and electrically connected with the grid electrode of the second PMOS tube and the first battery, the source electrode of the first PMOS tube is respectively and electrically connected with the positive electrode of the second diode, the negative electrode of the first diode, the main board interface, the collector electrode of the third triode and the emitter electrode of the third triode, and the negative electrode of the second diode is respectively and electrically connected with the base electrode of the third triode and the drain electrode of the fourth NMOS tube;

The grid electrode of the second PMOS tube is respectively and electrically connected with the drain electrode of the fifth NMOS tube, the drain electrode of the sixth NMOS tube and the drain electrode of the seventh NMOS tube, the grid electrode of the fifth NMOS tube is electrically connected with the second battery, the grid electrode of the sixth NMOS tube is respectively and electrically connected with the grid electrode of the fourth NMOS tube and the drain electrode of the eighth NMOS tube, the grid electrode of the eighth NMOS tube is electrically connected with the control module, the source electrode of the fourth NMOS tube is electrically connected with the drain electrode of the ninth NMOS tube, and the grid electrode of the ninth NMOS tube is electrically connected with the control module.

In another possible implementation manner of the first aspect, the second battery switching module includes a tenth PMOS transistor, an eleventh PMOS transistor, a twelfth triode, a thirteenth NMOS transistor, a fourteenth NMOS transistor, a fifteenth NMOS transistor, a sixteenth NMOS transistor, a seventeenth NMOS transistor, a third diode, and a fourth diode;

the drain electrode of the tenth PMOS tube is electrically connected with the drain electrode of the eleventh PMOS tube and the positive electrode of the third diode respectively, the source electrode of the eleventh PMOS tube is electrically connected with the grid electrode of the eleventh PMOS tube and the second battery respectively, the source electrode of the tenth PMOS tube is electrically connected with the positive electrode of the fourth diode, the negative electrode of the third diode, a main board interface, the collector electrode of the twelfth triode and the emitter electrode of the twelfth triode respectively, and the negative electrode of the fourth diode is electrically connected with the base electrode of the twelfth triode and the drain electrode of the thirteenth NMOS tube respectively;

The grid electrode of the eleventh PMOS tube is electrically connected with the drain electrode of the fourteenth NMOS tube, the drain electrode of the fifteenth NMOS tube and the drain electrode of the sixteenth NMOS tube respectively, the grid electrode of the fourteenth NMOS tube is electrically connected with the first battery, the grid electrode of the fifteenth NMOS tube is electrically connected with the grid electrode of the thirteenth NMOS tube and the control module respectively, the source electrode of the thirteenth NMOS tube is electrically connected with the drain electrode of the seventeenth NMOS tube, and the grid electrode of the seventeenth NMOS tube is electrically connected with the control module.

In another possible implementation manner of the first aspect, the control module includes a controller, an eighteenth NMOS transistor, a nineteenth NMOS transistor, a fifth schottky diode, a sixth diode, and a seventh diode;

the two anodes of the fifth Schottky diode are respectively and electrically connected with the first battery and the second battery, one cathode of the fifth Schottky diode is respectively and electrically connected with the drain electrode of the eighteenth NMOS tube, the cathode of the sixth diode, the drain electrode of the nineteenth NMOS tube and the cathode of the seventh diode, the source electrode of the eighteenth NMOS tube is respectively and electrically connected with the anodes of the first battery switching module, the second battery switching module and the sixth diode, and the grid electrode of the nineteenth NMOS tube is electrically connected with the controller.

In another possible implementation manner of the first aspect, the dual battery management circuit further includes a motherboard power module;

the main board power supply module is electrically connected with the first battery switching module and the second battery switching module respectively;

the main board power supply module is configured to supply power to the first battery switching module and the second battery switching module when there is no external power supply.

In another possible implementation manner of the first aspect, the dual battery management circuit further includes an adaptation module;

the adapting module is electrically connected with the main board power supply module;

the adaptation module is configured to convert an external voltage into a preset voltage.

In another possible implementation of the first aspect, the adaptation module comprises a power adapter.

In another possible implementation manner of the first aspect, the first battery is connected to the first battery switching module in a hot plug manner, and the second battery is connected to the second battery switching module in a hot plug manner.

In another possible implementation of the first aspect, the control module includes an embedded controller.

In a second aspect, an embodiment of the present application provides a dual battery management method, including the following steps:

Outputting a first battery selection signal to charge and discharge a first battery when the external power supply is connected;

when the external power supply is not connected, acquiring the electric quantity of the first battery;

outputting the second battery selection signal when the electric quantity of the first battery is larger than a first preset electric quantity so as to charge and discharge the first battery;

and outputting a third battery selection signal when the electric quantity of the first battery is smaller than or equal to the first preset electric quantity so as to charge and discharge the second battery.

In another possible implementation manner of the second aspect, the dual battery management method further includes:

outputting a switching flow starting signal when switching from the first battery charge and discharge to the second battery charge and discharge and accessing the external power supply;

when the first battery is switched to the second battery and the external power supply is not connected, acquiring the electric quantity of the second battery;

outputting a switching flow termination signal when the electric quantity of the second battery is smaller than or equal to a second preset electric quantity;

outputting the switching process starting signal when the electric quantity of the second battery is larger than the second preset electric quantity;

outputting a first battery protection signal according to the switching flow opening signal so as to enable the first battery to be charged only and enable the second battery to stop working;

Discharging only the first battery and the second battery according to a first power supply stabilization signal and a second battery selection signal;

according to the second power supply stabilizing signal, the first battery stops working, and the second battery is only charged;

and charging and discharging the second battery according to the second battery protection signal.

discharging the second battery when the first battery is powered down;

when the first battery is not in the charge and discharge state, the switching signal does not act and the subsequent manual and automatic switching process is forbidden;

outputting a switching flow opening signal when the first battery is in a charge-discharge state;

according to a third battery protection signal, discharging the first battery only, and stopping the second battery;

discharging only the first battery and the second battery according to a third power supply stabilization signal and a fourth battery selection signal;

according to a fourth power supply stabilizing signal, stopping the first battery and discharging the second battery only;

and charging and discharging the second battery according to the fourth battery protection signal.

In a third aspect, an embodiment of the present application provides an electronic device, including the dual battery management circuit.

Compared with the prior art, the embodiment of the application has the beneficial effects that: according to the double-battery management circuit, the switching process of the first battery and the second battery is managed through the control circuit, the charging and discharging processes of the first battery and the second battery are respectively controlled through the battery switching circuit, no special chip is needed, the occupied volume is small, and the cost is low.

Drawings

In order to more clearly illustrate the technical solutions of the embodiments of the present application, the following description will briefly introduce the drawings that are needed in the embodiments or the description of the prior art, it is obvious that the drawings in the following description are only some embodiments of the present application, and that other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.

Fig. 1 is a schematic structural diagram of a dual battery management circuit according to an embodiment of the present disclosure;

fig. 2 is a circuit diagram of a first battery switching module of the dual battery management circuit according to an embodiment of the present application;

fig. 3 is a circuit diagram of a second battery switching module of the dual battery management method according to the embodiment of the present application;

fig. 4 is a circuit diagram of a control module of a dual battery management circuit according to an embodiment of the present application;

FIG. 5 is a first flowchart of a dual battery management method according to an embodiment of the present disclosure;

FIG. 6 is a second flowchart of a dual battery management method according to an embodiment of the present disclosure;

fig. 7 is a third flowchart of a dual battery management method according to an embodiment of the present application.

Reference numerals illustrate:

1-control module, 2-first battery switching module, 3-second battery switching module.

Detailed Description

In order to make the technical problems, technical schemes and beneficial effects to be solved by the present application more clear, the present application is further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are for purposes of illustration only and are not intended to limit the present application.

Furthermore, the terms "first," "second," and the like, are used for descriptive purposes only and are not to be construed as indicating or implying a relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defining "a first" or "a second" may explicitly or implicitly include one or more such feature. In the description of the present application, the meaning of "a plurality" is two or more, unless explicitly defined otherwise.

Currently, a conventional dual battery management circuit generally adopts a dual battery scheme to supply power to a notebook computer. For example, the two charging chips are used for respectively managing the charging and discharging of the two batteries, and then the two charging chips are connected to the system end through two ideal diodes, so that the purpose of parallel connection when the two batteries are discharged is achieved. However, the dual battery scheme requires two charging chips and two ideal diode chips, and occupies a larger space for the PCB in the handheld device. In addition, the two batteries are in alternate discharge according to the difference of voltage, so that the service life of the batteries is greatly shortened. Or, the battery selection chip MAX1538 produced abroad is directly adopted to carry out double battery management switching control, so that the cost is high.

Therefore, the application provides a double-battery management circuit, which manages the switching process of the first battery and the second battery through the control circuit, and controls the charging and discharging processes of the first battery and the second battery through the battery switching circuit respectively, so that a special chip is not needed, the occupied volume is smaller, and the cost is lower.

The following is an exemplary description of a dual battery management circuit provided in the present application with reference to the accompanying drawings: fig. 1 is a schematic structural diagram of a dual battery management circuit according to an embodiment of the present application, as shown in fig. 1, for convenience of explanation, only the portions related to the present embodiment are shown, and the details are as follows: illustratively, the dual battery management circuit 100 includes a control module 1, a first battery switching module 2, and a second battery switching module 3; the control module 1 is electrically connected to the first battery switching module 2 and the second battery switching module 3, respectively.

The control module 1 is configured to judge whether an external power supply is connected, output a first battery selection signal when the external power supply is connected, and judge the electric quantity of the first battery when the external power supply is not connected; when the electric quantity of the first battery is larger than the preset electric quantity, a second battery selection signal is output, and when the electric quantity of the first battery is smaller than or equal to the preset electric quantity, a third battery selection signal is output.

A first battery switching module 2 configured to charge and discharge the first battery according to the first battery selection signal and the second battery selection signal;

the second battery switching module 3 is configured to charge and discharge the second battery according to the third battery selection signal.

In the embodiment of the application, when the first battery and the second battery in the electronic device are both present, the control module 1 initializes the default first battery to perform charging and discharging preferentially. The user first checks whether the electronic device is connected to an external power supply (such as an adapter, etc.), and if not, clicks a start key of the electronic device. If the electronic equipment is accessed, the electronic equipment is powered on through an external power supply, so that the control module 1 is initialized.

The control module 1 first determines whether an external power supply is connected, and outputs a first battery selection signal to charge and discharge the first battery when the external power supply is connected. When the external power supply is not connected, judging the electric quantity of the first battery; when the electric quantity of the first battery is larger than the preset electric quantity, a second battery selection signal is output to enable the first battery to be charged and discharged, when the electric quantity of the first battery is smaller than or equal to the preset electric quantity, a third battery selection signal is output to enable the second battery to be charged and discharged, and therefore the switching process of the first battery and the second battery can be managed only through the control circuit, a special chip is not needed, occupied size is small, and cost is low.

Fig. 2 is a circuit diagram of a first battery switching module of a dual battery management circuit according to an embodiment of the present application, as shown in fig. 2, in an exemplary embodiment, the first battery switching module 2 includes a first PMOS transistor Q1, a second PMOS transistor Q2, a third triode Q3, a fourth NMOS transistor Q4, a fifth NMOS transistor Q5, a sixth NMOS transistor Q6, a seventh NMOS transistor Q7, an eighth NMOS transistor Q8, a ninth NMOS transistor Q9, a first diode D1, and a second diode D2.

The drain electrode of the first PMOS tube Q1 is respectively and electrically connected with the drain electrode of the second PMOS tube Q2 and the positive electrode of the first diode D1, the source electrode of the second PMOS tube Q2 is respectively and electrically connected with the grid electrode of the second PMOS tube Q2 and the first battery BATA, the source electrode of the first PMOS tube Q1 is respectively and electrically connected with the positive electrode of the second diode D2, the negative electrode of the first diode D1, the main board interface VBATT_CHG, the collector electrode of the third triode Q3 and the emitter electrode of the third triode Q3, and the negative electrode of the second diode D2 is respectively and electrically connected with the base electrode of the third triode Q3 and the drain electrode of the fourth NMOS tube Q4.

The grid electrode of the second PMOS tube Q2 is respectively and electrically connected with the drain electrode of the fifth NMOS tube Q5, the drain electrode of the sixth NMOS tube Q6 and the drain electrode of the seventh NMOS tube Q7, the grid electrode of the fifth NMOS tube Q5 is electrically connected with the second battery BATB, the grid electrode of the sixth NMOS tube Q6 is respectively and electrically connected with the grid electrode of the fourth NMOS tube Q4 and the drain electrode of the eighth NMOS tube Q8, the grid electrode of the eighth NMOS tube Q8 is electrically connected with the control module 1, the source electrode of the fourth NMOS tube Q4 is electrically connected with the drain electrode of the ninth NMOS tube Q9, and the grid electrode of the ninth NMOS tube Q9 is electrically connected with the control module 1.

In addition, the first battery switching module 2 includes a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4, a fifth resistor R5, a sixth resistor R6, a seventh resistor R7, an eighth resistor R8, and a first capacitor C1, where two ends of the first resistor R1 are electrically connected to the source of the first PMOS transistor Q1 and the base of the third transistor Q3, two ends of the second resistor R2 are electrically connected to the source of the first PMOS transistor Q1 and the positive electrode of the second diode D2, two ends of the third resistor R3 are electrically connected to the source of the second PMOS transistor Q2 and the gate of the second PMOS transistor Q2, two ends of the fourth resistor R4 are electrically connected to the base of the third transistor Q3 and the drain of the fourth NMOS transistor Q4, two ends of the fifth resistor R5 are electrically connected to the gate of the second PMOS transistor Q2 and the gate of the fifth NMOS transistor Q5, two ends of the sixth resistor R6 are electrically connected to the drain of the eighth NMOS transistor Q8 and the positive electrode of the second PMOS transistor D2, two ends of the seventh resistor R3 are electrically connected to the drain of the eighth NMOS transistor Q3 and the positive electrode of the second PMOS transistor D2, two ends of the eighth resistor Q3 are electrically connected to the other end of the second PMOS transistor Q8 and the drain of the eighth resistor Q1, and the other end of the eighth resistor Q8 is electrically connected to the other end of the second resistor Q1. The gate of the eighth NMOS transistor Q8 is further connected to a battery selection signal bat_selb, the gate of the ninth NMOS transistor Q9 is further connected to a battery protection signal chgab_en, and the gate of the fifth NMOS transistor Q5 is further connected to a second battery detection signal bat_in_n.

In this embodiment of the present application, the first battery switching module 2 makes the first battery BATA chargeable and dischargeable according to the low level signal of the received battery selection signal bat_selb and the high level signal of the power supply stabilizing signal bat_sw_ctl, and makes the first battery BATA chargeable and dischargeable according to the high level signal of the received battery protection signal chgab_en, and makes the first battery BATA chargeable and dischargeable and the second battery BAT dischargeable according to the high level signal of the received battery protection signal chgab_en, thereby completing the switching process of the first battery BATA. The battery selection signal bat_selb is used for selecting and using the first battery BAT or the second battery BAT, and the power supply stabilization signal bat_sw_ctl is used for protecting the power supply of the main board from being stabilized, so that the situation that the main board is not powered due to the fact that two batteries are disconnected at the same time in the switching process is avoided.

Fig. 3 is a circuit diagram of a second battery switching module of the dual battery management method according to the embodiment of the present application. As shown in fig. 3, the second battery switching module 3 includes, illustratively, a tenth PMOS transistor Q10, an eleventh PMOS transistor Q11, a twelfth transistor Q12, a thirteenth NMOS transistor Q13, a fourteenth NMOS transistor Q14, a fifteenth NMOS transistor Q15, a sixteenth NMOS transistor Q16, a seventeenth NMOS transistor Q17, a third diode D3, and a fourth diode D4.

The drain electrode of the tenth PMOS transistor Q10 is electrically connected to the drain electrode of the eleventh PMOS transistor Q11 and the positive electrode of the third diode D3, the source electrode of the eleventh PMOS transistor Q11 is electrically connected to the gate electrode of the eleventh PMOS transistor Q11 and the second battery bat, and the source electrode of the tenth PMOS transistor Q10 is electrically connected to the positive electrode of the fourth diode D4, the negative electrode of the third diode D3, the motherboard interface vbatt_chg, the collector electrode of the twelfth triode Q12, and the emitter electrode of the twelfth triode Q12, respectively, and the negative electrode of the fourth diode D4 is electrically connected to the base electrode of the twelfth triode Q12 and the drain electrode of the thirteenth NMOS transistor Q13, respectively.

The grid electrode of the eleventh PMOS tube Q11 is respectively and electrically connected with the drain electrode of the fourteenth NMOS tube Q14, the drain electrode of the fifteenth NMOS tube Q15 and the drain electrode of the sixteenth NMOS tube Q16, the grid electrode of the fourteenth NMOS tube Q14 is electrically connected with the first battery BATA, the grid electrode of the fifteenth NMOS tube Q15 is respectively and electrically connected with the grid electrode of the thirteenth NMOS tube Q13 and the control module 1, the source electrode of the thirteenth NMOS tube Q13 is electrically connected with the drain electrode of the seventeenth NMOS tube Q17, and the grid electrode of the seventeenth NMOS tube Q17 is electrically connected with the control module 1.

In addition, the second battery switching module 3 includes a ninth resistor R9, a tenth resistor R10, an eleventh resistor R11, a twelfth resistor R12, a thirteenth resistor R13, a fourteenth resistor R14, a fifteenth resistor R15, and a second capacitor C2, wherein two ends of the ninth resistor R9 are electrically connected to the source of the tenth PMOS transistor Q10 and the base of the twelfth transistor Q12, two ends of the tenth resistor R10 are electrically connected to the source of the tenth PMOS transistor Q10 and the anode of the fourth diode D4, two ends of the eleventh resistor R11 are electrically connected to the source of the eleventh PMOS transistor Q11 and the gate of the eleventh PMOS transistor Q11, two ends of the twelfth resistor R12 are electrically connected to the base of the twelfth transistor Q12 and the drain of the thirteenth NMOS transistor Q13, two ends of the thirteenth resistor R13 are electrically connected to the gate of the eleventh PMOS transistor Q11 and the gate of the fourteenth NMOS transistor Q14, two ends of the fourteenth resistor R14 are electrically connected to the gate of the thirteenth transistor Q13, the gate of the fifteenth NMOS transistor Q15 and the gate of the control transistor Q1 are electrically connected to the other end of the eleventh transistor Q2, and the other end of the thirteenth resistor R2 is connected to the drain of the thirteenth resistor C2. The gate of the thirteenth NMOS transistor Q13 is further connected to the battery selection signal bat_selb, the gate of the seventeenth NMOS transistor Q17 is further connected to the battery protection signal chgab_en, and the gate of the fourteenth NMOS transistor Q14 is further connected to the first battery detection signal bata_in_n.

In this embodiment of the present application, the second battery switching module 3 makes the second battery BAT chargeable and dischargeable according to the received high level signal of the battery selection signal bat_selb and the high level signal of the power supply stabilizing signal bat_sw_ctl, and makes the second battery BAT chargeable and dischargeable according to the received high level signal of the battery protection signal chgab_en, and the first battery BAT is dischargeable, thereby completing the switching process of the second battery BAT.

Fig. 4 is a circuit diagram of a control module of the dual battery management circuit according to an embodiment of the present application. As shown in fig. 4, the control module 1 illustratively includes an embedded controller EC, an eighteenth NMOS transistor Q18, a nineteenth NMOS transistor Q19, a fifth schottky diode D5, a sixth diode D6, and a seventh diode D7.

The two anodes of the fifth schottky diode D5 are electrically connected to the first battery BATA and the second battery BATB, respectively, one cathode of the fifth schottky diode D5 is electrically connected to the drain of the eighteenth NMOS transistor Q18, the cathode of the sixth diode D6, the drain of the nineteenth NMOS transistor Q19, and the cathode of the seventh diode D7, respectively, and the source of the eighteenth NMOS transistor Q18 is electrically connected to the anodes of the first battery switching module 2, the second battery switching module 3, and the sixth diode D6, respectively, and the gate of the nineteenth NMOS transistor Q19 is electrically connected to the embedded controller EC.

In addition, the control module 1 further includes a sixteenth resistor R16, a seventeenth resistor R17, an eighteenth resistor R18, a nineteenth resistor R19, a twentieth resistor R20, and a third capacitor C3.

The both ends of the sixteenth resistor R16 are respectively and electrically connected with the cathode of the fifth Schottky diode D5 and the drain electrode of the eighteenth NMOS tube Q18, the both ends of the seventeenth resistor R17 are respectively and electrically connected with the drain electrode of the eighteenth NMOS tube Q18 and the gate electrode of the eighteenth NMOS tube Q18, the both ends of the eighteenth resistor R18 are respectively and electrically connected with the cathode of the sixth diode D6 and the drain electrode of the nineteenth NMOS tube Q19, one end of the nineteenth resistor R19 and one end of the twentieth resistor R20 are respectively and electrically connected with the gate electrode of the nineteenth NMOS tube Q19, one end of the nineteenth resistor R19 is electrically connected with the embedded controller EC, the other end of the twentieth resistor R20 is grounded, one end of the third capacitor C3 is electrically connected with the drain electrode of the eighteenth NMOS tube Q18, and the other end of the third capacitor C3 is grounded.

In the embodiment of the present application, the control module 1 makes the first battery BATA and the second battery BAT not be turned on at the same time according to the high-low level of the received power supply stabilizing signal bat_sw_ctl. Since the first battery BATA and the second battery BATB are simultaneously turned on when the voltage difference between them is too large, the first battery BATA and the second battery BATB may be damaged.

Illustratively, the dual battery management circuit 100 further includes a motherboard power module; the main board power supply module is electrically connected with the first battery switching module 2 and the second battery switching module 3 respectively.

And a main board power supply module configured to supply power to the first battery switching module and the second battery switching module when there is no external power supply.

In this embodiment of the present application, when the electronic device is not connected to an external power source (for example, an adapter), the user needs to manually press a power key to turn on a main board power module inside the electronic device, so that the control module 1 is electrically turned on, and a subsequent battery switching control process is performed according to the control module 1.

Illustratively, the dual battery management circuit 100 also includes an adaptation module; the adapting module is electrically connected with the main board power module.

And the adaptation module is configured to convert the external voltage into a preset voltage.

In the embodiment of the application, the adapting module may be an adapter, which is used for converting an accessed external power supply voltage (for example, 220V voltage of mains supply) into a voltage (for example, 3.3V voltage) required by the electronic device, so that the electronic device can be used.

Illustratively, the control module 1 comprises an embedded controller.

In embodiments of the present application, the control module may include an embedded controller (Embedded Controller, EC controller) for executing a control system that specifies independent control functions and has the capability to process data in a complex manner. The embedded controller is an electronic device or apparatus controlled by an embedded microelectronic technology chip (a series of microelectronic devices including a microprocessor chip, a timer, a sequencer, or a controller) and is capable of performing various automated processing tasks such as monitoring and control.

Illustratively, the first battery BATA is in hot plug connection with the first battery switching module 2, and the second battery BATB is in hot plug connection with the second battery switching module 3.

In the embodiment of the application, the first battery BATA and the second battery BATB both support hot plug, namely, any one of the batteries is replaced in a state of not shutting down, so that the electronic equipment (such as a computer) can still work normally, the continuity of the work of the electronic equipment is ensured, and the working time of the electronic equipment is prolonged.

The first battery is illustratively hot-swapped with the first battery switching module, and the second battery is hot-swapped with the second battery switching module.

In the embodiment of the application, because the charge and discharge states of the first battery and the second battery can be monitored in real time, the first battery and the second battery can be allowed to be hot plugged and unplugged, and meanwhile, the normal operation of the electronic equipment is not affected.

Fig. 5 is a first flowchart of a dual battery management method according to an embodiment of the present application. As shown in fig. 5, the present application also provides a dual battery management method, which includes the following steps:

s501, judging whether an external power supply is connected.

S502, when an external power supply is connected, a first battery selection signal is output so as to charge and discharge the first battery.

S503, when the external power supply is not connected, judging whether the electric quantity of the first battery is larger than a first preset electric quantity.

S504, when the electric quantity of the first battery is larger than the first preset electric quantity, outputting a second battery selection signal so as to charge and discharge the first battery.

S505, when the electric quantity of the first battery is smaller than or equal to the first preset electric quantity, outputting a third battery selection signal so as to charge and discharge the second battery.

In the embodiment of the application, when the first battery and the second battery in the electronic device are both present, the control module 1 initializes the default first battery to perform charging and discharging preferentially. The user firstly checks whether the electronic equipment is connected with an external power supply (such as an adapter and the like), and if the electronic equipment is not connected with the external power supply, the user clicks a start key of the electronic equipment to power up the electronic equipment. If the electronic equipment is accessed, the electronic equipment is directly powered on through an external power supply, so that the control module 1 is initialized.

The method specifically comprises the following steps: firstly, judging whether an external power supply is connected or not, and judging whether the electric quantity of the first battery is larger than a first preset electric quantity or not when the external power supply is not connected. When the electric quantity of the first battery is smaller than or equal to the first preset electric quantity, a third battery selection signal is output so that the second battery is charged and discharged, and starting abnormality caused by discharging from the first battery with the extremely low electric quantity is avoided. When the electric quantity of the first battery is larger than the first preset electric quantity, outputting a second battery selection signal so as to charge and discharge the first battery. When an external power supply is connected, a first battery selection signal is output to charge and discharge the first battery.

Wherein, describing the charge and discharge of the first battery with reference to the circuit diagram specifically includes the following steps:

s511, according to the first battery selection signal or the second battery selection signal sent by the control module 1, that is, the low level of the selection signal BAT_SELB, the eighth NMOS transistor Q8, the thirteenth NMOS transistor Q13, the fifteenth NMOS transistor Q15 are not conducted, and the fourth NMOS transistor Q4 and the sixth NMOS transistor Q6 are conducted.

S512, according to the power supply stabilizing signal sent by the control module 1, namely the high level of BAT_SW_CTL, the nineteenth NMOS transistor Q19 is conducted, and the seventh NMOS transistor Q7 and the sixteenth NMOS transistor Q16 are not conducted. At this time, the state of the whole circuit is that the first PMOS transistor Q1 and the tenth PMOS transistor Q10 are not turned on, the second PMOS transistor Q2 is turned on, the eleventh PMOS transistor Q11 is not turned on, the first battery (i.e., the a battery) is dischargeable but not chargeable, and the second battery (i.e., the B battery) is not chargeable and dischargeable.

S513, according to the battery protection signal sent by the control module 1, namely the high level signal of CHGAB_EN, the ninth NMOS tube Q9 and the seventeenth NMOS tube Q17 are conducted, the first PMOS tube Q1 is conducted, the tenth PMOS tube Q10 is not conducted, and therefore the first battery can be discharged and charged, and the second battery can not be charged and discharged.

Wherein, describing the charging and discharging of the second battery with reference to the circuit diagram specifically includes the following steps:

S521, according to the third battery selection signal sent by the control module 1, i.e. the high level of the selection signal BAT_SELB, the eighth NMOS transistor Q8, the thirteenth NMOS transistor Q13, the fifteenth NMOS transistor Q15 are conducted, and the fourth NMOS transistor Q4 and the sixth NMOS transistor Q6 are not conducted.

S522, according to the power supply stabilizing signal sent by the control module 1, namely the high level of BAT_SW_CTL, the nineteenth NMOS transistor Q19 is conducted, and the seventh NMOS transistor Q7 and the sixteenth NMOS transistor Q16 are not conducted. The second PMOS transistor Q2 is non-conductive, the eleventh PMOS transistor Q11 is conductive, the second battery (i.e., the B battery) is dischargeable, but not chargeable, and the first battery (i.e., the a battery) is not chargeable and dischargeable.

S523, according to the battery protection signal sent by the control module 1, namely the high level signal of CHGAB_EN, the ninth NMOS tube Q9 and the seventeenth NMOS tube Q17 are conducted, the first PMOS tube Q1 is not conducted, the tenth PMOS tube Q10 is conducted, and therefore the second battery can be discharged and charged, and the first battery can not be charged and discharged.

In addition, in order to save power, when the electronic device (for example, a notebook computer) is powered on without an adapter and without pressing a start-up key, the control module 1 (for example, an EC controller) is powered off and does not work, and at this time, three control signals of the control module 1 are not controlled by the control module 1. For example, the power supply stabilization signal bat_sw_ctl and the battery protection chgab_en are electrically connected to the pull-down resistor, so that none of the ninth NMOS transistor Q9, the seventeenth NMOS transistor Q17, and the nineteenth NMOS transistor Q19 is turned on, and none of the first PMOS transistor Q1 and the tenth PMOS transistor Q10 is turned on. The first battery power supply battta+ and the second battery batttb+ reach the eighteenth NMOS transistor Q18 and the seventh zener diode D7 through the fifth schottky diode D5 and the sixteenth resistor R16, the power supply voltage becomes 5.6V after being clamped by the seventh zener diode D7, the eighteenth NMOS transistor Q18 is changed from a fully on state to an incompletely on state, and the output voltage passing through the eighteenth NMOS transistor Q18 is stabilized at about 4.6V, so that the seventh NMOS transistor Q7 and the sixteenth NMOS transistor Q16 are turned on, and the second PMOS transistor Q2 and the eleventh PMOS transistor Q11 are turned on. The first battery (A battery) or the second battery (B battery) can be started to supply power to the main board through the second PMOS tube Q2, the first diode D1, the eleventh PMOS tube Q11 and the third diode D3. Meanwhile, as the first PMOS tube Q1 and the tenth PMOS tube Q10 are not conducted, the battery A and the battery B can only discharge and cannot be charged, so that the two batteries are prevented from being mutually charged and discharged in a standby state, the damage of the batteries is increased, and the service time of the batteries is shortened.

Fig. 6 is a second flowchart of a dual battery management method according to an embodiment of the present application. As shown in fig. 6, the dual battery management method, exemplarily, further includes:

s601, judging whether an external power supply is connected or not when the first battery is charged and discharged to the second battery; when the external power supply is connected, a switching flow start signal is output.

S602, when the external power supply is not connected, judging whether the electric quantity of the second battery is larger than a second preset electric quantity.

And S603, outputting a switching flow termination signal when the electric quantity of the second battery is smaller than or equal to a second preset electric quantity.

S604, outputting a switching process starting signal when the electric quantity of the second battery is larger than a second preset electric quantity.

S605, outputting a first battery protection signal according to the switching flow starting signal so as to enable the first battery to be charged only and enable the second battery to stop working.

S606, discharging only the first battery and the second battery according to the first power supply stabilizing signal and the second battery selecting signal.

S607, according to the second power supply stabilizing signal, the first battery stops working, and the second battery is only charged.

And S608, charging and discharging the second battery according to the second battery protection signal.

In the embodiment of the application, whether an external power supply is connected is firstly judged, and when the external power supply is not connected, whether the electric quantity of the second battery is larger than a second preset electric quantity is judged. When the electric quantity of the second battery is smaller than or equal to the first preset electric quantity, a switching flow termination signal is output, and starting abnormality caused by discharging from the second battery with extremely low electric quantity is avoided. And outputting a switching flow opening signal when the electric quantity of the second battery is larger than the second preset electric quantity. When the external power supply is connected, a switching flow start signal is output. The switching modes of the first battery and the second battery comprise modes of manual switching, automatic switching, full-power switching, hot plug-in, hot pull-out and the like.

The switching flow of switching the charge and discharge of the first battery to the charge and discharge of the second battery is described by combining a circuit diagram, and the switching flow specifically comprises the following steps: (when the first battery is charged and discharged normally, the first PMOS tube Q1 and the second PMOS tube Q2 of the first battery are conducted, and the tenth PMOS tube Q10 and the eleventh PMOS tube Q11 of the second battery are not conducted).

S611, according to the first battery protection signal sent by the control module 1, namely the low level signal of CHGAB_EN, the nineteenth NMOS tube Q9 and the seventeenth NMOS tube Q17 are not conducted, and the first PMOS tube Q1 and the tenth PMOS tube Q10 are not conducted, so that the first battery (A battery) can be discharged and not charged, and the second battery (B battery) can not be charged and discharged. At this time, the first battery can only be discharged through the second PMOS transistor Q2 and the first diode D1, and cannot be charged, and the circuit for charging the two batteries is cut off.

S612, according to the first power supply stabilizing signal sent by the control module 1, namely, the low level of BAT_SW_CTL, the nineteenth NMOS transistor Q19 is not conducted, the seventh NMOS transistor Q7 and the sixteenth NMOS transistor Q16 are conducted, and the second PMOS transistor Q2 and the eleventh PMOS transistor Q11 are conducted, so that the first battery (A battery) and the second battery (B battery) can be discharged and are not chargeable. At this time, the first battery and the second battery are discharged through the second PMOS transistor Q2, the first diode D1, the eleventh PMOS transistor Q11, and the third diode D3, but cannot be charged, the outputs of the two batteries are all opened, both the two batteries can be discharged, and the two batteries are prevented from being powered off simultaneously in the switching process.

S613, according to the second battery selection signal sent by the control module 1, namely the high level of BAT_SELB, the eighth NMOS tube Q8, the thirteenth NMOS tube Q13 and the fifteenth NMOS tube Q15 are conducted, the fourth NMOS tube Q4 and the sixth NMOS tube Q6 are not conducted, the first PMOS tube Q1, the tenth PMOS tube Q10, the second PMOS tube Q2 and the eleventh PMOS tube Q11 are unchanged, and therefore the first battery (A battery) and the second battery (B battery) can be discharged and uncharged, and the preparation for switching the first battery to the second battery is made.

S614, according to the second power supply stabilizing signal sent by the control module 1, namely, the high level of BAT_SW_CTL, the nineteenth NMOS transistor Q19 is conducted, the seventh NMOS transistor Q7 and the sixteenth NMOS transistor Q16 are not conducted, the second PMOS transistor Q2 is not conducted, and the eleventh PMOS transistor Q11 is conducted, so that the second battery (B battery) can be discharged and not charged, and the first battery (A battery) can not be charged and discharged. At this time, the charge/discharge circuit of the first battery is completely cut off, and the second battery can be discharged through the eleventh PMOS transistor Q11 and the third diode D3, but cannot be charged yet.

S615, according to a second battery protection signal sent by the control module 1, namely a high level signal of CHGAB_EN, the ninth NMOS tube Q9 and the seventeenth NMOS tube Q17 are conducted, the tenth PMOS tube Q10 is conducted, the first PMOS tube Q1 is not conducted, so that the second battery (B battery) can be discharged or charged, the first battery (A battery) cannot be charged or discharged, and the switching is completed.

Fig. 7 is a third flowchart of a dual battery management method according to an embodiment of the present application. As shown in fig. 7, the dual battery management method, exemplarily, further includes:

and S701, when the first battery is powered down, discharging the second battery, and judging whether the first battery is in a charge-discharge state.

S702, when the first battery is not in a charge-discharge state, the switching signal does not act and the subsequent manual and automatic switching process is forbidden.

S703, outputting a switching process start signal when the first battery is in a charge/discharge state.

And S704, discharging the first battery only according to the third battery protection signal, and stopping the second battery.

S705, discharging only the first battery and the second battery according to the third power supply stabilization signal and the fourth battery selection signal.

S706, according to the fourth power supply stabilizing signal, the first battery stops working, and the second battery only discharges.

And S707, charging and discharging the second battery according to the fourth battery protection signal.

IN this embodiment, when one battery is pulled out during the use process of the dual battery, for example, the first battery is pulled out, the control module 1 outputs the first battery detection signal, i.e., the high level of the bata_in_n, so that the fourteenth NMOS transistor Q14 is turned on, and the eleventh PMOS transistor Q11 is turned on, so that the second battery (B battery) can be immediately discharged. Because the control module 1 (e.g., the EC controller) has a time delay from detecting the battery unplugging to outputting the switching signal. In the process, the output loop of the second battery (B battery) is opened through the detection control of the hardware circuit, so that the condition that the main board is powered down in the detection control process of the control module 1 can be avoided.

Then, the control module 1 detects whether the first battery is in a charge and discharge state, if not, the switching signal is not operated and the subsequent manual and automatic switching process is forbidden. If yes, switching the charge and discharge of the first battery to the charge and discharge of the second battery, and combining a circuit diagram, wherein the adopted specific flow comprises the following steps:

s711, according to a third battery protection signal sent by the control module 1, namely a low level signal of CHGAB_EN, the ninth NMOS tube Q9 and the seventeenth NMOS tube Q17 are not conducted, the first PMOS tube Q1 and the tenth PMOS tube Q10 are not conducted, so that the first battery (A battery) can be discharged, the second battery (B battery) can not be charged and discharged.

S712, according to the third power supply stabilizing signal sent by the control module 1, namely, the low level signal of BAT_SW_CTL, the nineteenth NMOS tube Q19 is not conducted, the seventh NMOS tube Q7 and the sixteenth NMOS tube Q16 are conducted, and the second PMOS tube Q2 and the eleventh PMOS tube Q11 are conducted, so that the first battery and the second battery can be discharged and can not be charged.

S713, according to the fourth battery selection signal sent by the control module 1, namely the high level of BAT_SELB, the eighth NMOS transistor Q8, the thirteenth NMOS transistor Q13 and the fifteenth NMOS transistor Q15 are conducted, and the fourth NMOS transistor Q4 and the sixth NMOS transistor Q6 are not conducted, so that the first battery and the second battery can be discharged and can not be charged.

S714, according to the fourth power supply stabilizing signal sent by the control module 1, namely the high level signal of BAT_SW_CTL, the nineteenth NMOS transistor Q19 is conducted, the seventh NMOS transistor Q7 and the sixteenth NMOS transistor Q16 are not conducted, the second PMOS transistor Q2 is not conducted, the eleventh PMOS transistor Q11 is conducted, so that the second battery can be discharged, the second battery can not be charged, and the first battery can not be charged and discharged.

S715, according to the fourth battery protection signal sent by the control module 1, namely the high level signal of CHGAB_EN, the ninth NMOS tube Q9 and the seventeenth NMOS tube Q17 are not conducted, the first PMOS tube Q1 and the tenth PMOS tube Q10 are conducted, so that the second battery can be charged and discharged, and the first battery cannot be charged and discharged.

IN the embodiment of the present application, when the first battery (a battery) is inserted into the motherboard, the first battery detects the battery bata_in_n as a low level, and when the first battery (a battery) is pulled out, the battery bata_in_n as a high level. Also, the second battery detects the bat_in_n as a low level when the second battery (B battery) is inserted into the main board, and the second battery detects the bat_in_n as a high level when the second battery (B battery) is pulled out.

When both the first battery and the second battery are present and the main board is operating with the first battery, the control module 1 takes a relatively long time from detecting that the first battery is pulled up to outputting a command to switch the first battery to the second battery if the first battery is pulled up suddenly. If the switching is performed only after the control module command arrives, the main board is at risk of power failure, and normal operation of the electronic equipment is affected. IN order to avoid such risk, the first battery detection signal bata_in_n is connected to the second battery switching module 3, when the first battery is pulled out, the first battery detection signal bata_in_n becomes high level, the fourteenth NMOS transistor Q14 is turned on, the eleventh PMOS transistor Q11 is turned on, so that the second battery can supply power to the motherboard through the eleventh PMOS transistor Q11 and the third diode D3, and the second battery is normally discharged before the switching operation of the control module 1, thereby ensuring the power supply stability of the motherboard.

In addition, when only one battery is used in the electronic device and one battery needs to be accessed again, the control module 1 does not switch the current working battery, so that the current battery is continuously discharged or charged, and the control module 1 starts the switching process to perform discharging or charging control management on the newly accessed battery until the current battery is low or full.

In the embodiment of the double-battery management circuit, domestic devices are fully adopted, so that the localization of the double-battery switching control circuit is realized. Through the use of simple logic devices, the control scheme is cheaper and lower in cost than the traditional double-battery switching chip control scheme. Meanwhile, the mutual charge and discharge of batteries are avoided, the battery loss is reduced, and the working time of the electronic equipment is prolonged. The circuit switching process can not have the problems of power failure, low electric quantity and the like, and is safer, more stable and more reliable. The scheme also supports hot plug of the batteries, and any one of the batteries is replaced under the condition of not shutting down, so that the continuity of work is ensured, and the working time of the computer is prolonged. It is also supported that the electronic device can operate normally when only any one of the batteries is used.

Illustratively, the present embodiment discloses an electronic device including a dual battery management circuit 100.

In this embodiment of the present application, the dual battery management circuit 100 is disposed inside an electronic device, and manages the switching process of the first battery and the second battery through the control circuit, and controls the charging and discharging processes of the first battery and the second battery through the battery switching circuit respectively, without a special chip, and occupies a smaller volume and has lower cost.

It will be apparent to those skilled in the art that, for convenience and brevity of description, only the above-described division of the functional units and modules is illustrated, and in practical application, the above-described functional distribution may be performed by different functional units and modules according to needs, i.e. the internal structure of the apparatus is divided into different functional units or modules to perform all or part of the above-described functions. The functional units and modules in the embodiment may be integrated in one processing unit, or each unit may exist alone physically, or two or more units may be integrated in one unit, where the integrated units may be implemented in a form of hardware or a form of a software functional unit. In addition, specific names of the functional units and modules are only for convenience of distinguishing from each other, and are not used for limiting the protection scope of the present application. In the foregoing embodiments, the descriptions of the embodiments are emphasized, and in part, not described or illustrated in any particular embodiment, reference is made to the related descriptions of other embodiments.

Those of ordinary skill in the art will appreciate that the various illustrative elements and algorithm steps described in connection with the embodiments disclosed herein may be implemented as electronic hardware, or combinations of computer software and electronic hardware. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the solution. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present application.

In the embodiments provided herein, it should be understood that the disclosed ups parallel operation redundancy system and method may be implemented in other ways. For example, the ups parallel redundancy system embodiments described above are merely illustrative, e.g., the division of modules or units is merely a logical function division, and there may be additional divisions of actual implementation, e.g., multiple units or components may be combined or integrated into another system, or some features may be omitted, or not performed. Alternatively, the coupling or direct coupling or communication connection shown or discussed with each other may be an indirect coupling or communication connection via some interfaces, devices or units, which may be in electrical, mechanical or other form.

The units described as separate units may or may not be physically separate, and units shown as units may or may not be physical units, may be located in one place, or may be distributed over a plurality of network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

In addition, each functional unit in each embodiment of the present application may be integrated in one processing unit, or each unit may exist alone physically, or two or more units may be integrated in one unit. The integrated units may be implemented in hardware or in software functional units.

The above embodiments are only for illustrating the technical solution of the present application, and are not limiting thereof; although the present application has been described in detail with reference to the foregoing embodiments, it should be understood by those of ordinary skill in the art that: the technical scheme described in the foregoing embodiments can be modified or some technical features thereof can be replaced by equivalents; such modifications and substitutions do not depart from the spirit and scope of the technical solutions of the embodiments of the present application, and are intended to be included in the scope of the present application.

Claims

1. The double-battery management circuit is characterized by comprising a control module, a first battery switching module and a second battery switching module;

the control module is configured to output a first battery selection signal when an external power supply is connected, and acquire the electric quantity of the first battery when the external power supply is not connected; outputting a second battery selection signal when the electric quantity of the first battery is larger than the preset electric quantity, and outputting a third battery selection signal when the electric quantity of the first battery is smaller than or equal to the preset electric quantity;

the second battery switching module is configured to charge and discharge a second battery according to the third battery selection signal.

2. The dual battery management circuit of claim 1 wherein the first battery switching module comprises a first PMOS transistor, a second PMOS transistor, a third triode, a fourth NMOS transistor, a fifth NMOS transistor, a sixth NMOS transistor, a seventh NMOS transistor, an eighth NMOS transistor, a ninth NMOS transistor, a first diode, and a second diode;

3. The dual battery management circuit of claim 1 wherein the second battery switching module comprises a tenth PMOS transistor, an eleventh PMOS transistor, a twelfth triode, a thirteenth NMOS transistor, a fourteenth NMOS transistor, a fifteenth NMOS transistor, a sixteenth NMOS transistor, a seventeenth NMOS transistor, a third diode, and a fourth diode;

4. The dual battery management circuit of claim 1 wherein the control module comprises a controller, an eighteenth NMOS transistor, a nineteenth NMOS transistor, a fifth schottky diode, a sixth diode, and a seventh diode;

5. The dual battery management circuit of any of claims 1-4, wherein the dual battery management circuit further comprises a motherboard power module;

the main board power supply module is configured to supply power to the first battery switching module and the second battery switching module when the external power supply is not provided.

6. The dual battery management circuit of claim 5 further comprising an adaptation module;

7. The dual battery management circuit of claim 6 wherein the adapter module comprises a power adapter.

8. The dual battery management circuit of any of claims 1-4 wherein the first battery is in hot plug connection with the first battery switch module and the second battery is in hot plug connection with the second battery switch module.

9. The dual battery management circuit of any of claims 1-4 wherein the control module comprises an embedded controller.

10. An electronic device comprising the dual battery management circuit of any one of claims 1-9.