CN219181515U - Circuit for improving time division duplex receiving sensitivity and intelligent terminal - Google Patents
Circuit for improving time division duplex receiving sensitivity and intelligent terminal Download PDFInfo
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- CN219181515U CN219181515U CN202222990396.1U CN202222990396U CN219181515U CN 219181515 U CN219181515 U CN 219181515U CN 202222990396 U CN202222990396 U CN 202222990396U CN 219181515 U CN219181515 U CN 219181515U
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
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Abstract
The utility model relates to a circuit for improving time division duplex receiving sensitivity and an intelligent terminal, comprising: the device comprises a filtering module, a switching module, a power amplifying module and a modulation and demodulation module; the filtering module carries out filtering processing on the signals; the switch module is respectively connected with the power amplification module and the modulation and demodulation module, and is used for controlling the on-off between the power amplification module and the filtering module and the on-off between the modulation and demodulation module and the filtering module; the power amplification module is connected with the modulation and demodulation module, amplifies the signal output by the modulation and demodulation module, and outputs a transmitting signal to the filtering module through the switch module when the power amplification module is communicated with the filtering module; when the modulation and demodulation module is communicated with the filtering module, modulation and demodulation processing is carried out on the received signals transmitted by the switch module, and modulation and demodulation signals are output to a rear-stage circuit. The utility model can avoid the emission signal from entering the receiving link, effectively improve the receiving sensitivity, and simultaneously, only adopts one filtering module, thereby leading the cost to be lower.
Description
Technical Field
The utility model relates to the technical field of intelligent terminals, in particular to a circuit for improving time division duplex receiving sensitivity and an intelligent terminal.
Background
With the development of 4G and 5G communication technologies, the intelligent terminal has more and more working frequency bands, so that the needed radio frequency devices are more and more, the cost of the radio frequency devices is higher and more in proportion to the total cost of the terminal, and the urgent nature of cost reduction is more and more prominent. How to meet the standard requirements in terms of performance, particularly the performance of a TDD (time division duplex) high-frequency band, while reducing the cost of the device.
There are two main set receiving circuit schemes of the traditional TDD high frequency band: one is that the receiving and transmitting circuits respectively use one filter, namely two filters are needed; the other is that the receiving and transmitting circuits share one transmitting filter, that is, the transmitting signal and the receiving signal need to pass through the transmitting filter, although the scheme saves one receiving filter, because the receiving signal needs to pass through the high-frequency receiving path of the power amplifier, the transmitting signal part of other high-frequency ports of the power amplifier is easy to leak to the high-frequency receiving circuit, and when the signal line of the high-frequency receiving circuit is close to the adjacent modem and the main set receiving circuit, the transmitting signal is caused to practically enter the receiving circuit, so that the transmission and receiving sensitivity is reduced, and the standard requirement cannot be met.
Disclosure of Invention
Aiming at the defects of the prior art, the utility model provides a circuit for improving the time division duplex receiving sensitivity and an intelligent terminal.
The technical scheme adopted for solving the technical problems is as follows: a circuit for improving time division duplex reception sensitivity is constructed, comprising: the device comprises a filtering module, a switching module, a power amplifying module and a modulation and demodulation module;
the filtering module is used for filtering the signals;
the switch module is respectively connected with the power amplification module and the modulation and demodulation module and is used for controlling the on-off between the power amplification module and the filtering module and the on-off between the modulation and demodulation module and the filtering module;
the power amplification module is connected with the modulation and demodulation module, and is used for amplifying signals output by the modulation and demodulation module and outputting transmitting signals to the filtering module through the switch module when the power amplification module is communicated with the filtering module;
the modulation and demodulation module is used for carrying out modulation and demodulation processing on the received signals transmitted by the switch module when the modulation and demodulation module is communicated with the filtering module, and outputting modulation and demodulation signals to a rear-stage circuit.
In the circuit for improving time division duplex receiving sensitivity of the present utility model, the switch module includes: a single pole double throw switch;
the first end of the single-pole double-throw switch is connected with the filtering module, the second end of the single-pole double-throw switch is connected with the power amplifying module, and the third end of the single-pole double-throw switch is connected with the modulation and demodulation module.
In the circuit for improving time division duplex receiving sensitivity of the present utility model, the filtering module includes: a filter;
the first end of the filter is connected with the radio frequency test seat, and the second end of the filter is connected with the first end of the single-pole double-throw switch.
In the circuit for improving time division duplex receiving sensitivity of the present utility model, the power amplifying module includes: a power amplifier;
the high-frequency output port of the power amplifier is connected with the second end of the single-pole double-throw switch, and the high-frequency input port of the power amplifier is connected with the modem module.
In the circuit for improving time division duplex receiving sensitivity of the present utility model, the modem module includes: a modem;
the transmitting signal output end of the modem is connected with the high-frequency input port of the power amplifier, and the receiving signal input end of the modem is connected with the third end of the single-pole double-throw switch.
In the circuit for improving time division duplex receiving sensitivity of the present utility model, the circuit further comprises: a control module;
the control module is connected with the switch module and is used for generating a switching control signal and sending the switching control signal to the switch module so as to control the switch module to execute switching of a transmitting path and a receiving path.
In the circuit for improving time division duplex receiving sensitivity of the present utility model, the control module includes: an MCU;
the GPIO port of the MCU is connected with the control end of the single-pole double-throw switch and is used for sending the switching control signal to the control end of the single-pole double-throw switch so as to control the single-pole double-throw switch to execute the switching between the transmitting path and the receiving path.
In the circuit for improving the time division duplex receiving sensitivity, when the first end and the second end of the single-pole double-throw switch are communicated, the circuit is switched to the transmitting path;
and when the first end of the single-pole double-throw switch is communicated with the third end, the single-pole double-throw switch is switched to the receiving passage.
In the circuit for improving the time division duplex receiving sensitivity, when the first end and the second end of the single-pole double-throw switch are communicated, the filtering module, the single-pole double-throw switch and the power amplification module form the transmitting path;
when the first end of the single-pole double-throw switch is communicated with the third end, the filtering module, the single-pole double-throw switch and the modulation and demodulation module form the receiving channel.
The utility model also provides an intelligent terminal which comprises the circuit for improving the time division duplex receiving sensitivity.
The circuit for improving the time division duplex receiving sensitivity and the intelligent terminal have the following beneficial effects: comprising the following steps: the device comprises a filtering module, a switching module, a power amplifying module and a modulation and demodulation module; the filtering module carries out filtering processing on the signals; the switch module is respectively connected with the power amplification module and the modulation and demodulation module, and is used for controlling the on-off between the power amplification module and the filtering module and the on-off between the modulation and demodulation module and the filtering module; the power amplification module is connected with the modulation and demodulation module, amplifies the signal output by the modulation and demodulation module, and outputs a transmitting signal to the filtering module through the switch module when the power amplification module is communicated with the filtering module; when the modulation and demodulation module is communicated with the filtering module, modulation and demodulation processing is carried out on the received signals transmitted by the switch module, and modulation and demodulation signals are output to a rear-stage circuit. The utility model can avoid the emission signal from entering the receiving link, effectively improve the receiving sensitivity, and simultaneously, only adopts one filtering module, thereby leading the cost to be lower.
Drawings
The utility model will be further described with reference to the accompanying drawings and examples, in which:
fig. 1 is a schematic structural diagram of a circuit for improving tdd reception sensitivity according to an embodiment of the present utility model;
fig. 2 is a schematic circuit diagram for improving the time division duplex receiving sensitivity according to an embodiment of the present utility model.
Detailed Description
The following description of the embodiments of the present utility model will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present utility model, but not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the utility model without making any inventive effort, are intended to be within the scope of the utility model.
In a preferred embodiment, referring to fig. 1, the circuit for improving time division duplex receiving sensitivity provided by the present utility model includes: a filtering module 11, a switching module 12, a power amplifying module 13 and a modulation and demodulation module 14.
The filtering module 11 is used for filtering the signal.
The switch module 12 is respectively connected with the power amplifying module 13 and the modem module 14, and is used for controlling the on-off between the power amplifying module 13 and the filter module 11 and the on-off between the modem module 14 and the filter module 11.
The power amplification module 13 is connected to the modem module 14, and is configured to amplify a signal output from the modem module 14, and output a transmit signal to the filter module 11 through the switch module 12 when the power amplification module is in communication with the filter module 11.
The modem module 14 is configured to perform a modem process on the received signal transmitted by the switch module 12 when communicating with the filter module 11, and output a modem signal to a post-stage circuit.
In the embodiment of the present utility model, the filtering module 11 is implemented by using a filter. By combining the switching module 12 with one filter, it is achieved that the transmitting and receiving circuits share one filter, and switching between the transmitting path and the receiving path is achieved by the switching module 12.
In some embodiments, the switch module 12 includes: single pole double throw switch.
The first end of the single-pole double-throw switch is connected with the filtering module 11, the second end of the single-pole double-throw switch is connected with the power amplifying module 13, and the third end of the single-pole double-throw switch is connected with the modulation and demodulation module 14. Specifically, when the first end and the second end of the single-pole double-throw switch are communicated, switching to a transmitting passage; when the first end of the single pole double throw switch is communicated with the third end, the receiving path is switched.
Wherein the filtering module 11, the single pole double throw switch and the power amplifying module 13 form a transmitting path when the first end and the second end of the single pole double throw switch are communicated. When the first end of the single pole double throw switch is in communication with the third end, the filtering module 11, the single pole double throw switch, and the modem module 14 form a receive path.
In some embodiments, the filtering module 11 includes: a filter; the first end of the filter is connected with the radio frequency test seat, and the second end of the filter is connected with the first end of the single-pole double-throw switch. Optionally, in the embodiment of the present utility model, the filter may be a general filter, so long as the filter can be applied to an intelligent terminal and implemented to filter a transmission signal and/or a reception signal in a time division duplex system.
In some embodiments, the power amplification module 13 includes: a power amplifier; the high frequency output port of the power amplifier is connected with the second end of the single pole double throw switch, and the high frequency input port of the power amplifier is connected with the modem module 14. Alternatively, the power amplifier may be a multimode, multi-frequency power amplifier.
Optionally, in the embodiment of the present utility model, the power amplifier is configured to amplify the received signal and output a corresponding power amplified signal. In the embodiment of the present utility model, the high-frequency input port of the power amplifier is connected with the modem module 14, so as to receive the transmitting signal output by the modem module 14, and after the received transmitting signal is amplified correspondingly, the transmitting signal is output through the high-frequency output port and is transmitted to the filter sequentially through the second end and the first end of the single-pole double-throw switch, so that the transmission of the transmitting signal is realized.
In some embodiments, the modem module 14 includes: a modem; the transmitting signal output end of the modem is connected with the high-frequency input port of the power amplifier, and the receiving signal input end of the modem is connected with the third end of the single-pole double-throw switch.
In the embodiment of the utility model, the modem is directly connected with the single-pole double-throw switch by arranging the single-pole double-throw switch so as to form a receiving path, thereby avoiding the loss generated by the received signal received by the modem when passing through the power amplifier and effectively improving the conduction receiving sensitivity of the time division duplex high frequency band.
Further, in some embodiments, as shown in fig. 1, the circuit for improving time division duplex receiving sensitivity further includes: a control module 15.
Specifically, the control module 15 is connected to the switch module 12, and is configured to generate a switching control signal and send the switching control signal to the switch module 12, so as to control the switch module 12 to perform switching between a transmit path and a receive path.
Alternatively, the control module 15 includes: an MCU; the GPIO port of the MCU is connected with the control end of the single-pole double-throw switch and is used for sending a switching control signal to the control end of the single-pole double-throw switch so as to control the single-pole double-throw switch to execute switching between a transmitting path and a receiving path. Alternatively, in the embodiment of the present utility model, the MCU may be an SDM4250 chip or the like. It will be appreciated that in other embodiments, the MCU may also use chips of other series or model numbers, as long as the related functions of the intelligent terminal can be supported, and the MCU is not limited to the model numbers listed in the present utility model.
In a preferred embodiment, as shown in fig. 2, a schematic circuit diagram for improving the time division duplex receiving sensitivity is provided in the present utility model.
In this embodiment, as shown in fig. 2, the transmit path and the receive path share a filter (TX SAW), while a single pole double throw switch for radio frequency is added, which is used to switch the transmit path and the receive path. The modem (TR) is directly connected to the single pole double throw switch. Because the insertion loss of the single-pole double-throw switch is lower (only 0.3 dB), the insertion loss is far smaller than the insertion loss caused by a high-frequency receiving pin transmission path of a multi-mode multi-frequency power amplifier (MMMB PA), and therefore the conductive receiving sensitivity of a time division duplex high frequency band can be remarkably improved. Wherein, the switching control signal is provided by the GPIO pin of the MCU.
Furthermore, in the embodiment of the utility model, the receiving signals do not need to pass through the high-frequency receiving pins of the internal paths of the power amplifier, so that the problem of reduced conduction receiving sensitivity caused by the fact that the transmitting signals cross the receiving paths can be avoided, the receiving sensitivity is further improved, and the utility model can be realized by only adopting one filter, so that the realization cost is lower.
In some embodiments, the utility model further provides an intelligent terminal, which comprises the circuit for improving the time division duplex receiving sensitivity. By setting the circuit for improving the time division duplex receiving sensitivity, the transmission receiving sensitivity of the time division duplex high frequency band can be obviously improved. In addition, the receiving signals do not need to pass through a high-frequency receiving pin of the internal path of the power amplifier, the problem that the transmission signals enter the receiving path to cause the reduction of the conduction receiving sensitivity can be avoided, the receiving sensitivity is further improved, and the utility model can be realized by adopting only one filter, so that the realization cost is lower.
Optionally, in the embodiment of the present utility model, the smart terminal may include, but is not limited to, a mobile phone, an interphone, a smart watch, and the like.
The above embodiments are provided to illustrate the technical concept and features of the present utility model and are intended to enable those skilled in the art to understand the content of the present utility model and implement the same according to the content of the present utility model, and not to limit the scope of the present utility model. All equivalent changes and modifications made with the scope of the claims should be covered by the claims.
Claims (10)
1. A circuit for improving time division duplex receive sensitivity, comprising: the device comprises a filtering module, a switching module, a power amplifying module and a modulation and demodulation module;
the filtering module is used for filtering the signals;
the switch module is respectively connected with the power amplification module and the modulation and demodulation module and is used for controlling the on-off between the power amplification module and the filtering module and the on-off between the modulation and demodulation module and the filtering module;
the power amplification module is connected with the modulation and demodulation module, and is used for amplifying signals output by the modulation and demodulation module and outputting transmitting signals to the filtering module through the switch module when the power amplification module is communicated with the filtering module;
the modulation and demodulation module is used for carrying out modulation and demodulation processing on the received signals transmitted by the switch module when the modulation and demodulation module is communicated with the filtering module, and outputting modulation and demodulation signals to a rear-stage circuit.
2. The circuit for improving time division duplex reception sensitivity according to claim 1, wherein the switching module comprises: a single pole double throw switch;
the first end of the single-pole double-throw switch is connected with the filtering module, the second end of the single-pole double-throw switch is connected with the power amplifying module, and the third end of the single-pole double-throw switch is connected with the modulation and demodulation module.
3. The circuit for improving time division duplex receive sensitivity according to claim 2, wherein the filtering module comprises: a filter;
the first end of the filter is connected with the radio frequency test seat, and the second end of the filter is connected with the first end of the single-pole double-throw switch.
4. The circuit for improving time division duplex reception sensitivity according to claim 2, wherein the power amplification module comprises: a power amplifier;
the high-frequency output port of the power amplifier is connected with the second end of the single-pole double-throw switch, and the high-frequency input port of the power amplifier is connected with the modem module.
5. The circuit for improving time division duplex reception sensitivity according to claim 4, wherein the modem module comprises: a modem;
the transmitting signal output end of the modem is connected with the high-frequency input port of the power amplifier, and the receiving signal input end of the modem is connected with the third end of the single-pole double-throw switch.
6. The circuit for improving time division duplex receive sensitivity according to claim 2, further comprising: a control module;
the control module is connected with the switch module and is used for generating a switching control signal and sending the switching control signal to the switch module so as to control the switch module to execute switching of a transmitting path and a receiving path.
7. The circuit for improving time division duplex receive sensitivity according to claim 6, wherein the control module comprises: an MCU;
the GPIO port of the MCU is connected with the control end of the single-pole double-throw switch and is used for sending the switching control signal to the control end of the single-pole double-throw switch so as to control the single-pole double-throw switch to execute the switching between the transmitting path and the receiving path.
8. The circuit for improving time division duplex receive sensitivity according to claim 6, wherein the single pole double throw switch is switched to the transmit path when the first end is in communication with the second end;
and when the first end of the single-pole double-throw switch is communicated with the third end, the single-pole double-throw switch is switched to the receiving passage.
9. The circuit of claim 7, wherein the filter module, the single pole double throw switch, and the power amplification module form the transmit path when the first end and the second end of the single pole double throw switch are in communication;
when the first end of the single-pole double-throw switch is communicated with the third end, the filtering module, the single-pole double-throw switch and the modulation and demodulation module form the receiving channel.
10. An intelligent terminal comprising the circuit for improving time division duplex receiving sensitivity according to any one of claims 1-9.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202222990396.1U CN219181515U (en) | 2022-11-10 | 2022-11-10 | Circuit for improving time division duplex receiving sensitivity and intelligent terminal |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202222990396.1U CN219181515U (en) | 2022-11-10 | 2022-11-10 | Circuit for improving time division duplex receiving sensitivity and intelligent terminal |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN219181515U true CN219181515U (en) | 2023-06-13 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202222990396.1U Active CN219181515U (en) | 2022-11-10 | 2022-11-10 | Circuit for improving time division duplex receiving sensitivity and intelligent terminal |
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| Country | Link |
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| CN (1) | CN219181515U (en) |
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- 2022-11-10 CN CN202222990396.1U patent/CN219181515U/en active Active
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