CN219164217U - Overcurrent protection circuit - Google Patents
Overcurrent protection circuit Download PDFInfo
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- CN219164217U CN219164217U CN202223487074.1U CN202223487074U CN219164217U CN 219164217 U CN219164217 U CN 219164217U CN 202223487074 U CN202223487074 U CN 202223487074U CN 219164217 U CN219164217 U CN 219164217U
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Abstract
The utility model provides an overcurrent protection circuit, which belongs to the technical field of protection circuits and comprises a MOS tube Q1, wherein the drain electrode of the MOS tube Q1 is connected with an external load; the monitoring circuit is electrically connected with the MOS tube Q1 and comprises a control chip MCU, wherein the control chip MCU outputs a periodic PWM signal to the MOS tube Q1, the MOS tube Q1 generates a corresponding voltage value according to the periodic PWM signal, and the voltage value is collected through an input pin of the control chip MCU so as to monitor the driving current of an external load during operation. According to the utility model, the control chip MCU sends out a periodic PWM signal and monitors the voltage drop of the MOS tube Q1 through the AD pin in real time, the voltage at the AD pin is in direct proportion to the voltage drop of the MOS tube Q1, and further the magnitude of the driving current is monitored, the whole overcurrent protection circuit has the advantages of simple structure, few components, low manufacturing cost and small occupied space, and can monitor whether the MOS tube Q1 is short-circuited or not while the overcurrent protection is realized, so that the overcurrent protection circuit has multiple functions and high practicability.
Description
Technical Field
The utility model belongs to the technical field of protection circuits, and particularly relates to an overcurrent protection circuit.
Background
In the motor drive design, a current sampling circuit is required to be designed, the driving current is monitored in real time, the current is prevented from being overlarge, products are damaged, the current sampling resistor is connected in series on the driving circuit in the current commonly used design, the driving current is converted into voltage, the voltage value is amplified through an operational amplifier circuit and then transmitted to an MCU for collection, the current is monitored, and the overcurrent protection function is realized. The operational amplifier module is used in the current design circuit, along with the fact that the number of wafers is smaller, the cost of the integrated chip is increased, the exchange period is longer and longer, the production cost is obviously improved, meanwhile, the number of components used in the current design circuit is larger, the occupied space of a PCB is larger, and the layout of the PCB is limited. Therefore, there is an urgent need to provide an overcurrent protection circuit with a simple structure and low cost, for solving the above problems.
Disclosure of Invention
The utility model aims to solve the problems in the prior art and provides an overcurrent protection circuit with simple structure and low cost.
The aim of the utility model can be achieved by the following technical scheme: the overcurrent protection circuit comprises a MOS tube Q1, wherein the drain electrode of the MOS tube Q1 is connected with an external load; the monitoring circuit is electrically connected with the MOS tube Q1 and comprises a control chip MCU, wherein the control chip MCU outputs a periodic PWM signal to the MOS tube Q1, the MOS tube Q1 generates a corresponding voltage value according to the periodic PWM signal, and the voltage value is collected through an input pin of the control chip MCU so as to monitor the driving current of an external load during operation.
In the above-mentioned overcurrent protection circuit, the monitoring circuit includes a diode D1, an input pin of the control chip MCU is connected with an anode of the diode D1, a cathode of the diode D1 is connected with a drain electrode of the MOS transistor Q1, and when the control chip MCU outputs a PWM signal, a voltage value of the MOS transistor Q1 is collected through an input pin of the control chip MCU to monitor a driving current when the external load works.
In the above-mentioned overcurrent protection circuit, when the control chip outputs the PWM signal, the input pin of the control chip MCU monitors the internal resistance voltage drop of the MOS transistor Q1 to monitor the driving current.
In the above-mentioned overcurrent protection circuit, the monitoring circuit further includes a capacitor C1, a resistor R2, and a resistor R3, where one end of the resistor R3 is connected to the positive electrode of the diode D1, the other end of the resistor R3 is grounded through the capacitor C1, and one end of the resistor R3 connected to the diode D1 is further connected to the operating voltage through the resistor R2.
In the above-mentioned overcurrent protection circuit, when the PWM signal is at a high potential, the capacitor C1 is discharged; when the PMW signal is at a low potential, the capacitor C1 is charged.
In the above-mentioned overcurrent protection circuit, the charging time constant of the capacitor C1 is greater than the period of the PWM signal.
In the above-mentioned overcurrent protection circuit, the gate of the MOS transistor Q1 is connected to the resistor R1, and is connected to the control chip MCU through the resistor R1, and the source of the MOS transistor Q1 is grounded.
In the above-mentioned overcurrent protection circuit, the external load is also connected with a power supply.
Compared with the prior art, the utility model has the following beneficial effects:
according to the overcurrent protection circuit provided by the utility model, the control chip MCU sends out a periodical PWM signal and monitors the voltage drop of the MOS tube Q1 through the AD pin in real time, the voltage at the AD pin is in direct proportion to the voltage drop of the MOS tube Q1, and further the magnitude of the driving current is monitored, so that the whole overcurrent protection circuit is simple in structure, few in components and parts, low in manufacturing cost and small in occupied space, and can monitor whether the MOS tube Q1 is short-circuited or not while overcurrent protection is realized, so that the overcurrent protection circuit is multifunctional and high in practicability.
Drawings
Fig. 1 is a schematic circuit configuration of the present utility model.
Detailed Description
The following are specific embodiments of the present utility model and the technical solutions of the present utility model will be further described with reference to the accompanying drawings, but the present utility model is not limited to these embodiments.
It should be noted that all directional indicators (such as up, down, left, right, front, and rear … …) in the embodiments of the present utility model are merely used to explain the relative positional relationship, movement, etc. between the components in a particular posture (as shown in the drawings), and if the particular posture is changed, the directional indicator is changed accordingly.
As shown in fig. 1, the utility model provides an overcurrent protection circuit, which comprises a MOS transistor Q1, wherein the drain electrode of the MOS transistor Q1 is connected with an external load; the monitoring circuit is electrically connected with the MOS tube Q1 and comprises a control chip MCU, wherein the control chip MCU outputs a periodic PWM signal to the MOS tube Q1, the MOS tube Q1 generates a corresponding voltage value according to the periodic PWM signal, and the voltage value is collected through an input pin of the control chip MCU so as to monitor the driving current of an external load during operation.
Further preferably, the monitoring circuit includes a diode D1, an input pin of the control chip MCU is connected with an anode of the diode D1, a cathode of the diode D1 is connected with a drain electrode of the MOS transistor Q1, and when the control chip MCU outputs the PWM signal, a voltage value of the MOS transistor Q1 is collected through an input pin of the control chip MCU to monitor a driving current when the external load works.
Further preferably, when the control chip outputs the PWM signal, the input pin of the control chip MCU monitors the internal resistance voltage drop of the MOS transistor Q1 to monitor the driving current.
In the prior art, the over-current protection circuit is provided with the sampling resistor, the voltage of the sampling resistor is amplified and then transmitted to the control chip, the amplifying circuit often needs to use the operational amplifier module, the design cost of the circuit is intangibly increased, the traditional over-current protection circuit has a large number of components, the occupied space is large, the integrated design of the PCB is not facilitated, and the production cost is high. The utility model provides an overcurrent protection circuit which comprises a MOS tube Q1, a diode D1 and a control chip MCU, wherein the model of the MOS tube Q1 is preferably 100N08BS or STP80NF70, the drain electrode of the MOS tube Q1 is connected with the cathode of the diode D1, the anode of the diode D1 is connected with an AD pin (namely an input pin) of the control chip MCU, the drain electrode of the MOS tube Q1 is connected with an external load, which can be a motor M, the voltage change of the MOS tube is monitored through the control chip MCU so as to monitor the driving current of the motor, and when the driving current is abnormal, an overcurrent protection mechanism is started to protect the whole circuit.
Specifically, in this embodiment, the current is monitored by using the self resistance drop of the MOS transistor Q1, and a periodic PWM signal is sent to the line through the control chip, when no PWM signal exists, the drain of the MOS transistor Q1 is at a high level, the diode D1 is not turned on, the AD pin of the control chip MCU is at a high level, and if a low level is detected at this time, it can be determined that the MOS transistor Q1 is shorted; when PWM signals exist, when PWM is in high potential, the MOS tube Q1 is conducted, the diode D1 is also conducted, the AD pin is in low potential, overcurrent detection can be conducted at the moment according to the internal resistance voltage drop of the MOS tube Q1, when driving current is small, the voltage drop of the drain electrode and the source electrode of the MOS tube Q1 is small, the voltage of the AD pin is grounded through the diode D1, the voltage detected by the control chip MCU is small, when driving current is large, the voltage drop of the drain electrode and the source electrode of the MOS tube Q1 is large, the voltage corresponding to the AD pin is high, and when the monitored voltage value exceeds a preset range, overcurrent protection can be started through the control chip MCU, and the safety of the whole circuit is protected. It can be seen that in this embodiment, the current monitoring is directly performed by using the resistance voltage drop of the MOS transistor Q1 itself, the control chip MCU sends periodic PWM signals and monitors the voltage drop of the MOS transistor Q1 through the AD pin in real time, the voltage at the AD pin is proportional to the voltage drop of the MOS transistor Q1, and further monitors the magnitude of the driving current, the whole overcurrent protection circuit has simple structure, fewer components and parts, low manufacturing cost and small occupied space, and can monitor whether the MOS transistor Q1 is short-circuited or not while realizing overcurrent protection, and the function is various, and the practicality is high.
Preferably, as shown in fig. 1, the monitoring circuit further includes a capacitor C1, a resistor R2, and a resistor R3, where one end of the resistor R3 is connected to the positive electrode of the diode D1, the other end of the resistor R3 is grounded through the capacitor C1, and one end of the resistor R3 connected to the diode D1 is further connected to the operating voltage through the resistor R2.
Further preferably, when the PWM signal is at a high potential, the capacitor C1 is discharged; when the PMW signal is at a low potential, the capacitor C1 is charged.
Further preferably, the charging time constant of the capacitor C1 is greater than the period of the PWM signal.
In this embodiment, still include electric capacity C1 in the monitoring circuit, electric capacity C1 has resistance R3 and resistance R2 in series, resistance R2 connects operating voltage VCC, when PWM is in high potential, MOS pipe Q1 switches on, diode D1 also switches on, electric capacity C1 discharges fast, when PWM is in low potential, MOS pipe Q1 switches off, electric capacity C1 charges through VCC weak pull-up, the charge time constant is greater than PWM's cycle, through setting up electric capacity C1, and set up its charge time constant to be greater than PWM's cycle, control sampling voltage through electric capacity C1 and maintain stably in a certain time, the sampling voltage that the assurance AD pin department gathered is more accurate.
Preferably, as shown in fig. 1, a gate of the MOS transistor Q1 is connected to a resistor R1, and is connected to the control chip MCU through the resistor R1, and a source of the MOS transistor Q1 is grounded.
Further preferably, the external load is also connected with a power supply.
It should be noted that the description of the present utility model as it relates to "first", "second", "a", etc. is for descriptive purposes only and is not to be construed as indicating or implying a relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defining "a first" or "a second" may explicitly or implicitly include at least one such feature. In the description of the present utility model, the meaning of "plurality" means at least two, for example, two, three, etc., unless specifically defined otherwise. The terms "coupled," "secured," and the like are to be construed broadly, and may be fixedly coupled, detachably coupled, or integrally formed, for example; can be mechanically or electrically connected; either directly or indirectly, through intermediaries, or both, may be in communication with each other or in interaction with each other, unless expressly defined otherwise. The specific meaning of the above terms in the present utility model can be understood by those of ordinary skill in the art according to the specific circumstances.
In addition, the technical solutions of the embodiments of the present utility model may be combined with each other, but it is necessary to be based on the fact that those skilled in the art can implement the technical solutions, and when the technical solutions are contradictory or cannot be implemented, the combination of the technical solutions should be considered as not existing, and not falling within the scope of protection claimed by the present utility model.
The specific embodiments described herein are offered by way of example only to illustrate the spirit of the utility model. Those skilled in the art may make various modifications or additions to the described embodiments or substitutions thereof without departing from the spirit of the utility model or exceeding the scope of the utility model as defined in the accompanying claims.
Claims (8)
1. An overcurrent protection circuit, comprising:
the MOS tube Q1, the drain electrode of the MOS tube Q1 is connected with an external load;
the monitoring circuit is electrically connected with the MOS tube Q1 and comprises a control chip MCU, wherein the control chip MCU outputs a periodic PWM signal to the MOS tube Q1, the MOS tube Q1 generates a corresponding voltage value according to the periodic PWM signal, and the voltage value is collected through an input pin of the control chip MCU so as to monitor the driving current of an external load during operation.
2. The overcurrent protection circuit according to claim 1, wherein the monitoring circuit comprises a diode D1, an input pin of the control chip MCU is connected with an anode of the diode D1, a cathode of the diode D1 is connected with a drain electrode of the MOS transistor Q1, and when the control chip MCU outputs the PWM signal, a voltage value of the MOS transistor Q1 is collected through the input pin of the control chip MCU to monitor a driving current when the external load works.
3. The overcurrent protection circuit according to claim 2, wherein when the control chip MCU outputs the PWM signal, the input pin of the control chip MCU monitors the internal resistance voltage drop of the MOS transistor Q1 to monitor the driving current.
4. The overcurrent protection circuit according to claim 1, wherein the monitoring circuit further comprises a capacitor C1, a resistor R2 and a resistor R3, wherein one end of the resistor R3 is connected to the positive electrode of the diode D1, the other end of the resistor R3 is grounded through the capacitor C1, and one end of the resistor R3 connected to the diode D1 is further connected to the operating voltage through the resistor R2.
5. The overcurrent protection circuit according to claim 4, wherein the capacitor C1 discharges when the PWM signal is at a high potential; when the PMW signal is at a low potential, the capacitor C1 is charged.
6. The overcurrent protection circuit according to claim 5, wherein the charge time constant of the capacitor C1 is larger than the period of the PWM signal.
7. The overcurrent protection circuit according to claim 1, wherein a gate of the MOS transistor Q1 is connected to a resistor R1, and is connected to the control chip MCU through the resistor R1, and a source of the MOS transistor Q1 is grounded.
8. The overcurrent protection circuit of claim 1, wherein the external load is further connected to a power source.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202223487074.1U CN219164217U (en) | 2022-12-27 | 2022-12-27 | Overcurrent protection circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202223487074.1U CN219164217U (en) | 2022-12-27 | 2022-12-27 | Overcurrent protection circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN219164217U true CN219164217U (en) | 2023-06-09 |
Family
ID=86621725
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202223487074.1U Active CN219164217U (en) | 2022-12-27 | 2022-12-27 | Overcurrent protection circuit |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN219164217U (en) |
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2022
- 2022-12-27 CN CN202223487074.1U patent/CN219164217U/en active Active
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