CN219162999U - Distributed LED screen applied to traffic side early warning equipment - Google Patents
Distributed LED screen applied to traffic side early warning equipment Download PDFInfo
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- CN219162999U CN219162999U CN202223251287.4U CN202223251287U CN219162999U CN 219162999 U CN219162999 U CN 219162999U CN 202223251287 U CN202223251287 U CN 202223251287U CN 219162999 U CN219162999 U CN 219162999U
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Abstract
The utility model relates to a distributed LED screen applied to traffic side early warning equipment, and belongs to the technical field of LED display screens. This distributed LED screen includes the LED screen module, still includes: the device comprises a serial communication input interface, a serial communication cascade interface, a display image memory, an LED screen module universal interface, an ID setting coding switch and a microprocessor; the microprocessor is respectively connected with the serial communication input interface, the serial communication cascade interface, the display image memory, the LED screen module universal interface and the ID setting coding switch; the universal interface of the LED screen module is also connected with the LED screen module. The LED screen module can be flexibly distributed according to the arrangement sequence of the actual LED screen modules, and is easy to popularize and apply.
Description
Technical Field
The utility model belongs to the technical field of LED display screens, and particularly relates to a distributed LED screen applied to traffic side early warning equipment.
Background
At present, the LED display screen has been widely used in various fields, especially outdoor display, and has become the mainstream. The LED display screen is composed of individual LED light emitting points, that is, pixels, which are often connected in series in a certain order, and the LED display screen is controlled to display images by serial control signals, so that the LED display screen is used to display patterns, and a controller of the LED screen must be provided to drive the pixels to display the patterns together.
According to the content displayed by the LED display screen, two categories can be broadly classified: the display screen is similar to an ordinary display, and is used for displaying high-speed dynamic images, the controller of the display screen needs to control the display screen to update the content of the display images at high speed to form smooth dynamic images, and the controller is complex in structure and high in cost due to large data transmission amount; the other type mainly displays static or quasi-static images and characters, the controller does not need to update the display content rapidly, only needs to refresh the display screen to ensure the stability of the display content, and the controller has lower cost, but most controllers only can display images according to a preset sequence. For example, an LED display screen for issuing traffic graphic information and warning information in the traffic field belongs to this category, but the controller of the second category of display screen applied in the traffic field needs not only to display static patterns, but also has two special requirements: 1) The required pattern can be displayed rapidly according to the control signal; 2) Different screen pixel numbers and aspect ratios can be accommodated.
In the prior art, chinese patent publication No. CN210956111U discloses an LED screen controller in 7 th month of 2020, which comprises a CPU, an LED screen interface circuit, a relay interface circuit, an RS232 interface circuit, an RS485 interface circuit, a 4G DTU circuit and a power management circuit which are connected with the CPU, and further comprises a lithium battery and a solar panel which are connected with the power management circuit. The intelligent control system is used for solving the real-time information release requirements of industries such as flood prevention, hydrology, water conservancy and the like, and a local sensor interface and a power control relay are added on the basis of the existing equipment, so that project construction cost, manual maintenance cost and daily maintenance cost are reduced. The scheme provides a mode of controlling display through RS232, and the output of early warning information can be controlled through a remote platform, but the configuration is not flexible enough, and the adaptability is limited. Therefore, how to overcome the defects of the prior art is a problem to be solved in the technical field of the current LED display screen.
Disclosure of Invention
The utility model aims to solve the defects of the prior art and provides a distributed LED screen applied to traffic side early warning equipment.
In order to achieve the above purpose, the technical scheme adopted by the utility model is as follows:
a distributed LED screen applied to traffic side early warning equipment comprises an LED screen module and further comprises:
the device comprises a serial communication input interface, a serial communication cascade interface, a display image memory, an LED screen module universal interface, an ID setting coding switch and a microprocessor;
the microprocessor is respectively connected with the serial communication input interface, the serial communication cascade interface, the display image memory, the LED screen module universal interface and the ID setting coding switch;
the universal interface of the LED screen module is also connected with the LED screen module.
Further, it is preferable that the serial communication interface adopts a UART communication interface of TTL level.
Further, it is preferable that the serial communication access port (2) includes a four-core socket JP2, and shares diodes VD1, VD2 and pull-up resistors R1, R2 with the serial communication cascade interface;
the first pin of the four-core socket JP2 is connected with a 5V direct current power supply, the fourth pin is grounded, the third pin is connected with a serial communication receiving end RXD of the microcontroller through a diode VD2, the second pin is connected with a serial communication transmitting end TXD signal of the microcontroller through a diode VD1, and the second pin is also connected with one end of a pull-up resistor R1;
the serial communication cascade interface comprises a four-core socket JP3, and shares diodes VD1 and VD2 and pull-up resistors R1 and R2 with the serial communication input interface;
the first pin of the four-core socket JP3 is connected with a 5V direct current power supply, the fourth pin is grounded, the third pin is connected with a serial communication receiving end RXD of the microcontroller through a diode VD2, the second pin is connected with a serial communication transmitting end TXD signal of the microcontroller through a diode VD1, and the second pin is also connected with one end of a pull-up resistor R1;
the other end of the pull-up resistor R1 is connected with a 5V direct current power supply;
one end of the pull-up resistor R2 is connected with the cathode of the diode VD2, and the other end of the pull-up resistor R2 is connected with a 5V direct current power supply.
Further, it is preferable that the ID setting code switch (6) employs 2 decimal rotation code switches and a pull-down resistor bank r×9p.
Further, it is preferable that the ID setting code switch includes a first decimal rotation code switch N1, a twentieth decimal rotation code switch N2, and a pull-down resistor bank r×9p; the second pin and the fifth pin of the first decimal rotary coding switch N1 are connected with a 5V direct current power supply; the second pin and the fifth pin of the twenty-first rotary coding switch N2 are also connected with a 5V direct current power supply; the first pin, the fourth pin, the third pin and the sixth pin of the first decimal rotary coding switch N1 are correspondingly connected with the second pin, the third pin, the fourth pin and the fifth pin of the pull-down resistor row R x 9P; the first pin, the fourth pin, the third pin and the sixth pin of the twenty-first rotary coding switch N2 are correspondingly connected with the sixth pin, the seventh pin, the eighth pin and the ninth pin of the pull-down resistor row R x 9P; the first pin of the pull-down resistor bank R x 9P is grounded; the second pin, the third pin, the fourth pin, the fifth pin, the sixth pin, the seventh pin, the eighth pin, and the ninth pin of the pull-down resistor bank R x 9P are correspondingly connected to the first pin, the second pin, the third pin, the fourth pin, the fifth pin, the seventh pin, the eighth pin, and the ninth pin of the microprocessor STC8A8K64D 4.
Further, preferably, the microprocessor (7) adopts an STC8A8K64D4 singlechip U0 of an LQFP package 44 pin; the P1 port of the microprocessor is connected with an ID setting coding switch; the ports P0 and P2 of the microprocessor are connected with the universal interface of the LED screen module through a tri-state buffer; an eighteenth pin of the microprocessor is a serial communication receiving end RXD pin; the nineteenth pin of the microprocessor is a TXD pin of a serial communication transmitting end, and is respectively connected with a serial communication input interface and a serial communication cascade interface through VD1 and VD 2.
Further, it is preferable that the display image memory uses a W25Q16 FLASH chip U3; the first pin of the display image memory is connected with the twenty-third pin of the microprocessor, the second pin is connected with the twenty-first pin of the microprocessor, the fourth pin is grounded, the fifth pin is connected with the twenty-second pin of the microprocessor, the sixth pin is connected with the twentieth pin of the microprocessor, and the eighth pin is respectively connected with a 5V direct current power supply and one end of a capacitor C2; the other end of the capacitor C2 is grounded.
Further, it is preferred that the LED screen module universal interface includes 2 pieces of 74HC245 chips and 1 IDC2.54-16P interface jack.
Further, it is preferable that the LED screen module universal interface includes a first 74HC245 chip U1, a second 74HC245 chip U2, and an interface socket JP1;
the first pin of the first 74HC245 chip U1 is connected with a 5V direct current power supply;
the second pin of the first 74HC245 chip U1 is connected with the twenty-seventh pin of the microprocessor;
the third pin of the first 74HC245 chip U1 is connected with the twenty-ninth pin of the microprocessor;
the fourth pin of the first 74HC245 chip U1 is connected with the thirty-first pin of the microprocessor;
the fifth pin of the first 74HC245 chip U1 is connected with the thirty-first pin of the microprocessor;
the sixth pin of the first 74HC245 chip U1 is connected with the thirty-second pin of the microprocessor;
the seventh pin of the first 74HC245 chip U1 is connected with the thirty-third pin of the microprocessor;
the ninth pin of the first 74HC245 chip U1 is connected with the twenty-eighth pin of the microprocessor;
the tenth pin of the first 74HC245 chip U1 is grounded;
the eleventh pin of the first 74HC245 chip U1 is connected to the thirteenth pin of the interface socket JP1;
the thirteenth pin of the first 74HC245 chip U1 is connected with the seventh pin of the interface socket JP1;
the fourteenth pin of the first 74HC245 chip U1 is connected with the sixth pin of the interface socket JP1;
the fifteenth pin of the first 74HC245 chip U1 is connected with the fifth pin of the interface socket JP1;
the sixteenth pin of the first 74HC245 chip U1 is connected with the third pin of the interface socket JP1;
the seventeenth pin of the first 74HC245 chip U1 is connected with the second pin of the interface socket JP1;
the eighteenth pin of the first 74HC245 chip U1 is connected with the first pin of the interface socket JP1;
the nineteenth pin of the first 74HC245 chip U1 is connected with the thirty-seventh pin of the microprocessor;
the twentieth pin of the first 74HC245 chip U1 is connected with a 5V direct current power supply;
the first pin of the second 74HC245 chip U2 is connected with a 5V direct current power supply;
the second pin of the second 74HC245 chip U2 is connected with the forty-fourth pin of the microprocessor;
the third pin of the second 74HC245 chip U2 is connected with the forty-third pin of the microprocessor;
the fourth pin of the second 74HC245 chip U2 is connected with the forty-second pin of the microprocessor;
the fifth pin of the second 74HC245 chip U2 is connected with the forty-first pin of the microprocessor;
the sixth pin of the second 74HC245 chip U2 is connected with the forty pins of the microprocessor;
the seventh pin of the second 74HC245 chip U2 is connected with the thirty-eighth pin of the microprocessor;
the tenth pin of the second 74HC245 chip U2 is grounded;
the thirteenth pin of the second 74HC245 chip U2 is connected with the fifteenth pin of the interface socket JP1;
the fourteenth pin of the second 74HC245 chip U2 is connected with the fourteenth pin of the interface socket JP1;
the fifteenth pin of the second 74HC245 chip U2 is connected with the twelfth pin of the interface socket JP1;
the sixteenth pin of the second 74HC245 chip U2 is connected with the eleventh pin of the interface socket JP1;
the seventeenth pin of the second 74HC245 chip U2 is connected with the tenth pin of the interface socket JP1;
the eighteenth pin of the second 74HC245 chip U2 is connected with the ninth pin of the interface socket JP1;
the nineteenth pin of the second 74HC245 chip U2 is connected with the thirty-seventh pin of the microprocessor;
the twentieth pin of the second 74HC245 chip U2 is connected with a 5V direct current power supply;
the fourth, eighth and sixteenth pins of the interface socket JP1 are all grounded.
Further, it is preferable that the sixteenth pin of the microprocessor is grounded;
the fourteenth pin of the microprocessor is connected with a 5V direct current power supply and one end of a capacitor C1 respectively; the other end of the capacitor C1 is grounded.
In the utility model, a plurality of LED screen modules are connected together to form a cascade group, and share a set of controllers; the set of controller comprises a serial communication input interface, a serial communication cascade interface, a display image memory, an LED screen module universal interface, an ID setting coding switch and a microprocessor, wherein the serial communication cascade interface, the display image memory, the LED screen module universal interface, the ID setting coding switch and the microprocessor are respectively arranged according to the description of the utility model; in the two adjacent cascade groups, the serial communication cascade interface in the controller of the previous cascade group is connected with the serial communication input interface in the controller of the next cascade group. Finally obtaining the distributed LED screen. The distributed LED screen is characterized in that cascade groups formed by a plurality of LED screen modules are distributed in the LED screen, and each cascade group is communicated through a respective controller; as shown in fig. 2. When the large-scale LED screen uses a plurality of groups of cascade groups, the number of LED screen modules in the cascade groups can be the same or different, and the LED screen modules can be set according to actual conditions, so that flexible configuration and combination are realized.
Compared with the prior art, the utility model has the beneficial effects that:
the distributed LED screen applied to traffic side early warning equipment can be flexibly distributed according to the arrangement sequence of actual LED screen modules;
each controller can be connected with a cascade group of LED modules; the LED module models in each cascade group are the same; different cascading groups can use different types of LED modules; the number of the LED modules of different cascade groups can be different; the controllers can be cascaded through the same serial communication signal line; the serial communication can trigger the LED screen to respond to the output requirement rapidly; flexible configuration, good adaptability and easy popularization and application.
Drawings
In order to more clearly illustrate the embodiments of the utility model or the technical solutions of the prior art, the drawings which are used in the description of the embodiments or the prior art will be briefly described, it being obvious that the drawings in the description below are only some embodiments of the utility model, and that other drawings can be obtained according to these drawings without inventive faculty for a person skilled in the art.
FIG. 1 is a block diagram of a distributed LED screen applied to traffic side warning equipment;
FIG. 2 is a schematic diagram of a cascade application of distributed LED screens applied to traffic side warning equipment;
FIG. 3 is a circuit diagram of a serial communication input interface and serial communication cascade interface of the present utility model;
FIG. 4 is a circuit diagram of an image memory according to the present utility model;
FIG. 5 is a circuit diagram of a universal interface of an LED screen module according to the present utility model;
FIG. 6 is a circuit diagram of an ID setup encoding switch of the present utility model;
FIG. 7 is a circuit diagram of a microprocessor according to the present utility model;
FIG. 8 is a circuit diagram of a serial communication input interface, serial communication cascade interface, display image memory, LED screen module universal interface, ID setup coding switch, and general circuit diagram of a microprocessor of the present utility model.
1, an LED screen module; 2. a serial communication input interface; 3. serial communication cascade interface; 4. a display image memory; 5. a universal interface of the LED screen module; 6. an ID setting coding switch; 7. and a microprocessor.
Detailed Description
The present utility model will be described in further detail with reference to examples.
It will be appreciated by those skilled in the art that the following examples are illustrative of the present utility model and should not be construed as limiting the scope of the utility model. The specific techniques, connections, or conditions are not identified in the examples and are set forth in accordance with the techniques, connections, conditions, or in accordance with the product specifications described in the literature in this field. The materials, instruments or equipment used are conventional products available from commercial sources, not identified to the manufacturer.
As used herein, the singular forms "a", "an", "the" and "the" are intended to include the plural forms as well, unless expressly stated otherwise, as understood by those skilled in the art. It will be further understood that the terms "comprises" and/or "comprising," when used in this specification, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof. It will be understood that when an element is referred to as being "connected" to another element, it can be directly connected to the other element or intervening elements may also be present. Further, "connected" as used herein may include wireless connections. The term "and/or" as used herein includes any and all combinations of one or more of the associated listed items.
In the description of the present utility model, unless otherwise indicated, the meaning of "a plurality" is two or more. The orientation or state relationship indicated by the terms "inner", "upper", "lower", etc. are orientation or state relationship based on the drawings, are merely for convenience of description and simplification of description, and do not indicate or imply that the apparatus or element in question must have a specific orientation, be configured and operated in a specific orientation, and therefore should not be construed as limiting the utility model.
In the description of the present utility model, it should be noted that, unless explicitly stated and limited otherwise, the terms "mounted," "connected," and "provided" are to be construed broadly, and may be, for example, fixedly connected, detachably connected, or integrally connected; can be mechanically or electrically connected; can be directly connected or indirectly connected through an intermediate medium. The specific meaning of the above terms in the present utility model is understood by those of ordinary skill in the art according to the specific circumstances.
It will be understood by those skilled in the art that, unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this utility model belongs. It will be further understood that terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning that is consistent with their meaning in the context of the prior art and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein.
It will be appreciated by those skilled in the art that the related modules and functions implemented by the related modules according to the present utility model may be implemented by loading a computer software program or related protocol conventional in the prior art on modified hardware and a device, a device or a system formed by the modified hardware, and are not improvements of the computer software program or related protocol in the prior art. For example, an improved computer hardware system may still implement certain functions of the hardware system by loading an existing software operating system. It will be appreciated, therefore, that the innovation of the present utility model is an improvement over prior art hardware modules and their connected combination, and not merely an improvement over software or protocols that are carried in hardware modules to accomplish the functionality involved.
Those skilled in the art will appreciate that the modules referred to in this disclosure are hardware devices for performing one or more of the operations, methods, steps in the processes, actions, and schemes described in this application. The hardware devices may be specially designed and constructed for the required purposes, or may be implemented using known devices in general purpose computers or other hardware devices as is known. The general purpose computer has a program stored therein that is selectively activated or reconfigured.
As shown in fig. 1 to 8, a distributed LED screen applied to traffic side early warning equipment includes an LED screen module 1, and further includes:
the LED display screen comprises a serial communication input interface 2, a serial communication cascade interface 3, a display image memory 4, an LED screen module universal interface 5, an ID setting coding switch 6 and a microprocessor 7;
the microprocessor 7 is respectively connected with the serial communication input interface 2, the serial communication cascade interface 3, the display image memory 4, the LED screen module universal interface 5 and the ID setting coding switch 6;
the LED screen module universal interface 5 is also connected with the LED screen module 1.
The serial communication access port 2 adopts a UART communication interface with TTL level.
The serial communication access port 2 comprises a four-core socket JP2, and shares diodes VD1 and VD2 and pull-up resistors R1 and R2 with the serial communication cascade interface 3;
the first pin of the four-core socket JP2 is connected with a 5V direct current power supply, the fourth pin is grounded, the third pin is connected with a serial communication receiving end RXD of the microcontroller 7 through a diode VD2, the second pin is connected with a serial communication transmitting end TXD signal of the microcontroller 7 through a diode VD1, and the second pin is also connected with one end of a pull-up resistor R1;
the serial communication cascade interface 3 comprises a four-core socket JP3, and shares diodes VD1 and VD2 and pull-up resistors R1 and R2 with the serial communication input interface 2;
the first pin of the four-core socket JP3 is connected with a 5V direct current power supply, the fourth pin is grounded, the third pin is connected with a serial communication receiving end RXD of the microcontroller 7 through a diode VD2, the second pin is connected with a serial communication transmitting end TXD signal of the microcontroller 7 through a diode VD1, and the second pin is also connected with one end of a pull-up resistor R1;
the other end of the pull-up resistor R1 is connected with a 5V direct current power supply;
one end of the pull-up resistor R2 is connected with the cathode of the diode VD2, and the other end of the pull-up resistor R2 is connected with a 5V direct current power supply.
The ID setting code switch 6 employs 2 decimal rotation code switches and a pull-down resistor bank r×9p.
The ID setting code switch 6 includes a first decimal rotation code switch N1, a twentieth decimal rotation code switch N2, and a pull-down resistor bank r×9p; the second pin and the fifth pin of the first decimal rotary coding switch N1 are connected with a 5V direct current power supply; the second pin and the fifth pin of the twenty-first rotary coding switch N2 are also connected with a 5V direct current power supply; the first pin, the fourth pin, the third pin and the sixth pin of the first decimal rotary coding switch N1 are correspondingly connected with the second pin, the third pin, the fourth pin and the fifth pin of the pull-down resistor row R x 9P; the first pin, the fourth pin, the third pin and the sixth pin of the twenty-first rotary coding switch N2 are correspondingly connected with the sixth pin, the seventh pin, the eighth pin and the ninth pin of the pull-down resistor row R x 9P; the first pin of the pull-down resistor bank R x 9P is grounded; the second pin, the third pin, the fourth pin, the fifth pin, the sixth pin, the seventh pin, the eighth pin, and the ninth pin of the pull-down resistor bank R x 9P are correspondingly connected to the first pin, the second pin, the third pin, the fourth pin, the fifth pin, the seventh pin, the eighth pin, and the ninth pin of the microprocessor 7.
The microprocessor 7 adopts an STC8A8K64D4 singlechip U0 of an LQFP package 44 pin; the P1 port of the microprocessor 7 is connected with an ID setting coding switch 6; the ports of the microprocessor 7P0 and P2 are connected with the LED screen module universal interface 5 through a tri-state buffer; an eighteenth pin of the microprocessor 7 is a serial communication receiving end RXD pin; the nineteenth pin of the microprocessor 7 is a serial communication transmitting end TXD pin, and is connected with the serial communication input interface 2 and the serial communication cascade interface 3 through VD1 and VD2 respectively.
The display image memory 4 adopts a W25Q16 FLASH chip U3; the first pin of the display image memory 4 is connected with the twenty-third pin of the microprocessor 7, the second pin is connected with the twenty-first pin of the microprocessor 7, the fourth pin is grounded, the fifth pin is connected with the twenty-second pin of the microprocessor 7, the sixth pin is connected with the twentieth pin of the microprocessor 7, and the eighth pin is respectively connected with a 5V direct current power supply and one end of the capacitor C2; the other end of the capacitor C2 is grounded.
The LED screen module universal interface 5 includes 2 pieces of 74HC245 chips and 1 IDC2.54-16P interface jack.
The LED screen module universal interface 5 comprises a first 74HC245 chip U1, a second 74HC245 chip U2 and an interface socket JP1;
the first pin of the first 74HC245 chip U1 is connected with a 5V direct current power supply;
the second pin of the first 74HC245 chip U1 is connected with the twenty-seventh pin of the microprocessor 7;
the third pin of the first 74HC245 chip U1 is connected with the twenty-ninth pin of the microprocessor 7;
the fourth pin of the first 74HC245 chip U1 is connected with the thirty-first pin of the microprocessor 7;
the fifth pin of the first 74HC245 chip U1 is connected with the thirty-first pin of the microprocessor 7;
the sixth pin of the first 74HC245 chip U1 is connected with the thirty-second pin of the microprocessor 7;
the seventh pin of the first 74HC245 chip U1 is connected with the thirty-third pin of the microprocessor 7;
the ninth pin of the first 74HC245 chip U1 is connected with the twenty-eighth pin of the microprocessor 7;
the tenth pin of the first 74HC245 chip U1 is grounded;
the eleventh pin of the first 74HC245 chip U1 is connected to the thirteenth pin of the interface socket JP1;
the thirteenth pin of the first 74HC245 chip U1 is connected with the seventh pin of the interface socket JP1;
the fourteenth pin of the first 74HC245 chip U1 is connected with the sixth pin of the interface socket JP1;
the fifteenth pin of the first 74HC245 chip U1 is connected with the fifth pin of the interface socket JP1;
the sixteenth pin of the first 74HC245 chip U1 is connected with the third pin of the interface socket JP1;
the seventeenth pin of the first 74HC245 chip U1 is connected with the second pin of the interface socket JP1;
the eighteenth pin of the first 74HC245 chip U1 is connected with the first pin of the interface socket JP1;
the nineteenth pin of the first 74HC245 chip U1 is connected with the thirty-seventh pin of the microprocessor 7;
the twentieth pin of the first 74HC245 chip U1 is connected with a 5V direct current power supply;
the first pin of the second 74HC245 chip U2 is connected with a 5V direct current power supply;
the second pin of the second 74HC245 chip U2 is connected with the forty-fourth pin of the microprocessor 7;
the third pin of the second 74HC245 chip U2 is connected with the forty-third pin of the microprocessor 7;
the fourth pin of the second 74HC245 chip U2 is connected with the forty-second pin of the microprocessor 7;
the fifth pin of the second 74HC245 chip U2 is connected with the forty-first pin of the microprocessor 7;
the sixth pin of the second 74HC245 chip U2 is connected with the forty pin of the microprocessor 7;
the seventh pin of the second 74HC245 chip U2 is connected with the thirty-eighth pin of the microprocessor 7;
the tenth pin of the second 74HC245 chip U2 is grounded;
the thirteenth pin of the second 74HC245 chip U2 is connected with the fifteenth pin of the interface socket JP1;
the fourteenth pin of the second 74HC245 chip U2 is connected with the fourteenth pin of the interface socket JP1;
the fifteenth pin of the second 74HC245 chip U2 is connected with the twelfth pin of the interface socket JP1;
the sixteenth pin of the second 74HC245 chip U2 is connected with the eleventh pin of the interface socket JP1;
the seventeenth pin of the second 74HC245 chip U2 is connected with the tenth pin of the interface socket JP1;
the eighteenth pin of the second 74HC245 chip U2 is connected with the ninth pin of the interface socket JP1;
the nineteenth pin of the second 74HC245 chip U2 is connected with the thirty-seventh pin of the microprocessor 7;
the twentieth pin of the second 74HC245 chip U2 is connected with a 5V direct current power supply;
the fourth, eighth and sixteenth pins of the interface socket JP1 are all grounded.
The sixteenth pin of the microprocessor 7 is grounded;
the fourteenth pin of the microprocessor 7 is respectively connected with a 5V direct current power supply and one end of a capacitor C1; the other end of the capacitor C1 is grounded.
In the utility model, a serial communication cascade interface JP3 realizes the enhancement of cascade signals through a diode VD2 and a pull-up resistor R2;
the display image memory 4 adopts an SPI interface FLASH memory to realize nonvolatile data storage, and preferably adopts a W25Q16 FLASH chip.
The microprocessor 7 is implemented using an STC8A8K64D4 chip with an LCD interface.
In the serial communication input interface 2 and the serial communication cascade interface 3, the diode VD1 is used for preventing the transmission signals of different controllers from collision when the multiple controllers are cascaded; the diode VD2 is used for reducing the load of communication signals and avoiding transmission limitation; the pull-up resistors R1 and R2 are used for improving signal driving capability during cascading.
The ID setting code switch 6 includes two rotary code switches N1 and N2, each of which includes 0 to 9 gears, each of which corresponds to outputting a binary number, for example, when the first decimal rotary code switch N1 rotates to the gear 3, P4, P3, P2 and P1 are respectively low, high and high, and correspond to 4-bit binary numbers 0011, the decimal number is 3, a decimal number of ID numbers is formed, P5, P6, P7 and P8 of the second decimal rotary code switch N2 form a bit number of ID numbers, and the two rotary code switches are connected together to the microcontroller 7, so that the microcontroller 7 can identify 2-bit decimal ID numbers. Fig. 4 shows circuit ID number ranges 00-99.
The microcontroller 7 adopts a low-cost singlechip such as STC8A8K64D 4; the display image memory 4 adopts a W25Q16 FLASH chip; the universal interface of the LED screen module adopts a 74HC245 chip with a tri-state gate and an IDC2.54-16P interface socket JP1, can fully utilize the LCD interface function of an STC8A8K64S4 singlechip, can realize high-speed output of pixel data and the like without program control in the process of outputting row pixel data through a DMA technology.
The serial communication input interface 2 can receive image control signals to be displayed, and can output signals to other controllers in a cascading way through the serial communication cascading interface 3, and cascading signals are enhanced through the diode VD2 and the pull-up resistor R2, so that the cascading reliability of communication signals is ensured; the display image memory 4 can store the image information to be displayed for a long time, so that the image information cannot be lost after power failure. The LED screen module universal interface 6 can be used for connecting and controlling the common LED screen module 1; through ID number that ID set up code switch 6, can know the distribution condition of ID set up the controller at code switch 6 place, can distinguish the LED screen cascade module 1 under the controller that can be different through different ID numbers.
The foregoing has shown and described the basic principles, principal features and advantages of the utility model. It will be understood by those skilled in the art that the present utility model is not limited to the embodiments described above, and that the above embodiments and descriptions are merely illustrative of the principles of the present utility model, and various changes and modifications may be made without departing from the spirit and scope of the utility model, which is defined in the appended claims. The scope of the utility model is defined by the appended claims and equivalents thereof.
Claims (10)
1. The utility model provides a be applied to traffic way side early warning equipment's distributed LED screen, includes LED screen module (1), its characterized in that still includes:
the LED display screen comprises a serial communication input interface (2), a serial communication cascade interface (3), a display image memory (4), an LED screen module universal interface (5), an ID setting coding switch (6) and a microprocessor (7);
the microprocessor (7) is respectively connected with the serial communication input interface (2), the serial communication cascade interface (3), the display image memory (4), the LED screen module universal interface (5) and the ID setting coding switch (6);
the universal interface (5) of the LED screen module is also connected with the LED screen module (1).
2. The distributed LED screen for traffic side warning equipment according to claim 1, characterized in that the serial communication access port (2) adopts a UART communication interface of TTL level.
3. The distributed LED screen applied to traffic side early warning equipment according to claim 2, characterized in that the serial communication access port (2) comprises a four-core socket JP2 and shares diodes VD1, VD2 and pull-up resistors R1, R2 with the serial communication cascade interface (3);
the first pin of the four-core socket JP2 is connected with a 5V direct current power supply, the fourth pin is grounded, the third pin is connected with a serial communication receiving end RXD of the microcontroller (7) through a diode VD2, the second pin is connected with a serial communication transmitting end TXD signal of the microcontroller (7) through a diode VD1, and the second pin is also connected with one end of a pull-up resistor R1;
the serial communication cascade interface (3) comprises a four-core socket JP3, and shares diodes VD1 and VD2 and pull-up resistors R1 and R2 with the serial communication input interface (2);
the first pin of the four-core socket JP3 is connected with a 5V direct current power supply, the fourth pin is grounded, the third pin is connected with a serial communication receiving end RXD of the microcontroller (7) through a diode VD2, the second pin is connected with a serial communication transmitting end TXD signal of the microcontroller (7) through a diode VD1, and the second pin is also connected with one end of a pull-up resistor R1;
the other end of the pull-up resistor R1 is connected with a 5V direct current power supply;
one end of the pull-up resistor R2 is connected with the cathode of the diode VD2, and the other end of the pull-up resistor R2 is connected with a 5V direct current power supply.
4. The distributed LED screen for traffic side warning equipment according to claim 1, characterized in that the ID setting coding switch (6) employs 2 decimal rotary coding switches and a pull-down resistor bank R x 9P.
5. The distributed LED screen applied to traffic side early warning equipment according to claim 4, characterized in that the ID setting coding switch (6) comprises a first decimal rotation coding switch N1, a twentieth decimal rotation coding switch N2 and a pull-down resistor bank R x 9P; the second pin and the fifth pin of the first decimal rotary coding switch N1 are connected with a 5V direct current power supply; the second pin and the fifth pin of the twenty-first rotary coding switch N2 are also connected with a 5V direct current power supply; the first pin, the fourth pin, the third pin and the sixth pin of the first decimal rotary coding switch N1 are correspondingly connected with the second pin, the third pin, the fourth pin and the fifth pin of the pull-down resistor row R x 9P; the first pin, the fourth pin, the third pin and the sixth pin of the twenty-first rotary coding switch N2 are correspondingly connected with the sixth pin, the seventh pin, the eighth pin and the ninth pin of the pull-down resistor row R x 9P; the first pin of the pull-down resistor bank R x 9P is grounded; the second pin, the third pin, the fourth pin, the fifth pin, the sixth pin, the seventh pin, the eighth pin and the ninth pin of the pull-down resistor bank R x 9P are correspondingly connected with the first pin, the second pin, the third pin, the fourth pin, the fifth pin, the seventh pin, the eighth pin and the ninth pin of the microprocessor (7).
6. The distributed LED screen applied to traffic side early warning equipment according to claim 1, characterized in that the microprocessor (7) adopts an STC8A8K64D4 single-chip microcomputer U0 of LQFP package 44 pins; a P1 port of the microprocessor (7) is connected with an ID setting coding switch (6); the ports P0 and P2 of the microprocessor (7) are connected with the universal interface (5) of the LED screen module through a tri-state buffer; an eighteenth pin of the microprocessor (7) is a serial communication receiving end RXD pin; the nineteenth pin of the microprocessor (7) is a TXD pin of a serial communication transmitting end, and is respectively connected with the serial communication input interface (2) and the serial communication cascade interface (3) through VD1 and VD 2.
7. The distributed LED screen for traffic side warning equipment according to claim 6, characterized in that the display image memory (4) employs a W25Q16 FLASH chip U3; the first pin of the display image memory (4) is connected with a twenty-third pin of the microprocessor (7), the second pin is connected with a twenty-first pin of the microprocessor (7), the fourth pin is grounded, the fifth pin is connected with a twenty-second pin of the microprocessor (7), the sixth pin is connected with a twentieth pin of the microprocessor (7), and the eighth pin is respectively connected with a 5V direct current power supply and one end of the capacitor C2; the other end of the capacitor C2 is grounded.
8. The distributed LED screen for traffic side warning equipment of claim 6, wherein the LED screen module universal interface (5) comprises 2 pieces of 74HC245 chips and 1 IDC2.54-16P interface jack.
9. The distributed LED screen applied to traffic side warning equipment according to claim 8, characterized in that the LED screen module universal interface (5) comprises a first 74HC245 chip U, a 1 second 74HC245 chip U2 and an interface socket JP1;
the first pin of the first 74HC245 chip U1 is connected with a 5V direct current power supply;
the second pin of the first 74HC245 chip U1 is connected with the twenty-seventh pin of the microprocessor (7);
the third pin of the first 74HC245 chip U1 is connected with the twenty-ninth pin of the microprocessor (7);
the fourth pin of the first 74HC245 chip U1 is connected with the thirty-first pin of the microprocessor (7);
the fifth pin of the first 74HC245 chip U1 is connected with the thirty-first pin of the microprocessor (7);
the sixth pin of the first 74HC245 chip U1 is connected with the thirty-second pin of the microprocessor (7);
the seventh pin of the first 74HC245 chip U1 is connected with the thirty-third pin of the microprocessor (7);
the ninth pin of the first 74HC245 chip U1 is connected with the twenty-eighth pin of the microprocessor (7);
the tenth pin of the first 74HC245 chip U1 is grounded;
the eleventh pin of the first 74HC245 chip U1 is connected to the thirteenth pin of the interface socket JP1;
the thirteenth pin of the first 74HC245 chip U1 is connected with the seventh pin of the interface socket JP1;
the fourteenth pin of the first 74HC245 chip U1 is connected with the sixth pin of the interface socket JP1;
the fifteenth pin of the first 74HC245 chip U1 is connected with the fifth pin of the interface socket JP1;
the sixteenth pin of the first 74HC245 chip U1 is connected with the third pin of the interface socket JP1;
the seventeenth pin of the first 74HC245 chip U1 is connected with the second pin of the interface socket JP1;
the eighteenth pin of the first 74HC245 chip U1 is connected with the first pin of the interface socket JP1;
the nineteenth pin of the first 74HC245 chip U1 is connected with the thirty-seventh pin of the microprocessor (7);
the twentieth pin of the first 74HC245 chip U1 is connected with a 5V direct current power supply;
the first pin of the second 74HC245 chip U2 is connected with a 5V direct current power supply;
the second pin of the second 74HC245 chip U2 is connected with the forty-fourth pin of the microprocessor (7);
the third pin of the second 74HC245 chip U2 is connected with the forty-third pin of the microprocessor (7);
the fourth pin of the second 74HC245 chip U2 is connected with the forty-second pin of the microprocessor (7);
the fifth pin of the second 74HC245 chip U2 is connected with the forty-first pin of the microprocessor (7);
the sixth pin of the second 74HC245 chip U2 is connected with the forty pin of the microprocessor (7);
the seventh pin of the second 74HC245 chip U2 is connected with the thirty-eighth pin of the microprocessor (7);
the tenth pin of the second 74HC245 chip U2 is grounded;
the thirteenth pin of the second 74HC245 chip U2 is connected with the fifteenth pin of the interface socket JP1;
the fourteenth pin of the second 74HC245 chip U2 is connected with the fourteenth pin of the interface socket JP1;
the fifteenth pin of the second 74HC245 chip U2 is connected with the twelfth pin of the interface socket JP1;
the sixteenth pin of the second 74HC245 chip U2 is connected with the eleventh pin of the interface socket JP1;
the seventeenth pin of the second 74HC245 chip U2 is connected with the tenth pin of the interface socket JP1;
the eighteenth pin of the second 74HC245 chip U2 is connected with the ninth pin of the interface socket JP1;
the nineteenth pin of the second 74HC245 chip U2 is connected with the thirty-seventh pin of the microprocessor (7);
the twentieth pin of the second 74HC245 chip U2 is connected with a 5V direct current power supply;
the fourth, eighth and sixteenth pins of the interface socket JP1 are all grounded.
10. The distributed LED screen applied to traffic side warning equipment according to claim 9, characterized in that the sixteenth pin of the microprocessor (7) is grounded;
a fourteenth pin of the microprocessor (7) is respectively connected with a 5V direct current power supply and one end of a capacitor C1; the other end of the capacitor C1 is grounded.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202223251287.4U CN219162999U (en) | 2022-12-05 | 2022-12-05 | Distributed LED screen applied to traffic side early warning equipment |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202223251287.4U CN219162999U (en) | 2022-12-05 | 2022-12-05 | Distributed LED screen applied to traffic side early warning equipment |
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| CN219162999U true CN219162999U (en) | 2023-06-09 |
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| Country | Link |
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