CN219065734U

CN219065734U - Broadband radar signal generation module

Info

Publication number: CN219065734U
Application number: CN202223318821.9U
Authority: CN
Inventors: 张勇; 王元
Original assignee: Nanjing Quanxin Optoelectronic System Co ltd
Current assignee: Nanjing Quanxin Optoelectronic System Co ltd
Priority date: 2022-12-09
Filing date: 2022-12-09
Publication date: 2023-05-23
Anticipated expiration: 2032-12-09

Abstract

The utility model relates to the technical field of radars, and provides a broadband radar signal generation module which comprises a single-path direct digital frequency synthesizer, a mixer, a numerical control oscillator and a digital-to-analog converter; the single-channel direct digital frequency synthesizer receives the input of a radar baseband signal and generates an amplified bandwidth analog signal with zero intermediate frequency through DA conversion; the first input end of the mixer is connected with the output end of the single-path direct digital frequency synthesizer, the second input end of the mixer is connected with the numerical control oscillator and is used for mixing the amplified bandwidth analog signal with the intermediate frequency signal generated by the numerical control oscillator and outputting the mixed signal to the digital-to-analog converter; the digital-to-analog converter carries out high-speed digital-to-analog conversion on the mixed intermediate frequency signals and outputs broadband radar signals. The broadband radar signal generation module based on single-path DDS frequency mixing aims at canceling the use of a radar frequency synthesizer and a frequency agile chip, and generating a radar signal with large bandwidth and rapid frequency hopping on the basis of single-path DDS frequency mixing, thereby being convenient for the miniaturized design of radar equipment.

Description

Broadband radar signal generation module

Technical Field

The utility model relates to the technical field of radars, in particular to a broadband radar signal generation module which is used for generating a radar signal with large bandwidth and rapid change.

Background

In the transmitters of radar systems, as modern radar technology evolves towards broadband, high resolution and digitization, the generation of large broadband signals has become a trend in modern radar systems. In the prior art, a broadband radar signal generating circuit is generally constructed by using a combination of an FPGA and a agile frequency module, as shown in fig. 1, a baseband processor is composed of an FPGA chip, the initialization configuration of the agile frequency chip is completed through an SPI bus, radar baseband signals are generated as required, the radar baseband signals are sent to the agile frequency module through a transmitting data port, the agile frequency module selects an agile frequency receiving and transmitting chip AD9361 of ADI company, the working frequency range of 70M-6G is covered, and the signal bandwidth is 200 KHz-56 MHz. In the practical application process, we find that the bandwidth generated by the method is narrow and the frequency hopping time is long. The channel bandwidth of the agile module AD9361 is less than 56M, so the maximum instantaneous bandwidth of the chirp that it can produce is also 56M. When the AD9361 updates local oscillation frequency points, in order to ensure indexes such as stray leakage of output signals, the DC offset calibration of the radio frequency signals needs to be carried out again, so that the frequency hopping speed is slower, and the current frequency hopping time measured value is 200ms; if the signal quality requirement is not high, calibration can be omitted, the frequency hopping time is the time for writing the configuration file, and the measurement can reach 200us.

Fig. 2 shows a circuit design for generating radar broadband signals by using multiple parallel DDSs (direct digital frequency synthesis) commonly used in the prior art, and the circuit design is realized by adopting a frequency synthesis technology through the synthesis of the multiple parallel DDSs. As shown in fig. 2, the radar baseband signal and the multiple DDS are implemented in the FPGA, and the multiple DDS outputs are sent to a high-speed DAC (digital-to-analog converter) to finally output the wideband radar signal. However, the timing control of the multi-channel DDS is complex, and the calculation amount is large when signals are generated. The multi-channel DDS needs to set two sets of initial values, one of which is a phase increment initial value (first-order initial value) and the other of which is a phase increment initial value (second-order initial value). The two initial values are equivalent to two n-dimensional initial vectors, and each initial vector must be set according to a certain rule to ensure that the phases of the n signals are continuous after being combined. And finally, carrying out phase compensation on each path of signal to ensure that the phases are continuous after the n paths of signals are combined. The calculation amount of the primary and secondary initial phases and the compensation phase of the n-path DDS consumes a large amount of FPGA resources, and is long in time consumption due to large calculation amount, so that the method is not beneficial to rapid frequency hopping.

Disclosure of Invention

The utility model aims to provide a broadband radar signal generation module based on single-path DDS frequency mixing, which is used for eliminating the use of a radar frequency synthesizer and a frequency agile chip, generating a radar signal with large bandwidth and rapid frequency hopping on the basis of single-path DDS frequency mixing and facilitating the miniaturized design of radar equipment.

According to a first aspect of the object of the present utility model, a wideband radar signal generating module is provided, which comprises a single-path direct digital frequency synthesizer, a mixer, a digital controlled oscillator and a digital-to-analog converter;

the single-channel direct digital frequency synthesizer receives the input of a radar baseband signal and generates an amplified bandwidth analog signal with zero intermediate frequency through DA conversion;

the first input end of the mixer is connected with the output end of the single-path direct digital frequency synthesizer, the second input end of the mixer is connected with the numerical control oscillator and is used for mixing the amplified bandwidth analog signal with the intermediate frequency signal generated by the numerical control oscillator and outputting the mixed signal to the digital-to-analog converter;

the digital-to-analog converter carries out high-speed digital-to-analog conversion on the mixed intermediate frequency signals and outputs broadband radar signals.

According to the technical scheme, through the broadband radar signal generation module provided by the utility model, on one hand, the implementation complexity is low, the occupied FPGA resources are small, the radar signals with large bandwidth and rapid frequency hopping can be generated, and on the other hand, the whole radar equipment does not use expensive frequency synthesizer devices and frequency agile chips, so that the cost is reduced, and meanwhile, the miniaturization of the radar equipment is realized.

It should be understood that all combinations of the foregoing concepts, as well as additional concepts described in more detail below, may be considered a part of the inventive subject matter of the present disclosure as long as such concepts are not mutually inconsistent. In addition, all combinations of claimed subject matter are considered part of the disclosed inventive subject matter.

The foregoing and other aspects, embodiments, and features of the present teachings will be more fully understood from the following description, taken together with the accompanying drawings. Other additional aspects of the utility model, such as features and/or advantages of the exemplary embodiments, will be apparent from the description which follows, or may be learned by practice of the embodiments according to the teachings of the utility model.

Drawings

The drawings are not intended to be drawn to scale. In the drawings, each identical or nearly identical component that is illustrated in various figures may be represented by a like numeral. For purposes of clarity, not every component may be labeled in every drawing. Embodiments of various aspects of the utility model will now be described, by way of example, with reference to the accompanying drawings.

Fig. 1 is a schematic block diagram of a radar signal generated by an fpga+agile module in the prior art.

Fig. 2 is a schematic block diagram of a multi-channel parallel DDS generated radar signal in the prior art.

Fig. 3 is a schematic diagram of a wideband radar signal generating module based on single-path DDS mixing according to an embodiment of the present utility model.

Fig. 4 is a schematic diagram of a RF Data Converter IP core (i.e., a self-NCO high-speed DAC) configuration in accordance with an embodiment of the present utility model.

Detailed Description

For a better understanding of the technical content of the present utility model, specific examples are set forth below, along with the accompanying drawings.

Aspects of the utility model are described in this disclosure with reference to the drawings, in which are shown a number of illustrative embodiments. The embodiments of the present disclosure are not necessarily intended to include all aspects of the utility model. It should be understood that the various concepts and embodiments described above, as well as those described in more detail below, may be implemented in any of a number of ways, as the disclosed concepts and embodiments are not limited to any implementation. Additionally, some aspects of the disclosure may be used alone or in any suitable combination with other aspects of the disclosure.

The wideband radar signal generation module in connection with the embodiments shown in fig. 3 and 4 includes a single-pass direct digital frequency synthesizer, a mixer, a digitally controlled oscillator, and a digital-to-analog converter.

Referring to fig. 3, the DDS receives the input of the radar baseband signal and generates an amplified bandwidth analog signal with zero intermediate frequency through DA conversion. The first input end of the mixer is connected with the output end of the single-path direct digital frequency synthesizer, the second input end of the mixer is connected with the numerical control oscillator, and the mixer is used for mixing the amplified bandwidth analog signal with the intermediate frequency signal generated by the numerical control oscillator and outputting the mixed signal to the digital-to-analog converter.

As shown in fig. 3, a digital-to-analog converter (high-speed DAC) performs high-speed digital-to-analog conversion on the mixed intermediate frequency signal, and outputs a wideband radar signal.

The numerical control oscillator is used for generating intermediate frequency signals of minus 10GHz to +10GHz, the width of the frequency modulation range is 20GHz, the frequency switching time is less than 0.1us, and the rapid frequency hopping of radar signals is realized.

The single-path direct digital frequency synthesizer DDS is used for generating analog waveforms through an internal DA converter according to the input radar baseband signals and outputting radar baseband signals with the bandwidth of 500M-1 GHz.

The mixer can adopt a commercial radio frequency microwave mixer to realize the mixing from 500MHz to 10GMHz, and has LO power consumption smaller than-10 dBm.

In embodiments of the present utility model, the single-pass direct digital frequency synthesizer, mixer, digitally controlled oscillator, and digital-to-analog converter may be implemented using separate devices.

In the embodiment of the utility model, a single-path direct digital frequency synthesizer, a mixer, a numerical control oscillator and a digital-to-analog converter are integrated into a whole, and the single-path direct digital frequency synthesizer, the mixer and the numerical control oscillator are realized by adopting an ultra scale+RFSoC series FPGA chip, wherein the FPGA chip comprises two cores, namely a direct digital frequency synthesizer DDS and a high-speed digital-to-analog converter with a numerical control oscillator NCO.

In a specific embodiment, the method is realized by adopting an ultra Scale+RFSoC series FPGA chip of Xilinx company, and comprises two IP cores, wherein one core is DDS, the other core is Zynq ultra-casing+ RF Data Converter, the former core can generate a radar baseband signal with the bandwidth of 1GHz, and the latter core is a high-speed DAC with a numerical control oscillator NCO.

The frequency of the numerical control oscillator NCO can be set to be in the range of-10 to +10GHz, the frequency switching time is less than 0.1us, and the NCO frequency configuration clock is calculated according to 250MHz, so that a rapid frequency hopping radar signal can be realized, the frequency modulation range width is 20GHz, and the frequency modulation range is wide.

As shown in fig. 4 for example, a RF Data Converter IP core configuration may be configured according to the desired radar bandwidth to be generated, such as in the illustrated RF-DAC configuration, which may be customized for RF analog output and mixing configuration.

Therefore, when the broadband radar signal is generated, only a single phase accumulation parameter of one DDS is needed to be calculated, the DDS can generate the radar baseband signal with zero intermediate frequency and large bandwidth, so that the calculated amount is greatly reduced compared with the second method (shown in fig. 2) in the prior art, the calculated amount is not one-half of the calculated amount in the method (3*n), and n is the number of synthesized paths. Because the output of the single-path direct digital frequency synthesizer DDS is mixed with the output signal of the numerically controlled oscillator NCO and then sent to the high-speed DAC, the output frequency of the numerically controlled oscillator NCO can be changed in real time, and the large-range rapid frequency hopping of radar signals can be realized.

While the utility model has been described with reference to preferred embodiments, it is not intended to be limiting. Those skilled in the art will appreciate that various modifications and adaptations can be made without departing from the spirit and scope of the present utility model. Accordingly, the scope of the utility model is defined by the appended claims.

Claims

1. The broadband radar signal generation module is characterized by comprising a single-path direct digital frequency synthesizer, a mixer, a numerical control oscillator and a digital-to-analog converter;

2. The broadband radar signal generating module according to claim 1, wherein the numerically controlled oscillator is configured to generate an intermediate frequency signal of-10 GHz to +10GHz, the frequency modulation range is 20GHz wide, and the frequency switching time is <0.1us, so as to achieve rapid frequency hopping of the radar signal.

3. The wideband radar signal generating module of claim 1, wherein the single-path direct digital frequency synthesizer is configured to generate an analog waveform through an internal DA converter according to an input radar baseband signal, and output the radar baseband signal with a bandwidth of 500M-1 GHz.

4. The wideband radar signal generating module according to claim 1, wherein the single-path direct digital frequency synthesizer, the mixer, the numerically controlled oscillator and the digital-to-analog converter are integrated into a whole, and are implemented by adopting an ultra scale+rfsoc-based FPGA chip, and the wideband radar signal generating module comprises two cores, namely a direct digital frequency synthesizer DDS and a high-speed digital-to-analog converter with a numerically controlled oscillator NCO.

5. The wideband radar signal generating module according to claim 4, wherein the output frequency of the numerically controlled oscillator NCO is changed, and the output frequency is mixed with the zero intermediate frequency amplified bandwidth analog signal output by the direct digital frequency synthesizer DDS, and then the mixed signal is sent to the high-speed digital-to-analog converter analog radar output, so that the wide frequency hopping of the radar signal is realized.