CN219046291U - Packaging substrate for duplexer and duplexer - Google Patents
Packaging substrate for duplexer and duplexer Download PDFInfo
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- CN219046291U CN219046291U CN202123263880.6U CN202123263880U CN219046291U CN 219046291 U CN219046291 U CN 219046291U CN 202123263880 U CN202123263880 U CN 202123263880U CN 219046291 U CN219046291 U CN 219046291U
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Abstract
The present disclosure provides a package substrate for a duplexer. The diplexer includes a first inductor for a transmitting end and a second inductor for a receiving end. The package substrate according to the present disclosure includes: a plurality of metal layers for forming the first inductor and the second inductor; and a plurality of dielectric layers disposed between the plurality of metal layers, wherein the metal layers used to form the first inductor are different from the metal layers used to form the second inductor. According to the embodiments of the present disclosure, by increasing the number of layers in the substrate and disposing the first inductor for the transmitting end and the second inductor for the receiving end in different metal layers by adjusting the thicknesses of the dielectric layer and the metal layer, it is possible to reduce mutual interference between the first inductor for the transmitting end and the second inductor for the receiving end without increasing the size of the package substrate, thereby improving isolation.
Description
Technical Field
The present disclosure relates to the field of semiconductor technology, and in particular, to a package substrate for a duplexer and a duplexer including the package substrate.
Background
With the development of wireless communication applications, data transmission rates are higher and higher, resulting in an increasing demand for utilization of spectrum resources and an increasing complexity of spectrum, so that strict requirements are put on performance of a radio frequency system. In the face of increasingly stringent frequency resources, frequency selection devices such as filters, diplexers and the like in the radio frequency front end are required to have higher and higher isolation from adjacent frequency bands.
Isolation of a radio frequency chip refers to the ratio of power to input power of radio frequency signals leaking to other ports, e.g., there is signal leakage between the transmit (Tx) and receive (Rx) ends of a duplexer. The radio frequency chip is typically connected to the package substrate by flip-chip bonding.
To increase the bandwidth or improve passband matching, metal lines are typically wound in different metal layers of the package substrate to form an impedance matching inductor. However, these impedance matching inductors radiate electromagnetic fields outward in the radio frequency band, so that electromagnetic interference exists between the impedance matching inductors or between the impedance matching inductors and other electrical connection lines. These electromagnetic interferences form signal leakage paths inside the radio frequency package structure, so that power is coupled to other ports through the leakage paths, thereby reducing the electrical suppression degree and isolation performance between radio frequency chips in the radio frequency package structure.
Accordingly, there is still a need in the art for a package substrate for a duplexer that can improve the isolation between Rx and Tx bands without changing the size of the package substrate.
Disclosure of Invention
The following presents a simplified summary of the disclosure in order to provide a basic understanding of some aspects of the disclosure. However, it should be understood that this summary is not an exhaustive overview of the disclosure, nor is it intended to identify key or critical elements of the disclosure, nor is it intended to limit the scope of the disclosure. This summary is provided merely to introduce a selection of concepts in a simplified form that are further described below in the form of a more detailed description.
It is an object of the present disclosure to provide a package substrate and a duplexer including the same that can overcome the above-described drawbacks existing in the related art.
According to one aspect of the present disclosure, there is provided a package substrate for a duplexer including a first inductor for a transmitting end and a second inductor for a receiving end, the package substrate comprising: a plurality of metal layers for forming the first inductor and the second inductor; and a plurality of dielectric layers disposed between the plurality of metal layers, wherein the metal layers used to form the first inductor are different from the metal layers used to form the second inductor.
According to an embodiment of the present disclosure, the package substrate further includes a grounded isolation tape disposed between the first inductor and the second inductor.
According to an embodiment of the present disclosure, the thickness of the metal layer is in the range of 9 μm to 44 μm, and the thickness of the dielectric layer is in the range of 20 μm to 130 μm.
According to an embodiment of the present disclosure, the thickness of the metal layer is 14 μm and the thickness of the dielectric layer is 25 μm.
According to embodiments of the present disclosure, the plurality of dielectric layers are formed of the same or different dielectric materials.
According to an embodiment of the present disclosure, the plurality of metal layers includes a first metal layer, a second metal layer, a third metal layer, a fourth metal layer, and a fifth metal layer disposed from top to bottom in a vertical direction, and the plurality of dielectric layers includes a first dielectric layer disposed between the first metal layer and the second metal layer, a second dielectric layer disposed between the second metal layer and the third metal layer, a third dielectric layer disposed between the third metal layer and the fourth metal layer, and a fourth dielectric layer disposed between the fourth metal layer and the fifth metal layer.
According to an embodiment of the present disclosure, the first inductor is a wire-wound inductor formed in the first and second metal layers, and the second inductor is a wire-wound inductor formed in the third and fourth metal layers.
According to an embodiment of the present disclosure, the second inductor is a wire-wound inductor formed in the first and second metal layers, and the first inductor is a wire-wound inductor formed in the third and fourth metal layers.
According to yet another aspect of the present disclosure, there is provided a duplexer including the package substrate according to the above aspect of the present disclosure.
According to the package substrate and the duplexer including the same, the number of layers in the substrate is increased by adjusting the thicknesses of the dielectric layer and the metal layer, and the first inductor for the transmitting end and the second inductor for the receiving end are arranged in different metal layers, so that the mutual interference between the first inductor for the transmitting end and the second inductor for the receiving end can be reduced without increasing the size of the package substrate, and the isolation degree is improved.
Drawings
The accompanying drawings are included to provide a further understanding of the disclosure, and are incorporated in and constitute a part of this specification. The drawings illustrate embodiments of the present disclosure and, together with the description, serve to explain the principles of the disclosure.
Fig. 1 illustrates an equivalent circuit diagram of an example of a duplexer to which a package substrate according to an embodiment of the present disclosure may be applied.
Fig. 2 illustrates a plan view of a package substrate according to an embodiment of the present disclosure.
Fig. 3 illustrates a perspective view of a package substrate according to an embodiment of the present disclosure.
Fig. 4 illustrates a cross-sectional view of a package substrate according to an embodiment of the present disclosure.
Fig. 5A to 5E respectively show diagrams of layouts of first to fifth metal layers of a package substrate according to an embodiment of the present disclosure.
Fig. 6 shows graphs comparing isolation between Rx and Tx frequency bands of package substrates according to an embodiment of the present disclosure and a comparative example.
Detailed Description
In this specification, it will also be understood that when an element is referred to as being "on," "connected to" or "coupled to" another element, it can be directly on, connected or coupled to the element or intervening third elements may also be present. In contrast, when an element is referred to in the present specification as being "directly on," "directly connected to" or "directly coupled to" another element, there are no intervening elements present therebetween.
The present disclosure now will be described more fully hereinafter with reference to the accompanying drawings, in which embodiments are shown. The present disclosure may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the disclosure to those skilled in the art. Like numbers refer to like elements throughout. Also, in the drawings, the thickness, ratio, and size of the parts are exaggerated for clarity of illustration.
The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting. As used herein, unless the context clearly indicates otherwise, "a," "an," "the," and "at least one" are not meant to limit the amount, but are intended to include both the singular and the plural. For example, unless the context clearly indicates otherwise, the meaning of "an element" is the same as "at least one element". The "at least one" should not be construed as limited to the number "one". "or" means "and/or". The term "and/or" includes any and all combinations of one or more of the associated listed items.
The terms "lower", "upper" and the like are used to describe the positional relationship of the components shown in the drawings. These terms may be relative concepts and are described based on the orientation presented in the figures.
Unless otherwise defined, all terms used herein, including technical and scientific terms, have the same meaning as commonly understood by one of ordinary skill in the art. Terms as defined in commonly used dictionaries should be interpreted as having the same meaning as that of the relevant art context and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein.
The meaning of "comprising" or "including" indicates a property, quantity, step, operation, element, component, or combination thereof, but does not preclude other properties, quantities, steps, operations, elements, components, or combinations thereof.
Embodiments are described herein with reference to cross-sectional illustrations that are idealized embodiments. Thus, variations from the shapes of the illustrations as a result, for example, of manufacturing techniques and/or tolerances, are to be expected. Thus, embodiments described herein should not be construed as limited to the particular shapes of regions as illustrated herein but are to include deviations in shapes that result, for example, from manufacturing. For example, a region shown or described as being flat may typically have rough and/or nonlinear features. Also, the acute angles shown may be rounded. Thus, the regions illustrated in the figures are schematic in nature and their shapes are not intended to illustrate the precise shape of a region and are not intended to limit the scope of the claims.
Hereinafter, exemplary embodiments according to the present disclosure will be described with reference to the accompanying drawings.
Fig. 1 shows an equivalent circuit diagram of an example of a duplexer 100 to which a package substrate according to an embodiment of the present disclosure may be applied.
As shown in fig. 1, the duplexer 100 may include resonators B01 through B14 and inductors L01 through L09, wherein the inductors L01 through L03 are first inductors for a transmitting end (Tx) and the inductors L04 through L06 are second inductors for a receiving end (Rx). Those skilled in the art will recognize that although the transmitting and receiving ends of the duplexer 100 shown in fig. 1 each have four series resonators and three parallel resonators and corresponding matching inductors, the present disclosure is not limited thereto. Other numbers and connection forms of resonators and corresponding matching inductors may be used by those skilled in the art depending on the particular application and design requirements, and all variations are intended to be within the scope of this disclosure.
According to an embodiment of the present disclosure, the first inductors L01 to L03 for Tx and the second inductors L04 to L06 for Rx may have the form of wound inductors formed in a package substrate of the duplexer.
Fig. 2 illustrates a plan view of a package substrate 200 according to an embodiment of the present disclosure. Fig. 3 illustrates a perspective view of a package substrate 200 according to an embodiment of the present disclosure. Fig. 4 illustrates a cross-sectional view of a package substrate 200 according to an embodiment of the present disclosure. Further, fig. 5A to 5E respectively show diagrams of the layout of the first to fifth metal layers M1 to M5 of the package substrate according to the embodiment of the present disclosure. It should be noted that fig. 5A to 5E show the layout of the first to fifth metal layers M1 to M5, respectively, wherein the individual hexagonal patterns represent metal vias provided in the dielectric layers and/or.
As shown in fig. 2 to 4, the package substrate 200 according to the embodiment of the present disclosure may include a first metal layer M1, a second metal layer M2, a third metal layer M3, a fourth metal layer M4, and a fifth metal layer M5 disposed from top to bottom in a vertical direction.
According to an embodiment of the present disclosure, the first to fifth metal layers M1 to M5 may be formed of a conductive metal material, which may include, but is not limited to, copper (Cu).
According to an embodiment of the present disclosure, the thicknesses of the first to fifth metal layers M1 to M5 may be in the range of 9 μm to 44 μm. Preferably, the thicknesses of the first to fifth metal layers M1 to M5 may be 14 μm each. Further, according to an embodiment of the present disclosure, the thicknesses of the first to fifth metal layers M1 to M5 may be the same or different from each other.
In addition, the package substrate 200 may include a first dielectric layer D1 disposed between the first and second metal layers M1 and M2, a second dielectric layer D2 disposed between the second and third metal layers M2 and M3, a third dielectric layer D3 disposed between the third and fourth metal layers M3 and M4, and a fourth dielectric layer D4 disposed between the fourth and fifth metal layers M4 and M5.
According to embodiments of the present disclosure, the first to fourth dielectric layers D1 to D4 may be formed of an insulating dielectric material, which may include, but is not limited to: GEA-705G, GH-200 (D), GHPL-830NSF, GHPL-970LF, 6785GT-K and other materials.
According to an embodiment of the present disclosure, the first to fourth dielectric layers D1 to D4 may be formed of dielectric materials identical to or different from each other.
According to an embodiment of the present disclosure, the thicknesses of the first to fourth dielectric layers D1 to D4 may be in the range of 20 μm to 130 μm. Preferably, the thicknesses of the first to fourth dielectric layers D1 to D4 may be 25 μm each. Further, according to embodiments of the present disclosure, the thicknesses of the first to fourth dielectric layers D1 to D4 may be the same or different from each other.
According to an embodiment of the present disclosure, the thicknesses of the first to fifth metal layers M1 to M5 may be the same as or different from the thicknesses of the first to fourth dielectric layers D1 to D4.
Those skilled in the art will recognize that although embodiments of the present disclosure are described herein with the package substrate 200 including the first to fifth metal layers M1 to M5 and the first to fourth dielectric layers D1 to D4 as an example, the present disclosure is not limited thereto. Those skilled in the art may use other numbers of metal layers and corresponding dielectric layers depending on the application scenario and design requirements, and all such variations are intended to be within the scope of the present disclosure.
Further, according to the embodiment of the present disclosure, the metal layers for forming the first inductors L01 to L03 are different from the metal layers for forming the second inductors L04 to L06, that is, the first inductors L01 to L03 and the second inductors L04 to L06 are formed in different metal layers from each other. This may reduce the mutual inductance coupling between the first inductor and the second inductor, thereby improving the isolation between the Rx and Tx bands.
According to an embodiment of the present disclosure, the first inductors L01 to L03 for Tx may be formed in the first and second metal layers M1 and M2, and the second inductors L04 to L06 for Rx may be formed in the third and fourth metal layers M3 and M4.
For example, as shown in fig. 5A and 5B, the first inductors L01 to L03 for Tx in the form of a wire-wound inductor may be formed by the metal wiring in the first metal layer M1, the metal via between the first metal layer M1 and the second metal layer M2, and the metal wiring in the second metal layer M2.
Further, for example, as shown in fig. 5C and 5D, the second inductors L04 to L06 for Rx in the form of a wire-wound inductor may be formed by the metal wiring in the third metal layer M3, the metal via between the third metal layer M3 and the fourth metal layer M4, and the metal wiring in the fourth metal layer M4.
Further, according to another embodiment of the present disclosure, the second inductors L04 to L06 for Rx may also be formed in the first and second metal layers M1 and M2, and the first inductors L01 to L03 for Tx may also be formed in the third and fourth metal layers M3 and M4.
Further, according to an embodiment of the present disclosure, the package substrate 200 may further include a grounded barrier tape IS. As shown in fig. 2 to 4, the grounded isolation strip IS may be disposed in the first to fourth metal layers M1 to M4 and the first to fourth dielectric layers D1 to D4. Further, according to the embodiment of the present disclosure, the first inductors L01 to L03 and the second inductors L04 to L06 are disposed at opposite sides of the grounded isolation strip IS. In this way, the mutual inductance coupling between the first inductor and the second inductor may be reduced, thereby improving the isolation between the Rx and Tx bands.
According to an embodiment of the present disclosure, as shown in fig. 2 to 4, the grounded barrier IS may extend through the first to fourth metal layers M1 to M4 and the first to fourth dielectric layers D1 to D4 in a vertical direction to be connected to the grounded fifth metal layer M5 by means of a via hole.
Fig. 6 shows graphs comparing isolation between Rx and Tx frequency bands of package substrates according to an embodiment of the present disclosure and a comparative example.
The package substrate according to the comparative example of the related art has three metal layers and two dielectric layers disposed between the three metal layers, wherein the thickness of the metal layers is, for example, 16 μm and the thickness of the dielectric layers is, for example, 60 μm, and thus the total thickness of the package substrate of the comparative example is 168 μm.
Further, the package substrate according to the embodiment of the present disclosure has five metal layers and four dielectric layers disposed between the five metal layers, wherein the thickness of the metal layers is, for example, 14 μm and the thickness of the dielectric layers is, for example, 25 μm, and thus the total thickness of the package substrate according to the embodiment of the present disclosure is 170 μm.
As can be seen, by adjusting the thickness of the metal layer from 16 μm to 14 μm and the thickness of the dielectric layer from 60 μm to 25 μm, the overall thickness of the package substrate was changed from 168 μm to 170 μm, and the size of the package substrate according to the embodiment of the present disclosure was not significantly increased as compared to the size of the package substrate according to the comparative example of the related art.
The thin solid line in fig. 6 represents the isolation between the Rx and Tx bands of the comparative example, and the thick solid line in fig. 6 represents the isolation between the Rx and Tx bands according to the embodiment of the present disclosure. As shown in fig. 6, the isolation between Rx and Tx bands according to the embodiment of the present disclosure is significantly superior to that of the comparative example.
According to yet another aspect of the present disclosure, there is also provided a duplexer including the package substrate according to the above embodiments of the present disclosure.
According to the package substrate and the duplexer including the same, the number of layers in the substrate is increased by adjusting the thicknesses of the dielectric layer and the metal layer, and the first inductor for the transmitting end and the second inductor for the receiving end are arranged in different metal layers, so that the mutual interference between the first inductor for the transmitting end and the second inductor for the receiving end can be reduced without increasing the size of the package substrate, and the isolation degree is improved.
Although the present disclosure has been described with reference to exemplary embodiments thereof, those skilled in the art will appreciate that various modifications and changes can be made without departing from the spirit and scope of the present disclosure as set forth in the appended claims.
Claims (5)
1. A package substrate for a duplexer including a first inductor for a transmitting end and a second inductor for a receiving end, the package substrate comprising:
a plurality of metal layers for forming the first inductor and the second inductor; and
a plurality of dielectric layers disposed between the plurality of metal layers,
wherein the first inductor and the second inductor are wound inductors, the first inductor and the second inductor being formed in different metal layers from each other to reduce mutual inductance coupling between the first inductor and the second inductor;
the plurality of dielectric layers are formed of the same dielectric material;
further comprising a grounded isolation strip disposed between the first inductor and the second inductor;
wherein the plurality of metal layers comprises a first metal layer, a second metal layer, a third metal layer, a fourth metal layer and a fifth metal layer which are arranged from top to bottom along the vertical direction, an
Wherein the plurality of dielectric layers includes a first dielectric layer disposed between the first metal layer and the second metal layer, a second dielectric layer disposed between the second metal layer and the third metal layer, a third dielectric layer disposed between the third metal layer and the fourth metal layer, and a fourth dielectric layer disposed between the fourth metal layer and the fifth metal layer;
the thicknesses of the first metal layer to the fifth metal layer are different from each other, and the thicknesses of the first dielectric layer to the fourth dielectric layer are different from each other;
the thickness of the first metal layer to the fifth metal layer is different from the thickness of the first dielectric layer to the fourth dielectric layer.
2. The package substrate of claim 1, wherein the first inductor is formed in the first and second metal layers, an
Wherein the second inductor is formed in the third metal layer and the fourth metal layer.
3. The package substrate of claim 1, wherein the second inductor is formed in the first and second metal layers, an
Wherein the first inductor is formed in the third metal layer and the fourth metal layer.
4. The package substrate of claim 1, wherein the metal layer has a thickness in a range of 9 μιη to 44 μιη and the dielectric layer has a thickness in a range of 20 μιη to 130 μιη;
wherein the metal layer is any one of the first metal layer, the second metal layer, the third metal layer, the fourth metal layer and the fifth metal layer;
the dielectric layer is any one of the first dielectric layer, the second dielectric layer, the third dielectric layer and the fourth dielectric layer.
5. A diplexer comprising the package substrate according to any one of claims 1 to 4.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202123263880.6U CN219046291U (en) | 2021-12-23 | 2021-12-23 | Packaging substrate for duplexer and duplexer |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202123263880.6U CN219046291U (en) | 2021-12-23 | 2021-12-23 | Packaging substrate for duplexer and duplexer |
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| Publication Number | Publication Date |
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| CN219046291U true CN219046291U (en) | 2023-05-19 |
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| CN202123263880.6U Active CN219046291U (en) | 2021-12-23 | 2021-12-23 | Packaging substrate for duplexer and duplexer |
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