CN218996328U - Display panel and display device - Google Patents

Display panel and display device Download PDF

Info

Publication number
CN218996328U
CN218996328U CN202223177029.6U CN202223177029U CN218996328U CN 218996328 U CN218996328 U CN 218996328U CN 202223177029 U CN202223177029 U CN 202223177029U CN 218996328 U CN218996328 U CN 218996328U
Authority
CN
China
Prior art keywords
sub
micrometers
display
display panel
mark pattern
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN202223177029.6U
Other languages
Chinese (zh)
Inventor
王欣欣
周洋
屈忆
刘松
初志文
何磊
白露
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
BOE Technology Group Co Ltd
Chengdu BOE Optoelectronics Technology Co Ltd
Original Assignee
BOE Technology Group Co Ltd
Chengdu BOE Optoelectronics Technology Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by BOE Technology Group Co Ltd, Chengdu BOE Optoelectronics Technology Co Ltd filed Critical BOE Technology Group Co Ltd
Priority to CN202223177029.6U priority Critical patent/CN218996328U/en
Application granted granted Critical
Publication of CN218996328U publication Critical patent/CN218996328U/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Landscapes

  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)

Abstract

The utility model discloses a display panel and a display device, wherein the display panel comprises a display area and a frame area positioned at the periphery of the display area, the display area comprises a plurality of data lines and a plurality of sub-pixels, and the data lines are electrically connected with the sub-pixels; the frame region includes a crack detection line and a plurality of detection control units, the crack detection line is electrically connected with at least one data line of the plurality of data lines through the plurality of detection control units, the crack detection line includes at least one mark pattern configured as an alignment mark for use in a process.

Description

Display panel and display device
Technical Field
The present utility model relates to the field of display technologies, and more particularly, to a display panel and a display device.
Background
With the development of display technology, the variety of display products is increasing, such as a liquid crystal display (LCD, liquidCrystalDisplay), an Organic Light-emitting diode (OLED) display, a plasma display panel (PDP, plasmaDisplayPanel), a field emission display (FED, fieldEmissionDisplay), and the like.
Disclosure of Invention
The following is a summary of the subject matter of the detailed description of the present disclosure. This summary is not intended to limit the scope of the claims.
In a first aspect, an embodiment of the present disclosure provides a display panel, including a display area and a frame area located at a periphery of the display area, where the display area includes a plurality of data lines and a plurality of sub-pixels, and the plurality of data lines are electrically connected to the plurality of sub-pixels; the frame region includes a crack detection line and a plurality of detection control units, the crack detection line is electrically connected with at least one data line of the plurality of data lines through the plurality of detection control units, the crack detection line includes at least one mark pattern configured as an alignment mark for use in a process.
In some examples, the crack detection line includes a plurality of wire segments including a second wire segment and a first wire segment spaced apart along a direction away from the display area, the first wire segment including the at least one marker pattern.
In some examples, the frame region includes a first frame region surrounding the display region and a second frame region located on a side of the first frame region away from the display region, the first frame region includes a first sub-frame region located between the display region and the second frame region and a second sub-frame region located on the other side of the display region, the crack detection line is located in the first sub-frame region and the second sub-frame region, the mark pattern includes a first sub-mark pattern and a second sub-mark pattern, the first sub-mark pattern is located in the second sub-frame region, and the second sub-mark pattern is located in the first sub-frame region.
In some examples, the first winding section of the crack detection line of the second sub-frame region includes a first sub-winding section extending along a second direction, the first sub-winding section being provided with a first sub-marking pattern in a curved manner, the first sub-marking pattern extending along a first direction away from the display region, the first direction intersecting the second direction.
In some examples, the first sub-marking pattern is provided as a trapezoidal protrusion including two waist edges and a bottom edge extending along the second direction, the two waist edges being connected to both ends of the bottom edge, respectively.
In some examples, the bottom edge has a length of 200 microns to 300 microns and the bottom edge is spaced from the second wire segment by a distance of 10 microns to 30 microns.
In some examples, the plurality of first sub-mark patterns are arranged at intervals along the second direction to form a first sub-mark pattern group, and the first sub-mark patterns in the first sub-mark pattern group are sequentially connected.
In some examples, a distance between a bottom edge of a first sub-mark pattern of the first sub-mark pattern group located on one side in the second direction to a bottom edge of a first sub-mark pattern of the first sub-mark pattern group located on the other side in the second direction is 200 micrometers to 300 micrometers.
In some examples, the waist edge forms an angle of 30 degrees to 60 degrees with a direction perpendicular to the bottom edge.
In some examples, the crack detection line of the first sub-frame region includes a third sub-winding segment extending along a first direction, the third sub-winding segment including a second sub-marking pattern disposed along a second direction away from the display region, the first direction intersecting the second direction.
In some examples, the second sub-marking pattern is provided as a boss-like protrusion having a length of 70 micrometers to 90 micrometers in the first direction and a length of 60 micrometers to 80 micrometers in the second direction; or, the second sub-mark pattern is configured as a step-shaped protrusion, the length of the step-shaped protrusion in the first direction is 60 micrometers to 80 micrometers, and the length of the step-shaped protrusion in the second direction is 60 micrometers to 80 micrometers; alternatively, the second sub-mark patterns are provided as triangular protrusions, the length of the triangular protrusions in the first direction is 60 micrometers to 90 micrometers, and the length of the triangular protrusions in the second direction is 60 micrometers to 80 micrometers; or the second sub-mark patterns are arranged into diamond-shaped bulges, the lengths of the diamond-shaped bulges in the first direction are 60 micrometers to 80 micrometers, and the lengths of the diamond-shaped bulges in the second direction are 60 micrometers to 80 micrometers; alternatively, the length of the diamond-shaped protrusions in the first direction is 30 micrometers to 60 micrometers, and the length of the diamond-shaped protrusions in the second direction is 60 micrometers to 80 micrometers; alternatively, the second sub-mark patterns are arranged as hexagonal protrusions, the lengths of the hexagonal protrusions in the first direction are 120 micrometers to 130 micrometers, and the lengths of the hexagonal protrusions in the second direction are 40 micrometers to 60 micrometers; alternatively, the second sub-mark pattern includes a first portion and a second portion connected to each other, the first portion is located at a side of the second portion near the display area, the first portion and the second portion are each configured as a triangle, and a corner of the first portion is connected to a corner of the second portion.
In some examples, the bezel region includes a plurality of crack detection lines that are disposed axisymmetrically about a center line of the display region, and the marker pattern is disposed axisymmetrically about the center line of the display region.
In some examples, the marker pattern is located on a different film layer than the crack detection line, the marker pattern being connected to the crack detection line by a via.
In some examples, the frame region further includes a gate driving circuit, a power signal line, and an isolation dam, the gate driving circuit, the power signal line, and the isolation dam are sequentially arranged at intervals along a direction away from the display region, and the crack detection line is located between the power signal line and the isolation dam.
In a second aspect, embodiments of the present disclosure provide a display device including any one of the display panels described above.
Other aspects will become apparent upon reading and understanding the accompanying drawings and detailed description.
Drawings
The accompanying drawings are included to provide an understanding of the technical aspects of the present application, and are incorporated in and constitute a part of this specification, illustrate the technical aspects of the present application and together with the examples of the present application, and not constitute a limitation of the technical aspects of the present application.
FIG. 1 is a schematic diagram of a display panel according to an embodiment of the disclosure;
FIG. 2 is a cross-sectional view of a display panel according to an embodiment of the present disclosure;
FIG. 3 is a schematic diagram illustrating a first layout of a display panel according to an embodiment of the disclosure;
FIG. 4a is a schematic diagram of a first sub-mark pattern in a display panel according to an embodiment of the disclosure;
FIG. 4b is a schematic diagram II of a first sub-mark pattern in a display panel according to an embodiment of the disclosure;
FIG. 4c is a third schematic diagram of a first sub-mark pattern in a display panel according to an embodiment of the disclosure;
FIG. 5a is a schematic diagram of a second sub-mark pattern in a display panel according to an embodiment of the disclosure;
FIG. 5b is a second schematic diagram of a second sub-mark pattern in the display panel according to the embodiment of the disclosure;
FIG. 5c is a third schematic diagram of a second sub-mark pattern in a display panel according to an embodiment of the present disclosure;
FIG. 5d is a schematic diagram of a second sub-mark pattern in a display panel according to an embodiment of the disclosure;
FIG. 5e is a fifth schematic diagram of a second sub-mark pattern in a display panel according to an embodiment of the disclosure;
FIG. 5f is a schematic diagram of a second sub-mark pattern in a display panel according to an embodiment of the disclosure;
fig. 6 is a second schematic diagram of a trace of the display panel according to the embodiment of the disclosure;
fig. 7 is a schematic diagram of a wiring of a related art display panel.
Detailed Description
Embodiments of the present disclosure will be described in detail below with reference to the accompanying drawings. Embodiments may be implemented in a number of different forms. One of ordinary skill in the art will readily recognize the fact that the manner and content may be changed into other forms without departing from the spirit and scope of the present disclosure. Accordingly, the present disclosure should not be construed as being limited to the following description of the embodiments. Embodiments of the present disclosure and features of embodiments may be combined with each other arbitrarily without conflict.
In the drawings, the size of one or more constituent elements, thicknesses of layers or regions may be exaggerated for clarity. Accordingly, one aspect of the present disclosure is not necessarily limited to this dimension, and the shape and size of one or more components in the drawings do not reflect true proportions. Further, the drawings schematically show ideal examples, and one mode of the present disclosure is not limited to the shapes or numerical values shown in the drawings, and the like.
The ordinal numbers of "first", "second", "third", etc. in the present specification are provided to avoid mixing of constituent elements, and are not intended to be limited in number. The term "plurality" in this disclosure means two or more in number.
In the present specification, for convenience, words such as "middle", "upper", "lower", "front", "rear", "vertical", "horizontal", "top", "bottom", "inner", "outer", and the like, which indicate an azimuth or a positional relationship, are used to describe positional relationships of constituent elements with reference to the drawings, only for convenience of description and simplification of the description, and do not indicate or imply that the apparatus or elements referred to must have a specific azimuth, be configured and operated in a specific azimuth, and thus are not to be construed as limiting the present disclosure. The positional relationship of the constituent elements is appropriately changed according to the direction of the described constituent elements. Therefore, the present invention is not limited to the words described in the specification, and may be appropriately replaced according to circumstances.
In this specification, the terms "mounted," "connected," and "connected" are to be construed broadly, unless explicitly stated or limited otherwise. For example, it may be a fixed connection, a removable connection, or an integral connection; may be a mechanical connection, or a connection; may be directly connected, or indirectly connected through intermediate members, or may be in communication with the interior of two elements. The meaning of the above terms in the present disclosure can be understood by one of ordinary skill in the art as appropriate.
In this specification, "electrically connected" includes a case where constituent elements are connected together by an element having some electric action. The "element having a certain electric action" is not particularly limited as long as it can transmit an electric signal between the connected constituent elements. Examples of the "element having some electric action" include not only an electrode and a wiring but also a switching element such as a transistor, a resistor, an inductor, a capacitor, other elements having various functions, and the like.
In this specification, a transistor means an element including at least three terminals of a gate, a drain, and a source. The transistor has a channel region between a drain (drain electrode terminal, drain region, or drain electrode) and a source (source electrode terminal, source region, or source electrode), and a current can flow through the drain, the channel region, and the source. In this specification, a channel region refers to a region through which current mainly flows.
In this specification, in order to distinguish between two electrodes of a transistor other than a gate electrode, one electrode is referred to as a first electrode, the other electrode is referred to as a second electrode, the first electrode may be a source electrode or a drain electrode, the second electrode may be a drain electrode or a source electrode, and the gate electrode of the transistor is referred to as a control electrode. In the case of using transistors having opposite polarities, or in the case of a change in current direction during circuit operation, the functions of the "source" and the "drain" may be exchanged with each other. Thus, in this specification, "source" and "drain" may be interchanged.
In the present specification, "parallel" means a state in which two straight lines form an angle of-10 ° or more and 10 ° or less, and therefore, a state in which the angle is-5 ° or more and 5 ° or less is also included. The term "perpendicular" refers to a state in which the angle formed by two straight lines is 80 ° or more and 100 ° or less, and thus includes a state in which the angle is 85 ° or more and 95 ° or less.
In the present specification, triangle, rectangle, trapezoid, pentagon, hexagon, or the like is not strictly defined, and may be approximated to triangle, rectangle, trapezoid, pentagon, hexagon, or the like, and there may be some small deformation due to tolerance, and there may be lead angles, arc edges, deformation, or the like.
The terms "about" and "approximately" as used herein refer to a situation where the limits are not strictly defined and where process and measurement errors are permitted. In the present specification, "substantially the same" means a case where the values differ by 10%.
In some implementations, in the process of manufacturing the display panel, each process stage has a detection function of its own process, so as to prevent the defective products in the process stage from missing and flowing into the next process stage, which results in waste of material and material costs. Therefore, in the manufacturing process of the display panel, it is required to perform effective and rapid detection on each process stage as much as possible, so as to effectively control the production cost and improve the yield of the display panel.
Fig. 7 is a schematic diagram of a wiring of a related art display panel. As shown in fig. 7, the related art display panel may include: the display area 10 and a frame area located at the periphery of the display area 10. The bezel area may include: a first frame area 21 surrounding the display area 10 and a second frame area 22 located at one side of the display area 10. The first frame region 21 may include a crack detection line 31 and a marking pattern 60', the marking pattern 60' being located on a side of the crack detection line 31 away from the display region 10 and being spaced apart from the crack detection line 31 in a direction away from the display region 10. Since the crack detection line 31 and the marking pattern 60' each occupy a part of the space of the frame region, the requirement of a narrow frame cannot be satisfied.
The embodiment provides a display panel, which comprises a display area and a frame area positioned at the periphery of the display area, wherein the display area comprises a plurality of data lines and a plurality of sub-pixels, and the data lines are electrically connected with the sub-pixels; the frame region includes a crack detection line and a plurality of detection control units, the crack detection line is electrically connected with at least one data line of the plurality of data lines through the plurality of detection control units, the crack detection line includes at least one mark pattern configured as an alignment mark for use in a process.
The crack detection line of the display panel provided by the embodiment can receive the detection signal, and the crack detection is carried out on the crack detection line by utilizing the detection signal so as to detect the crack in the frame area and determine whether the display panel is qualified, so that the quick and effective crack detection can be realized, the quality of the display panel can be improved, and the production cost can be reduced.
According to the display panel disclosed by the embodiment of the disclosure, the mark patterns are arranged on the crack detection line, and the identification effect is realized through the mark patterns, so that the space of a frame area is saved, for example, the space of 50-100 um can be saved, and the effect of a narrow frame is realized.
The scheme of the present embodiment is illustrated by some examples below.
Fig. 1 is a schematic diagram of a display panel according to an embodiment of the disclosure. In some examples, as shown in fig. 1, the display panel may include: the display area 10 and a frame area located at the periphery of the display area 10. The bezel area may include: a first frame region 21 surrounding the display region 10, and a second frame region 22 located on a side of the first frame region 21 away from the display region 10. The second bezel area 22 may be located at a side of the first bezel area 21 remote from the display area 10. In the second direction D2, a partial region of the first bezel region 21 may be located between the display region 10 and the second bezel region 22.
In some examples, the display area 10 may be a flat area including a plurality of subpixels Px constituting a pixel array, the plurality of subpixels Px may be configured to display a moving picture or a still image, and the display area 10 may be referred to as an effective area (AA). In some examples, the display substrate may be a flexible substrate, and thus the display substrate may be deformable, e.g., curled, bent, folded, or rolled.
In some examples, as shown in fig. 1, the display area 10 may be rectangular. However, the present embodiment is not limited thereto. For example, the display area 10 may have a circular shape, or an elliptical shape, or other shapes.
In some exemplary embodiments, the second bezel region 22 may include a bent region, a driving chip region, and a bonding pin region sequentially disposed in a direction away from the display region 10. The fan-out area is connected to the first frame area 21, and includes at least data fan-out lines configured to connect the data signal lines of the display area 10 in a fan-out wiring manner. The inflection region is connected to the fan-out region and may include a composite insulating layer provided with grooves configured to bend the driving chip region and the bonding pad region to the rear surface of the display region 10. The driver chip area may be provided with a corresponding integrated circuit (IC, integratedCircuit), for example, a display driver integrated circuit (DDI, displayDriverIntegration) or a touch and display driver integrated circuit (TDDI, touchandDisplayDriverIntegration). The integrated circuit may be configured to connect with a plurality of data fan-out lines. The bonding pin region may include a plurality of bonding pins, which may be configured for bonding connection with an external flexible Circuit board (FPC, flexiblePrinted Circuit), such that a plurality of signal leads (e.g., drive control lines, power signal lines, etc.) are connected with an external control device through the plurality of bonding pins.
In some examples, the display area 10 may include: the display structure comprises a substrate, a display structure layer and a packaging structure layer, wherein the display structure layer and the packaging structure layer are arranged on the substrate. The display structure layer may include a plurality of display cells (i.e., sub-pixels), a plurality of gate lines, and a plurality of data lines. The plurality of data lines may extend in the first direction D1, and the plurality of gate lines may extend in the second direction D2. Orthographic projections of the plurality of gate lines and the plurality of data lines on the substrate may cross to form a plurality of sub-pixel regions. One subpixel is disposed in one subpixel region. The plurality of data lines are electrically connected to the plurality of sub-pixels, and the plurality of data lines are configured to supply data signals to the plurality of sub-pixels. The plurality of gate lines are electrically connected to the plurality of sub-pixels, and the plurality of gate lines are configured to supply gate driving signals to the plurality of sub-pixels. Wherein the first direction D1 intersects the second direction D2, for example, the first direction D1 may be perpendicular to the second direction D2.
In some examples, three sub-pixels of the display area may form one pixel unit, and the three sub-pixels are red, green, and blue sub-pixels, respectively. The three sub-pixels can be arranged in a horizontal parallel, vertical parallel or delta mode. However, the present embodiment is not limited thereto. In other examples, four sub-pixels may form one pixel unit, the four sub-pixels being red, green, blue, and white sub-pixels, respectively. The four sub-pixels may be arranged in a horizontal parallel, vertical parallel or square manner.
In some examples, at least one subpixel may include a pixel circuit and a light emitting element. The pixel circuit may be configured to drive the connected light emitting element. For example, the pixel circuit may include a plurality of transistors and at least one capacitor. For example, the pixel circuit may be a 3T1C, 4T1C, 5T2C, 6T1C, 7T1C, or 8T1C structure. Wherein, T in the circuit structure refers to a thin film transistor, C refers to a capacitor, the number in front of T represents the number of the thin film transistors in the circuit, and the number in front of C represents the number of the capacitors in the circuit. In some examples, the plurality of transistors in the pixel circuit may be P-type transistors or may be N-type transistors. The same type of transistor is adopted in the pixel circuit, so that the process flow can be simplified, the process difficulty of the display panel is reduced, and the yield of products is improved. In other examples, the plurality of transistors in the pixel circuit may include a P-type transistor and an N-type transistor.
In some examples, the plurality of transistors in the pixel circuit may employ low temperature polysilicon thin film transistors, or may employ oxide thin film transistors, or may employ low temperature polysilicon thin film transistors and oxide thin film transistors. The active layer of the low-temperature polysilicon thin film transistor adopts low-temperature polysilicon (LTPS, lowTemperaturePoly-Silicon), and the active layer of the Oxide thin film transistor adopts an Oxide semiconductor (Oxide). The low-temperature polysilicon thin film transistor has the advantages of high mobility, quick charge and the like, the Oxide thin film transistor has the advantages of low leakage current and the like, and the low-temperature polysilicon thin film transistor and the Oxide thin film transistor are integrated on one display panel, namely, an LTPS+oxide (LTPO) display panel, so that the advantages of the low-temperature polysilicon thin film transistor and the Oxide thin film transistor can be utilized, low-frequency driving can be realized, power consumption can be reduced, and display quality can be improved.
In some examples, the light emitting element may be any of a light emitting diode (LED, lightEmittingDiode), an organic light emitting diode (OLED, organicLightEmittingDiode), a quantum dot light emitting diode (QLED, quantumDotLightEmittingDiodes), a micro LED (including a mini-LED or micro-LED), or the like. For example, the light emitting element may be an OLED, and the light emitting element may emit red light, green light, blue light, white light, or the like under the driving of its corresponding pixel circuit. The color of the light emitted by the light emitting element can be determined according to the need. In some examples, the light emitting element may include: an anode, a cathode, and an organic light emitting layer between the anode and the cathode. The anode of the light emitting element may be electrically connected to a corresponding pixel circuit. However, the present embodiment is not limited thereto.
In some examples, the display panel may also integrate a touch structure. The display area of the display panel may further include: and the touch control structure layer is positioned on one side of the packaging structure layer away from the substrate. The touch structure layer can be arranged on the packaging structure layer of the display panel to form a structure of a touch structure on a film package (TouchonThin FilmEncapsulation, touchonTFE for short), and the display structure and the touch structure are integrated together, so that the touch structure has the advantages of light weight, foldability and the like, and can meet the product requirements of flexible folding, narrow frames and the like. The touch tfe structure mainly includes a flexible multilayer-covered surface (FMLOC) structure and a flexible single-layer-covered surface (FSLOC) structure. The FMLOC structure is based on the working principle of mutual capacitance detection, generally adopts two layers of metal to form a driving (Tx) electrode and an induction (Rx) electrode, and an Integrated Circuit (IC) realizes touch control action by detecting the mutual capacitance between the driving electrode and the induction electrode. The FSLOC structure is based on the working principle of self-capacitance (or voltage) detection, a single-layer metal is generally adopted to form a touch electrode, and an integrated circuit realizes touch action by detecting the self-capacitance (or voltage) of the touch electrode.
In some examples, the touch structure layer may include a plurality of touch units. The at least one touch unit may include at least one touch electrode. The orthographic projection of the at least one touch electrode on the substrate may comprise orthographic projections of a plurality of sub-pixels on the substrate. When the touch unit includes a plurality of touch electrodes, the plurality of touch electrodes may be disposed at intervals, and adjacent touch electrodes may be connected to each other through a connection portion. The touch electrode and the connecting part may be of the same layer structure. In some examples, the touch electrode may have a rhombus shape, for example, may be a regular rhombus, or a rhombus that is horizontally long, or a rhombus that is vertically long. However, the present embodiment is not limited thereto. In some examples, the touch electrode may have any one or more of a triangle, square, trapezoid, parallelogram, pentagon, hexagon, and other polygon.
In some examples, the touch electrode in the display panel may be in a metal mesh form, the metal mesh is formed by interweaving a plurality of metal wires, the metal mesh comprises a plurality of mesh patterns, the mesh patterns are polygons surrounded by the plurality of metal wires, and the touch electrode in the metal mesh form has the advantages of small resistance, small thickness, high reaction speed and the like. However, the present embodiment is not limited thereto.
Fig. 2 is a cross-sectional view of a display panel according to an embodiment of the present disclosure. Wherein, fig. 2 may be a schematic partial cross-sectional view along the direction R-R' in fig. 1. In some examples, as shown in fig. 1 and 2, the display area 10 may include, in a direction perpendicular to the display panel: a substrate 41, a driving circuit layer 42, a light emitting element 43, a package structure layer 44, and a touch structure layer 45 sequentially provided on the substrate 41. In fig. 2, only the structure of one sub-pixel is illustrated as an example.
In some examples, the substrate 41 may be a flexible base. The flexible substrate may include a first flexible material layer, a first inorganic material layer, a semiconductor layer, a second flexible material layer, and a second inorganic material layer stacked. The materials of the first flexible material layer and the second flexible material layer can be Polyimide (PI), polyethylene terephthalate (PET) or polymer soft films subjected to surface treatment, the materials of the first inorganic material layer and the second inorganic material layer can be silicon nitride (SiNx) or silicon oxide (SiOx) and the like, the materials are used for improving the water-oxygen resistance of the substrate, and the materials of the semiconductor layers can be amorphous silicon (a-si). However, the present embodiment is not limited thereto.
In some examples, as shown in fig. 2, the driving circuit layer 42 may include a plurality of transistors and at least one storage capacitor forming a pixel circuit. In fig. 2, a first transistor 401 and a first storage capacitor 402 are illustrated as examples. The driving circuit layer 42 of the display region 10 may include: a semiconductor layer provided over the substrate 41, a first insulating layer 51 covering the semiconductor layer, a first gate metal layer provided over the first insulating layer 51, a second insulating layer 52 covering the first gate metal layer, a second gate metal layer provided over the second insulating layer 52, a third insulating layer 53 covering the second gate metal layer, and a first source drain metal layer provided over the third insulating layer 53. The semiconductor layer may include at least a first active layer, the first gate metal layer may include at least a first gate electrode and a first capacitor electrode, the second gate metal layer may include at least a second capacitor electrode, and the first source drain metal layer may include at least a first source electrode and a first drain electrode. The first active layer, the first gate electrode, the first source electrode, and the first drain electrode may constitute a first transistor 401, and the first capacitor electrode and the second capacitor electrode may constitute a first storage capacitor 402. In other examples, the driving circuit layer may further include a sixth insulating layer and a second source drain metal layer on a side of the first source drain metal layer remote from the substrate. However, the present embodiment is not limited thereto.
In some examples, as shown in fig. 2, the light emitting element 43 may include a first electrode 431, a pixel defining layer 434, an organic light emitting layer 432, and a second electrode 433. The first electrode 431 is disposed on the fifth insulating layer 55, and is connected to the first drain electrode of the first transistor 401 through a via hole formed in the fourth insulating layer 54 and the fifth insulating layer 55. The pixel defining layer 434 may be disposed on the first electrode 431 and the fifth insulating layer 55, and a pixel opening may be disposed on the pixel defining layer 434, and the pixel opening may expose a portion of the surface of the first electrode 431. The organic light emitting layer 432 is at least partially disposed within the pixel opening, and the organic light emitting layer 432 is connected to the first electrode 431. The second electrode 433 is disposed on the organic light emitting layer 432, and the second electrode 433 is connected to the organic light emitting layer 432.
In some examples, as shown in fig. 2, the organic light emitting Layer 432 of the light emitting element 43 may include a light emitting Layer (EML, emittingLayer), and one or more film layers including a hole injection Layer (HIL, holeInjectionLayer), a hole transport Layer (HTL, holeTransportLayer), a hole blocking Layer (HBL, holeBlockLayer), an electron blocking Layer (EBL, electronBlockLayer), an electron injection Layer (EIL, electronInjection layers), and an electron transport Layer (ETL, electronTransportLayer). The voltage driving of the first electrode 431 and the second electrode 433 causes light emission of a desired gradation using the light emission characteristics of the organic material. In some examples, the light emitting layers of the different color light emitting elements are different. For example, the red light emitting element includes a red light emitting layer, the green light emitting element includes a green light emitting layer, and the blue light emitting element includes a blue light emitting layer. In order to reduce the process difficulty and improve the yield, a common layer may be used for the hole injection layer and the hole transport layer on one side of the light emitting layer, and a common layer may be used for the electron injection layer and the electron transport layer on the other side of the light emitting layer. In some examples, any one or more of the hole injection layer, the hole transport layer, the electron injection layer, and the electron transport layer may be fabricated by one process (one evaporation process or one inkjet printing process), and isolation may be achieved by a surface level difference of the formed film layer or by surface treatment or the like. For example, any one or more of the hole injection layer, the hole transport layer, the electron injection layer, and the electron transport layer corresponding to adjacent sub-pixels may be isolated. In some examples, the organic light emitting layer may be formed by evaporation using a fine metal reticle (FMM, fineMetalMask) or an open mask (OpenMask), or by an inkjet process.
In some examples, as shown in fig. 2, the encapsulation structure layer 44 may include a first encapsulation layer, a second encapsulation layer, and a third encapsulation layer stacked. Wherein, the first packaging layer and the third packaging layer can be made of inorganic materials, the second packaging layer can be made of organic materials, and the second packaging layer is arranged between the first packaging layer and the third packaging layer, so that external water vapor can not enter the light-emitting element 43. However, the present embodiment is not limited thereto. For example, the encapsulation layer may be an inorganic/organic/inorganic five-layer stacked structure.
In some examples, as shown in fig. 2, the touch structure layer 45 may include: the first touch insulating layer 451 disposed on the side of the package structure layer 44 away from the substrate 41, the touch electrode layer 452 disposed on the side of the first touch insulating layer 451 away from the substrate 41, and the touch protection layer 455 disposed on the side of the touch electrode layer 452 away from the substrate 41. The touch structure layer of this example is illustrated by taking the FSLOC structure as an example. However, the present embodiment is not limited thereto.
Fig. 3 is a schematic diagram illustrating a layout of a display panel according to an embodiment of the disclosure. In fig. 3, a plurality of data lines in the display area and a plurality of crack detection lines in the frame area are illustrated as examples, and other wirings are omitted.
In some examples, as shown in fig. 3, the display area 10 may include: a plurality of data lines 11. Each of the data lines 11 may extend in the second direction D2, and the plurality of data lines 11 may be arranged at intervals in the first direction D1. Each of the data lines 11 may be electrically connected to a plurality of display cells Px arranged along the second direction D2, and configured to supply data signals to the plurality of display cells Px. For example, the data line 11 may be configured to be electrically connected to a display unit emitting the same color light, such as the data line 11 may be configured to be electrically connected to a plurality of display units emitting green light. However, the present embodiment is not limited thereto. Wherein the first direction D1 intersects the second direction D2, for example, the first direction D1 may be perpendicular to the second direction D2.
In some examples, as shown in fig. 3, the bezel area may include: a plurality of detection control units 35 and detection control lines 34. The plurality of detection control units may be located in the first frame region 21, for example, the plurality of detection control units may be arranged at intervals along the first direction D1, and the plurality of detection control units are located between the display region 10 and the second frame region 22. The detection control line 34 may be located between the first frame region 21 and the display region 10 and the second frame region 22, and the detection control line 34 is electrically connected to the detection control unit 35. However, the present embodiment is not limited thereto. In other examples, the plurality of detection control units may be located in the second bezel area.
In some examples, as shown in fig. 3, one crack detection line 31 may be electrically connected to one detection control unit 35, and one detection control unit 35 may be electrically connected to at least one data line 11. One crack detection line 31 may be electrically connected to at least one data line 11 through one detection control unit 35.
In some examples, as shown in fig. 3, the crack detection line 31 may be a serpentine trace. The serpentine trace is a bending curve. For example, after one end of the trace extends a certain distance along one direction, the trace is bent and detoured and extends a certain distance along the direction opposite to the direction, and is bent and detoured again and extends along the direction, and the loop is repeatedly bent and detoured for a plurality of times to form the snake-shaped trace. In this example, the crack detection line 31 may be wound in a direction in which the first frame region 21 is away from the display region 10.
In some examples, as shown in fig. 3, the second bezel area 22 may include a first signal pin 51 and a second signal pin 52. A first end of the crack detection line 31 may be electrically connected with the detection control unit 35, and a second end of the crack detection line 31 may be connected with the first signal pin 51 on the second frame region 22. The first signal pin 51 may serve as a test pin. For example, the crack detection line may be crack detected by providing a test signal via the first signal pin 51.
In some examples, as shown in fig. 3, the detection control unit 35 may include: and detecting the transistor. The gate of the detection transistor may be electrically connected to the detection control line 34, the first pole of the detection transistor may be electrically connected to the first end of the crack detection line, and the second pole of the detection transistor may be electrically connected to the data line 11 of the display area 10. One end of the detection control line 34 may be electrically connected to the second signal pin 52 of the second bezel area 22, and in this example, the detection control line 34 may provide a detection control signal configured to turn on or off a plurality of detection control units through the second signal pin 52.
During crack detection, the detection control signal provided by the detection control line 34 may cause the detection transistor to be turned on, thereby causing the detection control unit 35 to be turned on. The crack detection line 31 may receive a test signal through the first signal pin 51, the test signal is transmitted to the display unit of the display area 10 through the data line 11 of the display area 10, the test signal drives the display unit to display, and whether the crack detection line 31 connected thereto is broken is judged by whether the display unit displays.
In some examples, as shown in fig. 3, the crack detection line 31 may include a plurality of winding segments spaced apart in a direction away from the display area 10, and a winding segment 311 located at a side away from the display area 10 among the plurality of winding segments includes a marking pattern 60, the marking pattern 60 extending in the direction away from the display area 10. Wherein, at least one marking pattern 60 is configured as a alignment mark used in the process, and the marking pattern 60 can be used for detecting and identifying the alignment of each process segment (such as cutting, fitting, bending of the second frame area, etc.).
In some examples, as shown in fig. 3, the crack detection line 31 may include a second wire segment 312, a first wire segment 311, and a connection segment 313 connecting ends of the second wire segment 312 and the first wire segment 311, which are arranged at intervals in a direction away from the display area 100. The shape of the connection section 313 may be arc-shaped. The first winding segment 311 is located on a side of the second winding segment 312 away from the display area 100, and the first winding segment 311 includes at least one marking pattern 60.
The marking pattern 60 is clearly distinguishable in shape from other traces in the border region for ease of identification. For example, the marking pattern 60 may be provided in a triangle, rectangle, trapezoid, diamond, polygon, or a shape formed by a combination of polygons.
According to the display panel disclosed by the embodiment of the disclosure, the mark patterns are arranged on the crack detection line, and the identification effect is realized through the mark patterns, so that the space of a frame area is saved, for example, the space of 50-100 um can be saved, and the effect of a narrow frame is realized.
In some examples, as shown in fig. 3, the first bezel area 21 may include a first sub-bezel area 211 located between the display area 10 and the second bezel area 22, and a second sub-bezel area 212 located on the other side of the display area 10. For example, the display area 10 is rectangular, the first frame area 21 may be rectangular and annular, and the first frame area 21 includes one first sub-frame area 211 and three second sub-frame areas 212, where the first sub-frame area 211 is located between the display area 10 and the second frame area 22, and the three second sub-frame areas 212 are located on other sides of the display area 10. The first sub-frame region 211 and the three second sub-frame regions 212 enclose a rectangular annular first frame region 21.
In some examples, as shown in fig. 3, the crack detection line 31 may be located at the first sub-frame region 211 and the second sub-frame region 212. The marking pattern 60 includes a first sub-marking pattern 61 and a second sub-marking pattern 62, the first sub-marking pattern 61 being located in the second sub-frame area 212, and the second sub-marking pattern 62 being located in the first sub-frame area 211. The first sub-mark pattern 61 is used for detecting the precision after the display panel is cut, and the second sub-mark pattern 62 is used for detecting the precision after the display panel is cut and aligning the binding process of the second frame area 22.
Fig. 4a is a schematic diagram of a first sub-mark pattern in a display panel according to an embodiment of the disclosure. In some examples, as shown in fig. 4a, the first wire segment 311 of the crack detection wire 31 of the second sub-frame region 212 may include a first sub-wire segment 3111 extending along the second direction D2, the second wire segment 312 of the crack detection wire 31 of the second sub-frame region 212 may include a second sub-wire segment 3112 extending along the second direction D2, the first sub-wire segment 3111 and the second sub-wire segment 3112 are spaced apart along the first direction D1, and the first sub-wire segment 3111 is located on a side of the second sub-wire segment 3112 remote from the display region 10. The first sub-winding segment 3111 includes at least one first sub-mark pattern 61, the first sub-mark pattern 61 extending along a first direction D1 away from the display area 10, the first sub-mark pattern 61 being provided as a trapezoidal protrusion. The trapezoidal protrusion includes two waist edges 612 and a bottom edge 611 extending along the second direction D2, the two waist edges 612 respectively connect two ends of the bottom edge 611 with the first sub-winding segment 3111, and the two waist edges 612 respectively form an obtuse angle with the bottom edge 611.
In some embodiments, the first sub-marking pattern may also take the form of protrusions of other shapes, such as triangles, diamonds, rectangles, hexagons, and steps.
In some examples, as shown in fig. 4a, the length a of the bottom edge 611 in the second direction D2 is 200 micrometers to 300 micrometers, for example, the length a of the bottom edge 611 in the second direction D2 is 220 micrometers to 260 micrometers. The spacing b between the bottom edge 611 and the second sub-winding segment 3112 is 10 micrometers to 30 micrometers, for example, the spacing b between the bottom edge 611 and the second sub-winding segment 3112 is 15 micrometers to 20 micrometers.
FIG. 4b is a schematic diagram II of a first sub-mark pattern in a display panel according to an embodiment of the disclosure; fig. 4c is a schematic diagram III of a first sub-mark pattern in a display panel according to an embodiment of the disclosure. In some examples, the plurality of first sub-mark patterns 61 are arranged at intervals along the second direction D2 to form a first sub-mark pattern group, and each first sub-mark pattern 61 in the first sub-mark pattern group is connected in sequence. For example, three first sub-mark patterns 61 are arranged at intervals along the second direction D2 to form a first sub-mark pattern group, the three first sub-mark patterns 61 are sequentially connected, and the three first sub-mark patterns 61 are all trapezoidal protrusions, as shown in fig. 4 b. Alternatively, the two first sub-mark patterns 61 are arranged at intervals along the second direction D2 to form a first sub-mark pattern group, the two first sub-mark patterns 61 are sequentially connected, and the two first sub-mark patterns 61 are all trapezoidal protrusions, as shown in fig. 4 c.
In some examples, a distance L between a bottom edge of the first sub-mark pattern 61 of the first sub-mark pattern group located on one side in the second direction D2 and a bottom edge of the first sub-mark pattern 61 of the first sub-mark pattern group located on the other side in the second direction D2 is 200 micrometers to 300 micrometers.
As shown in fig. 4b, three first sub-mark patterns 61 are arranged at intervals along the second direction D2 to form a first sub-mark pattern group, the length a of the bottom edge 611 of each first sub-mark pattern 61 in the second direction D2 is 80 micrometers, the spacing c between adjacent first sub-mark patterns 61 is 10 micrometers, and the distance L between the bottom edge of the first sub-mark pattern 61 of the first sub-mark pattern group located on one side in the second direction D2 and the bottom edge of the first sub-mark pattern 61 of the first sub-mark pattern group located on the other side in the second direction D2 is 260 micrometers.
As shown in fig. 4c, two first sub-mark patterns 61 are arranged at intervals along the second direction D2 to form a first sub-mark pattern group, the length a of the bottom edge 611 of each first sub-mark pattern 61 in the second direction D2 is 120 micrometers, the distance c between adjacent first sub-mark patterns 61 is 10 micrometers, and the distance L between the bottom edge of one first sub-mark pattern 61 and the bottom edge of the other first sub-mark pattern 61 is 260 micrometers.
In some examples, as shown in fig. 4b and 4c, the waist edge 612 of the first sub-mark pattern 61 forms an angle D of 30 degrees to 60 degrees with the first direction D1 perpendicular to the bottom edge 611, and, illustratively, the waist edge 612 of the first sub-mark pattern 61 forms an angle D of 45 degrees to 55 degrees with the first direction D1 perpendicular to the bottom edge 611.
Fig. 5a is a schematic diagram of a second sub-mark pattern in a display panel according to an embodiment of the disclosure. In some examples, as shown in fig. 5a, the crack detection line 31 of the first sub-frame region 211 may include two third and fourth sub-winding sections 312c and 312D extending along the first direction D1, the third and fourth sub-winding sections 312c and 312D being spaced apart along the second direction D2, and the third sub-winding section 312c being located at a side of the fourth sub-winding section 312D remote from the display region 10. The third sub-winding section 312c may be connected to the first sub-winding section 3111, and the fourth sub-winding section 312d may be connected to the first winding section 311. The third sub-winding section 312c is provided with the second sub-mark pattern 62 in a curved manner, the second sub-mark pattern 62 extends in the first direction D1 away from the display area 10, and the second sub-mark pattern 62 is provided as a boss-like protrusion. The length e of the boss-like projections in the first direction D1 is 50 micrometers to 100 micrometers, for example, the length e of the boss-like projections in the first direction D1 is 70 micrometers to 90 micrometers. The length f of the boss-like projections in the second direction D2 is 40 micrometers to 100 micrometers, for example, the length f of the boss-like projections in the second direction D2 is 60 micrometers to 80 micrometers. The length e of the first direction D1 is a distance between one side edge of the second sub-mark pattern 62 in the first direction D1 and the other side edge of the second sub-mark pattern 62 in the first direction D1; the length f in the second direction D2 is a distance between an edge of the second sub-mark pattern 62 on one side of the second direction D2 and an edge of the second sub-mark pattern 62 on the other side of the second direction D2.
Fig. 5b is a schematic diagram of a second sub-mark pattern in the display panel according to the embodiment of the disclosure. In some examples, as shown in fig. 5b, the second sub-mark pattern 62 is provided as a stepped protrusion. The length e of the stepped protrusion in the first direction D1 is 40 micrometers to 100 micrometers, for example, the length e of the stepped protrusion in the first direction D1 is 60 micrometers to 80 micrometers. The length f of the stepped protrusion in the second direction D2 is 40 micrometers to 100 micrometers, for example, the length f of the stepped protrusion in the second direction D2 is 60 micrometers to 80 micrometers.
Fig. 5c is a schematic diagram III of a second sub-mark pattern in the display panel according to the embodiment of the disclosure. In some examples, as shown in fig. 5c, the second sub-mark pattern 62 is provided as a triangular protrusion. The corners of the triangular protrusions are rounded. The length e of the triangular protrusions in the first direction D1 is 40 micrometers to 100 micrometers, for example, the length e of the triangular protrusions in the first direction D1 is 60 micrometers to 90 micrometers. The length f of the triangular protrusions in the second direction D2 is 40 micrometers to 100 micrometers, for example, the length f of the triangular protrusions in the second direction D2 is 60 micrometers to 80 micrometers.
Fig. 5d is a schematic diagram of a second sub-mark pattern in the display panel according to the embodiment of the disclosure. In some examples, as shown in fig. 5d, the second sub-mark patterns 62 are provided as diamond-shaped protrusions. The length e of the diamond-shaped protrusions in the first direction D1 is 60 micrometers to 80 micrometers, and the length f of the diamond-shaped protrusions in the second direction D2 is 60 micrometers to 80 micrometers. Alternatively, the length e of the diamond-shaped protrusions in the first direction D1 is 30 micrometers to 60 micrometers, and the length f of the diamond-shaped protrusions in the second direction D2 is 60 micrometers to 80 micrometers.
Fig. 5e is a schematic diagram of a second sub-mark pattern in the display panel according to the embodiment of the disclosure. In some examples, as shown in fig. 5e, the second sub-mark patterns 62 are provided as hexagonal protrusions. The length e of the hexagonal protrusions in the first direction D1 is 100 micrometers to 150 micrometers, for example, the length e of the hexagonal protrusions in the first direction D1 is 120 micrometers to 130 micrometers. The length f of the hexagonal protrusions in the second direction D2 is 20 micrometers to 80 micrometers. For example, the length f of the hexagonal protrusions in the second direction D2 is 40 micrometers to 60 micrometers.
Fig. 5f is a schematic diagram of a second sub-mark pattern in the display panel according to the embodiment of the disclosure. In some examples, as shown in fig. 5f, the second sub-mark pattern 62 includes a first portion 71 and a second portion 72 connected to each other, the first portion 71 is located on a side of the second portion 72 near the display area 10, the first portion 71 and the second portion 72 are each triangular, and corners of the first portion 71 are connected to corners of the second portion 72. The length e of the second sub-mark patterns 62 in the first direction D1 is 10 micrometers to 60 micrometers, for example, the length e of the second sub-mark patterns 62 in the first direction D1 is 30 micrometers to 50 micrometers. The length f of the second sub-mark pattern 62 in the second direction D2 is 20 micrometers to 80 micrometers. For example, the length f of the second sub-mark pattern 62 in the second direction D2 is 40 micrometers to 60 micrometers.
In some examples, the marking pattern on the crack detection line may be disposed in the same layer as the crack detection line (e.g., the wire segment and the connection segment), and integrally formed therewith, e.g., the wire segment, the connection segment, and the marking pattern of the crack detection line are disposed in the same layer as the second gate metal layer of the driving circuit layer in the display area.
In some embodiments, the pattern of markings on the crack detection line may be located in a different film layer than the crack detection line (e.g., the wire wrap segment and the connection segment). The marking pattern may be connected to the wire segment of the crack detection wire through the via hole, thereby increasing the recognition of the marking pattern.
Fig. 6 is a second schematic diagram of a trace of a display panel according to an embodiment of the disclosure. As shown in fig. 6, the first sub-frame region 212 further includes a gate driving circuit (GOA circuit) 71, a power signal line 72, and an isolation dam 73, the gate driving circuit (GOA circuit) 71, the power signal line 72, and the isolation dam 73 are all disposed around the periphery of the display region 10, the gate driving circuit (GOA circuit) 71, the power signal line 72, and the isolation dam 73 are sequentially spaced apart in a direction away from the display region 10, the crack detection line 31 is located between the power signal line 72 and the isolation dam 73, the mark pattern 60 of the crack detection line 31 is located between the power signal line 72 and the isolation dam 73, and the mark pattern 60 extends in a direction close to the isolation dam 73 and is spaced apart from the isolation dam 73.
In some examples, as shown in fig. 6, the bezel area may include a plurality of crack detection lines 31, the plurality of crack detection lines 31 being substantially symmetrical about a center line a of the display area in the second direction D2, and the mark pattern 60 being substantially symmetrical about the center line a of the display area in the second direction D2. For example, the first frame region 21 may include two crack detection lines 31, and the two crack detection lines 31 may be substantially symmetrical with respect to a center line a of the display panel in the second direction D2. One crack detection line 31 may be located in the left half region of the first frame region 21, and one crack detection line 31 may be located in the right half region of the first frame region 21; the marking patterns 60 on the two crack detection lines 31 are substantially symmetrical about the center line a of the display area in the second direction D2, the marking pattern 60 on one crack detection line 31 may be located in the left half area of the first frame area 21, and the marking pattern 60 on one crack detection line 31 may be located in the right half area of the first frame area 21.
The embodiment of the invention also provides a display device which comprises any one of the display panels. The display device includes a mobile phone, a tablet computer, a smart wearable product (e.g., a smart watch, a bracelet, etc.), a Personal Digital Assistant (PDA), a car computer, etc. The embodiment of the present application does not particularly limit the specific form of the display device.
The drawings in the present disclosure relate only to the structures to which the present disclosure relates, and other structures may be referred to in general. Features of embodiments of the present disclosure, i.e., embodiments, may be combined with one another to arrive at a new embodiment without conflict.
It will be understood by those skilled in the art that various modifications and equivalent substitutions may be made to the disclosed embodiments without departing from the spirit and scope of the disclosed embodiments, which are intended to be encompassed within the scope of the appended claims.

Claims (15)

1. The display panel is characterized by comprising a display area and a frame area positioned at the periphery of the display area, wherein the display area comprises a plurality of data lines and a plurality of sub-pixels, and the data lines are electrically connected with the sub-pixels; the frame region includes a crack detection line and a plurality of detection control units, the crack detection line is electrically connected with at least one data line of the plurality of data lines through the plurality of detection control units, the crack detection line includes at least one mark pattern configured as an alignment mark for use in a process.
2. The display panel of claim 1, wherein the crack detection line comprises a plurality of wire segments including a second wire segment and a first wire segment arranged at intervals along a direction away from the display area, the first wire segment including the at least one marking pattern.
3. The display panel of claim 2, wherein the bezel area includes a first bezel area surrounding the display area and a second bezel area located at a side of the first bezel area remote from the display area, the first bezel area includes a first sub-bezel area located between the display area and the second bezel area and a second sub-bezel area located at other sides of the display area, the crack detection line is located at the first sub-bezel area and the second sub-bezel area, the mark pattern includes a first sub-mark pattern and a second sub-mark pattern, the first sub-mark pattern is located at the second sub-bezel area, and the second sub-mark pattern is located at the first sub-bezel area.
4. The display panel of claim 3, wherein the first wire segment of the crack detection wire of the second sub-frame region includes a first sub-wire segment extending along a second direction, the first sub-wire segment being bent to provide a first sub-mark pattern extending along a first direction away from the display region, the first direction intersecting the second direction.
5. The display panel according to claim 4, wherein the first sub-mark pattern is provided as a trapezoidal protrusion including two waist edges and a bottom edge extending along the second direction, the two waist edges being connected to both ends of the bottom edge, respectively.
6. The display panel of claim 5, wherein the bottom edge has a length of 200 to 300 microns and a spacing between the bottom edge and the second wire segment is 10 to 30 microns.
7. The display panel of claim 5, wherein a plurality of the first sub-mark patterns are arranged at intervals along the second direction to form a first sub-mark pattern group, and first sub-mark patterns in the first sub-mark pattern group are sequentially connected.
8. The display panel of claim 7, wherein a distance between a bottom edge of a first sub-mark pattern of the first sub-mark pattern group located at one side in the second direction to a bottom edge of a first sub-mark pattern of the first sub-mark pattern group located at the other side in the second direction is 200 micrometers to 300 micrometers.
9. The display panel of claim 5, wherein the waist edge forms an angle of 30 degrees to 60 degrees with a direction perpendicular to the bottom edge.
10. The display panel of claim 3, wherein the crack detection line of the first sub-frame region includes a third sub-winding segment extending along a first direction, the third sub-winding segment including a second sub-marking pattern disposed along a second direction away from the display region, the first direction intersecting the second direction.
11. The display panel according to claim 10, wherein the second sub-mark pattern is provided as a boss-like protrusion having a length of 70 micrometers to 90 micrometers in the first direction and a length of 60 micrometers to 80 micrometers in the second direction; or, the second sub-mark pattern is configured as a step-shaped protrusion, the length of the step-shaped protrusion in the first direction is 60 micrometers to 80 micrometers, and the length of the step-shaped protrusion in the second direction is 60 micrometers to 80 micrometers; alternatively, the second sub-mark patterns are provided as triangular protrusions, the length of the triangular protrusions in the first direction is 60 micrometers to 90 micrometers, and the length of the triangular protrusions in the second direction is 60 micrometers to 80 micrometers; or the second sub-mark patterns are arranged into diamond-shaped bulges, the lengths of the diamond-shaped bulges in the first direction are 60 micrometers to 80 micrometers, and the lengths of the diamond-shaped bulges in the second direction are 60 micrometers to 80 micrometers; alternatively, the length of the diamond-shaped protrusions in the first direction is 30 micrometers to 60 micrometers, and the length of the diamond-shaped protrusions in the second direction is 60 micrometers to 80 micrometers; alternatively, the second sub-mark patterns are arranged as hexagonal protrusions, the lengths of the hexagonal protrusions in the first direction are 120 micrometers to 130 micrometers, and the lengths of the hexagonal protrusions in the second direction are 40 micrometers to 60 micrometers; alternatively, the second sub-mark pattern includes a first portion and a second portion connected to each other, the first portion is located at a side of the second portion near the display area, the first portion and the second portion are each configured as a triangle, and a corner of the first portion is connected to a corner of the second portion.
12. The display panel according to any one of claims 1 to 11, wherein the bezel region includes a plurality of crack detection lines, the plurality of crack detection lines are disposed axisymmetrically with respect to a center line of the display region, and the mark pattern is disposed axisymmetrically with respect to the center line of the display region.
13. The display panel of any one of claims 1 to 11, wherein the marking pattern and the crack detection line are located in different layers, the marking pattern being connected to the crack detection line by a via.
14. The display panel according to any one of claims 1 to 11, wherein the bezel region further includes a gate driving circuit, a power signal line, and an isolation dam, the gate driving circuit, the power signal line, and the isolation dam being sequentially arranged at intervals in a direction away from the display region, the crack detection line being located between the power signal line and the isolation dam.
15. A display device comprising the display panel of any one of claims 1 to 14.
CN202223177029.6U 2022-11-29 2022-11-29 Display panel and display device Active CN218996328U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202223177029.6U CN218996328U (en) 2022-11-29 2022-11-29 Display panel and display device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202223177029.6U CN218996328U (en) 2022-11-29 2022-11-29 Display panel and display device

Publications (1)

Publication Number Publication Date
CN218996328U true CN218996328U (en) 2023-05-09

Family

ID=86214806

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202223177029.6U Active CN218996328U (en) 2022-11-29 2022-11-29 Display panel and display device

Country Status (1)

Country Link
CN (1) CN218996328U (en)

Similar Documents

Publication Publication Date Title
CN109216377B (en) Display device and manufacturing method thereof
US20230354646A1 (en) Display Device
US10217802B2 (en) Organic light-emitting display device with high resolution and high definition
US9525012B2 (en) Curved display device
KR102107384B1 (en) Display device including process key
KR102652572B1 (en) Flexible electroluminesence display
US11455959B2 (en) Display device
TW202135352A (en) Transparent display device
US20110157114A1 (en) Electroluminescence device
US20220392993A1 (en) Display substrate and display device
CN113223457A (en) Pixel and display device including the same
US11908951B2 (en) TFT substrate and light emitting display device including the same
WO2024114113A1 (en) Display panel and display apparatus
US20240194134A1 (en) Display Substrate and Preparation Method Thereof, Display Apparatus
CN114023771A (en) Display substrate and display device
CN115394201B (en) Display panel and display device
CN219042436U (en) Display panel and display device
CN218996328U (en) Display panel and display device
CN115802799A (en) Display substrate and display device
KR20200019501A (en) Display device using semiconductor light emitting diode and method for manufacturing the same
CN114447068A (en) Display substrate, preparation method thereof and display device
CN219269473U (en) Display panel and display device
WO2023023908A1 (en) Display substrate and preparation method therefor, and display device
WO2023044763A1 (en) Array substrate and display device
US20220131114A1 (en) Display device and method of manufacturing the same

Legal Events

Date Code Title Description
GR01 Patent grant
GR01 Patent grant