CN218958893U - Low-cost cavity filter module, circuit and electronic product - Google Patents
Low-cost cavity filter module, circuit and electronic product Download PDFInfo
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- CN218958893U CN218958893U CN202223371161.0U CN202223371161U CN218958893U CN 218958893 U CN218958893 U CN 218958893U CN 202223371161 U CN202223371161 U CN 202223371161U CN 218958893 U CN218958893 U CN 218958893U
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- flip chip
- barrier layer
- substrate
- filter module
- cavity filter
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Images
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- Surface Acoustic Wave Elements And Circuit Networks Thereof (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Abstract
The utility model discloses a low-cost cavity filter module, a circuit, an electronic product and a packaging method. The low-cost cavity filter module includes: the first flip chip, the second flip chip, the barrier layer, the substrate and the plastic packaging material are attached to the substrate; the barrier layer surrounds the outer periphery of the first flip chip, and the thickness of the barrier layer is greater than or equal to the distance from the lower surface of the first flip chip to the upper surface of the substrate; the plastic package material wraps the first flip chip and the second flip chip. The utility model can ensure that the bottom of the filter in the module forms a cavity, but not the bottom of the filter chip and the bottom of the passive element can be well filled, thereby avoiding tin connection and improving the reliability of the module on the premise of keeping low cost.
Description
Technical Field
The utility model relates to a low-cost cavity filter module, and also relates to a circuit and an electronic product comprising the low-cost cavity filter module, belonging to the technical field of semiconductor packaging.
Background
With the development of communication technology and the continuous increase of data services, the performance requirements of electronic products represented by communication terminals on radio frequency front end modules are increasing. In order to meet the requirements of continuous integration and modularization of the radio frequency front end module, various packaging modes are needed to integrate the filter chip into the radio frequency front end module.
In the prior art, a filter chip mainly adopts CSP (chip scale package) and WLP (wafer level package) packaging modes and the like. Wherein, the CSP packaging mode is to form a cavity in a film coating mode; the WLP package directly forms the cavity required for the filter on the chip. In the CSP packaging mode, the outside plastic packaging material is isolated by a film coating mode to ensure that the bottom of the filter forms a cavity, and other chips or device bottoms in the module cannot be well underfilled due to the influence of the film coating, so that the device is easy to be in tin short circuit. Meanwhile, the reliability of the non-filter chip and the passive element cannot be guaranteed because the plastic package material is not fully filled.
In the chinese patent application with application number 202110468684.8, a filter system-level hybrid package module and a packaging method are disclosed. The filter system-in-package module comprises: a first filter that filters the received signal in a first frequency band; a second filter that filters the received signal in a second frequency band different from the first frequency band; the filter comprises a substrate, wherein one side of the substrate is provided with a bonding pad, the other side of the substrate is provided with a molding compound, the molding compound provides a first space for a first filter, and the molding compound provides a second space different from the first space for a second filter; the surface of the molding compound is coated with metal coating, and the first space and the second space are separated by the metal coating; the substrate is provided with a wiring, and the wiring is connected with the first filter and the second filter.
Disclosure of Invention
The primary technical problem to be solved by the utility model is to provide a low-cost cavity filter module.
Another objective of the present utility model is to provide a circuit including the low-cost cavity filter module.
Another object of the present utility model is to provide an electronic product including the low-cost cavity filter module.
In order to achieve the technical purpose, the utility model adopts the following technical scheme:
according to a first aspect of embodiments of the present utility model, there is provided a low-cost cavity filter module, including a first flip chip, a second flip chip, a barrier layer, a substrate, and a molding compound,
the first flip chip and the second flip chip are attached to the substrate;
the barrier layer surrounds an outer periphery of the first flip chip, and a thickness of the barrier layer is equal to or greater than a distance from a lower surface of the first flip chip to an upper surface of the substrate;
the plastic package material coats the first flip chip and the second flip chip.
Wherein preferably, the thickness of the barrier layer is 20 um-50 um.
Wherein preferably the lower surface of the first flip chip is bonded to the upper surface of the barrier layer.
Wherein, preferably, the screening maximum particle diameter of the plastic package filler particles of the plastic package material is more than or equal to 32um.
Wherein, preferably, the overflow flowing capacity of the resin in the plastic packaging material of the plastic packaging material is less than 1.5mm.
Preferably, the inner area enclosed by the blocking layer coincides with the projection area of the first flip chip on the substrate, or is smaller than the projection area of the first flip chip on the substrate.
Wherein preferably the lower surface of the first flip chip abuts the upper surface of the barrier layer.
According to a second aspect of embodiments of the present utility model, a circuit is provided, which includes a low cost cavity filter module as described above.
According to a third aspect of embodiments of the present utility model, an electronic product is provided, which includes a low-cost cavity filter module as described above.
Compared with the prior art, the utility model has the following technical effects: 1) The barrier layer is formed by adopting the conventional green oil coating and other processes, so that the process is not increased and the process difficulty is not increased; 2) By using a barrier layer and a suitable molding compound, it is achieved in the same molding process that the molding compound does not enter the cavity of the flip chip (e.g., SAW filter) and that the molding compound is able to substantially fill under another flip chip to form a reliable connection. Therefore, the utility model can ensure that the bottom of the filter in the module forms a cavity, but not the bottom of the filter chip and the bottom of the passive element can be well filled, thereby avoiding tin connection and improving the reliability of the module on the premise of keeping low cost.
Drawings
FIG. 1A is a schematic cross-sectional view of a low cost cavity filter module according to a first embodiment of the present utility model;
FIG. 1B is a schematic top view of the low cost cavity filter module of FIG. 1A;
fig. 2A to 2C are schematic views illustrating steps of a method for packaging the low-cost cavity filter module shown in fig. 1.
Detailed Description
The technical contents of the present utility model will be described in detail with reference to the accompanying drawings and specific examples.
The utility model utilizes the existing bare chip (bare die) to be attached to the surface of the optimally designed substrate, and selects proper plastic packaging materials, so that the bare chip and the substrate directly form a cavity, and other non-filter chips and the bottoms of passive elements can be well filled with the plastic packaging materials, thereby guaranteeing the reliability of welding spots of all chips or elements. Meanwhile, the laminating process is reduced, and the process complexity is reduced.
(first embodiment)
As shown in fig. 1A and 1B, a first embodiment of the present utility model provides a low-cost cavity filter module including a first Flip Chip (Flip Chip) 21, a second Flip Chip 22, a barrier layer 23, a substrate 24, and a molding compound 25.
The substrate 24 may be an organic substrate or an inorganic substrate such as various carriers, circuits, ceramic substrates, FR-4 epoxy glass cloth substrates, and the like.
The first flip chip 21 and the second flip chip 22 are independently mounted on the substrate. The bumps of the first flip-chip 21 are connected down to the substrate, carrier, circuit, so that a cavity 211 is formed between the first flip-chip 21 and the substrate. The first flip chip 21 is a cavity filter chip, such as a surface acoustic wave filter (SAW) or a bulk acoustic wave filter (BAW) chip, but this is not a limitation of the present utility model. The second flip chip 22 may be a cavity filter chip such as a SAW or BAW chip, or may be a passive element that is connected to the substrate by a Surface Mount Technology (SMT) method or a flip chip method. Thus, a cavity 221 is formed between the second flip chip 22 and the substrate. The barrier layer 23, in this embodiment a green oil, i.e. a solder mask, has a thickness of 20um to 50um. The barrier layer 23 is a ring-shaped structure that closely surrounds the outer periphery of the first flip-chip 21 (as shown in fig. 1B) to enclose the first flip-chip in the inner region of the barrier layer 23. In other words, the inner area enclosed by the barrier layer 23 coincides with the projected area of the first flip chip on the substrate 24, or is slightly smaller. The thickness of the barrier layer 23 (i.e., the dimension of the barrier layer 23 in the direction perpendicular to the substrate surface) is equal to or greater than the distance from the lower surface of the first flip chip 21 to the upper surface of the substrate 24 (i.e., the height of the cavity 211) such that the lower surface of the first flip chip 21 abuts against the upper surface 231 of the barrier layer 23 in a state where the first flip chip 21 is soldered to the substrate 24 (after the plastic molding process, both are connected together). Therefore, a region 232 of reliable contact is formed between the first flip chip 21 and the barrier layer 23, thereby enclosing a closed space of the cavity 211 between the barrier layer 23, the first flip chip 21 and the substrate 24, so that the molding material cannot enter into the cavity.
In the plastic packaging (MD) process, a proper plastic packaging material is selected. It is necessary to control the screened maximum particle size (filer cut) of the molding compound filler particles and the resin overflow flow ability (flash) in the molding compound. The size of the maximum particle size is selected to determine the gap between the height of the solder paste after welding and the solder mask, and the gap can not be filled into the cavity by the plastic packaging material. The flash can flow in as long as the gap is large, so the flash is smaller than 1.5mm.
Therefore, it is necessary to select an appropriate filler size (filer size) for the molding compound 25 based on the screened maximum particle size (filer cut) of the molding compound filler particles and the resin overflow flow ability (flash) in the molding compound. For example, assuming a solder paste or ball height of around 35um after soldering, if the thickness of the barrier layer 23 is a minimum of 20um, the gap (gap) is 35-20=15 um. Under the condition, plastic packaging materials with the filler particle size of more than or equal to 32 microns are not easy to enter the cavity, or only a small amount of flash can enter the cavity, so flash is less than 1.5mm. In the embodiment, the maximum screening particle size is controlled to be more than or equal to 32um, and the flash is smaller than 1.5mm, so that resin is not easy to flow into the cavity, and the cavity requirement required by the filter is met; meanwhile, other chips and the bottom of the passive element 22 can be well filled with resin, so that the reliability of the product is ensured.
(second embodiment)
As shown in fig. 2A to 2C, a second embodiment of the present utility model provides a method for packaging a low-cost cavity filter module, which at least includes the following steps.
S1: and forming an annular barrier layer on the substrate according to the size of the first flip chip, so that the area surrounded by the barrier layer is smaller than or equal to the outline of the first flip chip.
As shown in fig. 2A, a barrier layer 23 is coated on a substrate 24 to form a ring-shaped structure. It will be appreciated that the annular barrier 23 can also be formed if an etching process or the like is used. The area enclosed by the barrier layer 23 is contoured to the same contour as the first flip-chip 21 so that the first flip-chip 21 can be soldered into the enclosed area.
S2: attaching the first flip chip to the surface of the substrate in the area surrounded by the barrier layer through a chip bonding process, so that a cavity is formed between the lower surface of the first flip chip and the upper surface of the substrate; and simultaneously mounting a second flip chip.
As shown in fig. 2B, the first flip chip 21 is mounted on the substrate 24 using a Die Bonding (Die Bonding) process or a Surface Mount (SMT) process, and the first flip chip 21 is located in an area surrounded by the barrier layer 23.
Since the area enclosed by the barrier layer 23 is the same as the outline of the first flip chip 21, the lower surface of the first flip chip 21 after mounting is reliably in contact with the upper surface 231 of the barrier layer 23. And, a cavity 211 is formed between the lower surface of the first flip chip 21, the barrier layer 23, and the substrate 24. If the first flip chip is a SAW chip, the interdigital electrodes of the SAW chip are located within the cavity 211.
Meanwhile, the second flip chip 22 is mounted on the substrate 24 in the same chip bonding or chip mounting process as the first flip chip 21. Except that the second flip chip 22 is outside the area enclosed by the barrier layer 23.
S3: and adopting a plastic packaging process, and coating the first flip chip and the second flip chip by using a plastic packaging material to form a packaging module.
Taking an epoxy resin molding compound as an example, wherein the filler is required to be controlled to have a maximum screening particle size of more than or equal to 32um and a flash of less than 1.5mm, so that the molding material is not easy to flow into the cavity, thereby meeting the cavity requirement required by the first flip chip 21 (for example, a SAW filter); at the same time, the bottom of the second flip chip 22 (other chips or passive devices) can be well filled with resin, ensuring the reliability of the product.
< third embodiment >
The third embodiment of the present utility model also provides a circuit, which includes the low-cost cavity filter module according to the first embodiment. The circuit may be, for example, a radio frequency circuit, a microelectromechanical system (MEMS), or the like.
< fourth embodiment >
The fourth embodiment of the present utility model provides an electronic product based on the first embodiment. The electronic product comprises the low-cost cavity filter module, and can be a smart phone, a tablet personal computer, wearable electronic equipment, an intelligent internet-connected automobile and the like.
In summary, the low-cost cavity filter module provided by the utility model has the following technical characteristics: 1) The barrier layer is formed by adopting the conventional green oil coating and other processes, so that the process is not increased and the process difficulty is not increased; 2) By using the barrier layer and a suitable molding compound, the same molding process can be used to achieve a mold compound that does not enter the cavity of the first flip-chip (e.g., SAW filter) and that can substantially fill under the second flip-chip to form a reliable connection. Therefore, the utility model can ensure that the bottom of the filter in the module forms a cavity, but not the bottom of the filter chip and the bottom of the passive element can be well filled, thereby avoiding tin connection and improving the reliability of the module on the premise of keeping low cost.
The low-cost cavity filter module, the circuit and the electronic product provided by the utility model are described in detail. Any obvious modifications to the present utility model, without departing from the spirit thereof, would constitute an infringement of the patent rights of the utility model and would take on corresponding legal liabilities.
Claims (9)
1. The low-cost cavity filter module is characterized by comprising a first flip chip, a second flip chip, a barrier layer, a substrate and a plastic package material; wherein,,
the first flip chip and the second flip chip are attached to the substrate;
the barrier layer surrounds an outer periphery of the first flip chip, and a thickness of the barrier layer is equal to or greater than a distance from a lower surface of the first flip chip to an upper surface of the substrate;
the plastic package material coats the first flip chip and the second flip chip.
2. The low cost cavity filter module of claim 1, wherein:
the thickness of the barrier layer is 20-50 um.
3. The low cost cavity filter module of claim 1, wherein:
the lower surface of the first flip chip is connected with the upper surface of the barrier layer.
4. The low cost cavity filter module of claim 1, wherein:
the screening maximum particle size of the filler particles of the plastic packaging material is more than or equal to 32 microns.
5. The low cost cavity filter module of claim 4, wherein:
the overflow flowing capacity of the resin in the plastic packaging material of the plastic packaging material is less than 1.5mm.
6. A low cost cavity filter module as claimed in claim 3, wherein:
the inner area enclosed by the barrier layer is overlapped with the projection area of the first flip chip on the substrate, or the inner area enclosed by the barrier layer is smaller than the projection area of the first flip chip on the substrate.
7. A low cost cavity filter module as claimed in claim 3, wherein:
the lower surface of the first flip chip abuts against the upper surface of the barrier layer.
8. A circuit comprising a low cost cavity filter module according to any one of claims 1 to 7.
9. An electronic product comprising a low cost cavity filter module according to any one of claims 1 to 7.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202223224284 | 2022-12-01 | ||
| CN2022232242841 | 2022-12-01 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN218958893U true CN218958893U (en) | 2023-05-02 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202223371161.0U Active CN218958893U (en) | 2022-12-01 | 2022-12-15 | Low-cost cavity filter module, circuit and electronic product |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN218958893U (en) |
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2022
- 2022-12-15 CN CN202223371161.0U patent/CN218958893U/en active Active
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