CN218920269U

CN218920269U - Integrated circuit and SOP packaging structure for switching converter

Info

Publication number: CN218920269U
Application number: CN202222959189.XU
Authority: CN
Inventors: 易坤
Original assignee: Jingyi Semiconductor Co ltd
Current assignee: Jingyi Semiconductor Co ltd
Priority date: 2022-11-07
Filing date: 2022-11-07
Publication date: 2023-04-25
Anticipated expiration: 2032-11-07

Abstract

Embodiments of the present disclosure relate to an integrated circuit and SOP package structure for a switching converter. The integrated circuit comprises a first power switch tube, a second power switch tube and a control circuit. The first end of the first power switch tube is coupled with the first end of the second power switch tube; the second end of the first power switch tube is coupled with the second end of the second power switch tube. The control circuit generates a first control signal and a second control signal according to sampling signals of the voltage and/or the current of the converter. The first control signal and the second control signal respectively control the complementary conduction of the first power switching tube and the second power switching tube. The utility model can combine and seal two parallel power switch tubes with the same type and control circuits with the same type which are alternately conducted into one chip in high-power application occasions, realizes the single-package power conversion capability of the highest power in the industry, and can generate technical innovation for a plurality of electronic markets.

Description

Integrated circuit and SOP packaging structure for switching converter

Technical Field

The present utility model relates to electronic circuits, and more particularly, to an integrated circuit for a switching converter and a Small Out-Line Package (SOP) structure.

Background

In the application of a power management chip, a single small-area power switch tube and a controller are integrated by the power management chip in the application of low power, and in the application of high power, the power management chip is generally applied in a mode of adding an external discrete power MOSFET tube with high voltage and low on-resistance to the control chip. The reason for this is mainly limited by the existing package shape. At present, most of wafers of power MOSFETs with large sizes and long widths of internal package frames are difficult to match, and wafers of power MOSFETs with low on-resistance cannot be sealed into standard package body external structures.

The adoption of the separate control chip and the power MOSFE tube scheme can occupy a larger PCB area, and meanwhile, the parasitic inductance and the parasitic resistance are larger due to the long wiring between the control chip and the power MOSFET tube, so that the MOSFET tube is difficult to select and produce and prepare materials in practical application for customers. Meanwhile, the separation application also causes that the control chip cannot perform over-temperature protection on the power MOSFET, and the reliability problem of the whole circuit is caused.

Therefore, how to integrate high power switching tubes in existing packaging applications is a problem that we want to solve in high power applications.

Disclosure of Invention

The present utility model is directed to solving the above-mentioned problems of the prior art and providing an integrated circuit and SOP package structure for a switching converter. By using the embodiment of the disclosure, the power switch tube and the control circuit can be subjected to seal design in high-power application occasions.

According to an aspect of the present utility model, there is provided an integrated circuit for a switching converter, the integrated circuit comprising: the first power switch tube is provided with a first end, a second end and a control end; the second power switch tube is provided with a first end, a second end and a control end, wherein the first end of the first power switch tube is coupled with the first end of the second power switch tube, and the second end of the first power switch tube is coupled with the second end of the second power switch tube; and the control circuit receives voltage and/or current sampling signals representing the switching converter and generates a first control signal and a second control signal according to the voltage and/or current sampling signals, wherein the first control signal is coupled with the control end of the first power switching tube, the second control signal is coupled with the control end of the second power switching tube, and the first control signal and the second control signal are respectively used for controlling the complementary conduction of the first power switching tube and the second power switching tube.

Further, the first power switch tube and the second power switch tube are power switch tubes of the same type.

Further, the switching converter includes a boost-type power factor correction circuit.

Further, the switching converter comprises a flyback switching converter.

According to another aspect of the present utility model, there is provided an SOP package structure for a switching converter, characterized in that the SOP package structure includes: a lead frame; the first base island is positioned on the lead frame and used for placing the first power switch tube, and the first base island comprises at least one pin; the second base island is positioned on the lead frame and used for placing a second power switch tube, the second base island comprises at least one pin, and the at least one pin of the first base island and the at least one pin of the second base island are electrically connected together outside the SOP packaging structure; and a third island on the leadframe for placing a control circuit, wherein the control circuit is for controlling the first switch and the second switch to conduct complementarily.

Further, the first power switch tube and the second power switch tube are respectively provided with a first end, a second end and a control end; the first end of the first power switch tube is led out through at least one pin of the first base island; the first end of the second power switch tube is led out through at least one pin of the second base island; the second end of the first power switch tube and the second end of the second power switch tube are electrically connected through a lead frame.

Further, the SOP package structure further includes a bonding wire, and the control end of the first power switch tube and the control end of the second power switch tube are electrically connected to the control circuit through the bonding wire.

Further, the switching converter comprises a flyback switching converter

By using the embodiment of the disclosure, particularly in the application occasions of a power factor correction circuit and a flyback switching converter, two parallel power switching tubes with the same type and alternately conducted power switching tubes and a control circuit can be combined and sealed into one chip, so that the single-package power conversion capability of the highest power in the industry is realized, technical innovation can be generated for a plurality of electronic markets, and the electronic switching device has great market value.

Drawings

Fig. 1 is a schematic diagram of PFC circuitry 100 in a BOOST topology according to one embodiment of the present utility model;

FIG. 2 is a schematic diagram of a portion of the waveforms of the circuit system shown in FIG. 1;

fig. 3 is a schematic diagram of a package structure 200 of the integrated circuit 10 shown in fig. 1 of the present disclosure.

As shown in the drawings, like reference numerals refer to like parts throughout the different views. The drawings are provided for the purpose of illustrating embodiments, concepts, etc. and are not drawn to scale.

Detailed Description

Specific embodiments of the utility model will now be described, without limitation, with reference to the accompanying drawings. Reference throughout this specification to "one embodiment" or "an embodiment" means that a particular feature, structure, or characteristic described in connection with the embodiment is included in at least one embodiment of the present utility model. Thus, the appearances of the phrases "in one embodiment" or "in an embodiment" in various places throughout this specification are not necessarily all referring to the same embodiment. The verbs "comprise" and "have" are used herein as open limits, which neither exclude nor require that there be unrecited features. Features recited in the dependent claims may be freely combined with each other unless explicitly stated otherwise. The use of an element defined as "one" or "one" (i.e., in the singular) throughout this document does not exclude the possibility of a plurality of such elements. Furthermore, the described features, structures, or characteristics may be combined in any suitable manner in one or more embodiments. Unless otherwise indicated, the term "connected" is used to designate a direct electrical connection between circuit elements, while the term "coupled" is used to designate an electrical connection between circuit elements that may be direct or may be via one or more other elements. In contrast, when an element is referred to as being "directly connected to" or "directly coupled to" another element, there are no intervening elements present. The term "and/or" as used herein includes any and all combinations of one or more of the associated listed items. When referring to the voltage of a node or terminal, unless indicated otherwise, the voltage is considered to be the voltage between that node and a reference potential (typically ground). Further, when referring to the potential of a node or terminal, unless otherwise indicated, the potential is considered to refer to a reference potential. The voltages and potentials of a given node or a given terminal will be further designated with the same reference numerals. A signal that alternates between a first logic state (e.g., a logic low state) and a second logic state (e.g., a logic high state) is referred to as a "logic signal. The high and low states of different logic signals of the same electronic circuit may be different. In particular, the high and low states of the logic signal may correspond to voltages or currents that may not be entirely constant in the high or low states.

Fig. 1 provides a circuit system 100 with BOOST topology PFC control. As shown in fig. 1, in the circuit system 100, the ac voltage VAC is rectified by a rectifier and filtered by a capacitor CIN to become the input voltage VIN. The input voltage VIN is converted into the output voltage VOUT through power factor correction by a PFC circuit of a BOOST topological structure. Wherein the common node of the main switching tube and the diode D is denoted SW.

In the embodiment shown in fig. 1, the main switching tube comprises two power switching tubes QN1 and QN2. The power switching tubes QN1 and QN2 are two switching tubes with the same model. The power switching transistors QN1 and QN2 are connected in parallel between the common node SW and the reference ground. Specifically, the first terminal of the power switching tube QN1 and the first terminal of the power switching tube QN2 are coupled, and the second terminal of the power switching tube QN1 and the second terminal of the power switching tube QN2 are electrically connected together to the reference ground. The control end of the power switch tube QN1 receives a first control signal Gate1; the control end of the power switch tube QN2 receives the second control signal Gate2. In one switching period, the first control signal Gate1 and the second control signal Gate2 are complementary conductive signals. Those skilled in the art will appreciate that a complementary on signal is a logic high signal when one signal is at a logic low level and vice versa. That is, the first control signal Gate1 and the second control signal Gate2 control the power switching transistors QN1 and QN2 to be alternately turned on.

In the embodiment shown in fig. 1, the power switching transistors QN1 and QN2 are illustrated as N-type metal semiconductor field effect transistors (N-type Metal Oxide Semiconductor Field Effect Transistor, NMOSFET). The first ends of the power switching tubes QN1 and QN2 are drains of the MOSFETs; the second ends of the power switching tubes QN1 and QN2 are the sources of the MOSFETs; the control terminals of the power switching transistors QN1 and QN2 are the gates of the MOSFETs. Those skilled in the art will appreciate that the power switching transistors QN1 and QN2 may also be other suitable controllable semiconductor power switching devices.

In the conventional technical scheme, a power switch tube is often adopted for switching on and off. In the present application, a topology structure of an alternative dual power switching tube operation mode is adopted, and control signals GATE1 and GATE2 alternatively drive power switching tubes QN1 and QN2. The average current conducted by the power switching tubes QN1 and QN2 is the traditional single power switching tube conducted average current I _avg And the switching times are half of those of the traditional single-power switching tube. The operational waveforms are seen in fig. 2.

As shown in FIG. 2, the waveforms respectively show, from top to bottom, the control signal Gate of the conventional single power switch tube, and the current I flowing through the conventional single power switch tube _QN Control signal Gate1 of power switch tube QN1 in the disclosure and flowing powerCurrent I of rate switching tube QN1 _QN1 Control signal Gate2 of power switching transistor QN2, current I flowing through power switching transistor QN2 _QN2 Voltage V at common node SW _SW Is a waveform of (a).

As will be appreciated by those of ordinary skill in the art, the losses of a power switch include conduction losses and switching losses. Because the switching loss is in a direct proportion to the switching frequency, the power switching tubes QN1 and QN2 are alternately conducted, and the switching frequency of the two power switching tubes is only one half of the frequency of the single power switching tube, so that the switching loss of the power switching tube QN1 and the switching loss of the power switching tube QN2 can be considered to be basically the same as the switching loss of the single power switching tube.

The conduction loss of the single-power switch tube can be I _avg ² X Ron. Where Ron is the on-resistance of the single power switch tube. When the alternating operation mode is selected, the power switching tube QN1 and the power switching tube QN2 with the same type are selected, and the on-resistances Ron-1 of the power switching tube QN1 and the power switching tube QN2 are the same. Therefore, the total conduction loss of the power switching transistors QN1 and QN2 is 2× ((1/2) I _avg ) ² X ron_1. That is, when the on-resistance Ron-1 of the power switching transistors QN1 and QN2 is twice the on-resistance Ron of the single power switching transistor, the on-loss in the dual power switching transistor alternating operation mode is equal to the on-loss in the single power switching transistor operation.

The circuit system 100 further includes a control circuit that receives the sampling signal of the current and/or the voltage of the circuit system 100 and generates the first control signal Gate1 and the second control signal Gate2 according to the parameter sampling signal. In one embodiment, the sampled signal of current and/or voltage includes a feedback signal of the output voltage signal VOUT of the circuitry 100. In yet another embodiment, the sampled signal of current and/or voltage further comprises a sampled signal of the input voltage VIN in the circuitry 100.

In the conventional single power switching mode, it is very difficult to integrate the main switching tube and the control circuit. For example, taking a general outline SOP16 wide package as an example, when a power factor correction control chip and a 600V/200mohm power switch tube are integrated in the package, the wafer size of the power switch tube is 5000um×4000um. The power switch is oversized, and meanwhile, a plurality of leads need to be tied to pins by a control chip, so that the sealing design is basically not realized. In the embodiment shown in fig. 1, however, the power switching transistor QN1, the power switching transistor QN2 and the control circuit may be integrated in the same integrated circuit 10. For example, also in the general outline SOP16 wide package, two 600V/360mohm power switch tubes are used instead of a single 600V/360mohm power switch tube in the alternating control mode illustrated in the present disclosure, and the size of the 600V/360mohm power switch tube is only 3000um×3000um. Therefore, the double-power switch tube and the control circuit can be sealed by adopting a double-power switch tube with the model of 2 times of the on-resistance of the single-power switch tube. The two alternately working power switch tubes can be flexibly placed to adapt to common rectangular SOP packaging, the shape characteristics of the packaging are fully utilized, and the single-packaging power conversion capability of the highest power in the industry can be realized.

Fig. 3 is a schematic diagram of a package structure 200 of the integrated circuit 10 shown in fig. 1 of the present disclosure. In the embodiment shown in fig. 3, the package structure 200 is an SOP package structure, and includes a first base island 1, a second base island 2, a third base island 3, and a lead frame 4. The first island 1, the second island 2 and the third island 3 are located on a lead frame 4. A first power switch tube 11 (for example, a power switch tube QN 1) is stuck on the first base island 1; a second power switch tube 12 (for example, a power switch tube QN 2) is stuck on the second base island 2; a control chip 13 (e.g. a control circuit in the embodiment shown in fig. 1) is attached to the third base island 1.

Pins 5 are also included around the lead frame 4. The first island 1 and the second island 2 each comprise at least one pin. The pins on the first base island 1 and the second base island 2 are wide in other pins, and are used for heat dissipation. In the embodiment shown in fig. 3, the first island 1 illustrates one pin and the second island 2 illustrates two pins. In other embodiments, the first base island 1 and the second base island 2 may further include a plurality of pins according to heat dissipation requirements. Referring to the embodiment shown in fig. 1 and 3, the pins on the first and second islands 1 and 2 are switch pins, and are coupled to the node SW. That is, the pins on the first and second islands 1 and 2 are electrically connected together outside the package structure 200.

With continued reference to fig. 3, the control terminals of the first power switch 11 and the second power switch 12 will be connected to the control circuit 13 on the third island 3 via bond wires 6, respectively.

Referring back to fig. 1, it will be appreciated by those of ordinary skill in the art that in the BOOST topology of circuitry 100, the slave switching tube is illustrated as a diode D, and in other embodiments, the slave switching tube may be a controllable semiconductor power switching tube device as well as power switching tubes QN1 and QN2.

In addition, it will be appreciated by those skilled in the art that the circuit system 100 with the pfc circuit illustrated in fig. 1 is only illustrative, and that in other high-power applications, applications requiring the power switching tube and the control circuit to be sealed may also use the dual-tube power switching tube with alternate conduction as the main switching tube disclosed in the present application. For example, in the flyback converter, the primary side main power switching tube of the transformer can be replaced by two power switching tubes which are alternately conducted and have double on-resistance as the primary power switching tube, and then the two power switching tubes and the control circuit are in a sealed design.

While the utility model has been described with reference to several exemplary embodiments, it should be understood by those of ordinary skill in the relevant art that the terminology used in the disclosed embodiments is for the purpose of describing particular embodiments only and is not intended to be limiting of the utility model. Furthermore, various modifications in the form and details of the disclosed embodiments may be made by those skilled in the art without departing from the principles and concepts of the utility model, which modifications are within the scope of the utility model as defined in the claims and their equivalents.

Claims

1. An integrated circuit for a switching converter, the integrated circuit comprising:

the first power switch tube is provided with a first end, a second end and a control end;

the second power switch tube is provided with a first end, a second end and a control end, wherein the first end of the first power switch tube is coupled with the first end of the second power switch tube, and the second end of the first power switch tube is coupled with the second end of the second power switch tube; and

the control circuit receives voltage and/or current sampling signals representing the switching converter and generates a first control signal and a second control signal according to the voltage and/or current sampling signals, wherein the first control signal is coupled with a control end of a first power switching tube, the second control signal is coupled with a control end of a second power switching tube, and the first control signal and the second control signal are respectively used for controlling complementary conduction of the first power switching tube and the second power switching tube.

2. The integrated circuit of claim 1, wherein the first power switch and the second power switch are of the same type of power switch.

3. The integrated circuit of claim 1, wherein the switching converter comprises a boost-type power factor correction circuit.

4. The integrated circuit of claim 1, wherein the switching converter comprises a flyback switching converter.

5. An SOP package structure for a switching converter, the SOP package structure comprising:

a lead frame;

the first base island is positioned on the lead frame and used for placing the first power switch tube, and the first base island comprises at least one pin;

the second base island is positioned on the lead frame and used for placing a second power switch tube, the second base island comprises at least one pin, and the at least one pin of the first base island and the at least one pin of the second base island are electrically connected together outside the SOP packaging structure; and

and the third base island is positioned on the lead frame and used for placing a control circuit, wherein the control circuit is used for controlling the first power switch tube and the second power switch tube to conduct complementarily.

6. The SOP package structure of claim 5, wherein the first power switch tube and the second power switch tube have a first end, a second end, and a control end, respectively; the first end of the first power switch tube is led out through at least one pin of the first base island; the first end of the second power switch tube is led out through at least one pin of the second base island; the second end of the first power switch tube and the second end of the second power switch tube are electrically connected through a lead frame.

7. The SOP package structure of claim 6, further comprising a bond wire, the control terminal of the first power switch tube and the control terminal of the second power switch tube being electrically connected to the control circuit by the bond wire, respectively.

8. The SOP package structure of claim 5, wherein the first power switch tube and the second power switch tube are power switch tubes of the same type.

9. The SOP package of claim 5, wherein the switching converter includes a boost-type power factor correction circuit.

10. The SOP package of claim 5, wherein the switching converter includes a flyback switching converter.