CN218888531U

CN218888531U - Coherent optical module

Info

Publication number: CN218888531U
Application number: CN202223245371.5U
Authority: CN
Inventors: 邓德才; 程燕鹏; 梁政福; 徐新发; 王磊; 闫祥福
Original assignee: ZTE Corp
Current assignee: ZTE Corp
Priority date: 2022-12-05
Filing date: 2022-12-05
Publication date: 2023-04-18
Anticipated expiration: 2032-12-05

Abstract

The embodiment of the application discloses a coherent optical module which can inhibit spectral side lobes and realize downward compatibility of high-bandwidth devices. The coherent optical module comprises a DSP, a DAC and a Driver, and further comprises a first filtering unit, wherein the DSP is connected with the first filtering unit through a circuit, the first filtering unit is connected between the DAC and the Driver through a circuit, and the coherent optical module comprises: the first filtering unit is provided with at least two filtering bandwidths matched with different baud rates, and the adopted filtering bandwidth is matched with a first baud rate transmitted by a transmitting side.

Description

Coherent optical module

Technical Field

The application relates to the field of optical communication, in particular to a coherent optical module.

Background

With the development of coherent optical communication, high-bandwidth and high-capacity coherent optical modules are continuously updated, and the high-bandwidth coherent optical modules have a scene of aliasing of adjacent channel frequencies in a low-baud rate code pattern, so that spectral side lobes are generated, and the problem of downward compatibility of high-bandwidth devices is caused.

In order to suppress the spectrum sidelobe problem generated by a low baud rate code pattern in a high bandwidth device, the existing solution mainly increases the up-sampling magnification of a Digital Signal Processor (DSP) of a coherent optical module, so that a spectrum mirror image is far away from a main spectrum, and thus, the spectrum mirror image can be filtered out under the same filtering bandwidth. However, increasing the up-sampling rate of the DSP requires an increase in the sampling rate of a DAC (Digital To Analog Converter), and increasing the sampling rate brings about greater power consumption, and challenges To heat dissipation design and increases long-term use cost.

SUMMERY OF THE UTILITY MODEL

The embodiment of the application aims to provide a coherent optical module which can inhibit spectral side lobes and realize downward compatibility of high-bandwidth devices.

In order to achieve the above purpose, the following technical solutions are adopted in the embodiments of the present application:

in a first aspect, a coherent optical module is provided, which includes a digital signal processor DSP, a digital-to-analog converter DAC, and a Driver chip, and the coherent optical module further includes a first filtering unit, where the DSP is connected to the first filtering unit through a circuit, and the first filtering unit is connected between the DAC and the Driver chip through a circuit, where:

the first filtering unit is provided with at least two filtering bandwidths matched with different baud rates, and the adopted filtering bandwidth is matched with a first baud rate transmitted by the transmitting side.

In a second aspect, a coherent optical module is provided, which includes a digital signal processor DSP, an analog-to-digital converter ADC, and a transimpedance amplifier TIA, and the coherent optical module further includes a second filter unit, where the DSP is connected to the second filter unit through a circuit, and the second filter unit is connected between the ADC and the TIA, where:

the second filtering unit is provided with at least two filtering bandwidths matched with different baud rates, and the adopted filtering bandwidth is matched with the second baud rate transmitted by the receiving side.

The coherent optical module provided by the embodiment of the application can automatically select the matched filtering bandwidth according to different baud rate code patterns transmitted by a transmitting side, thereby filtering harmonic frequency in a high-bandwidth scene, inhibiting spectral side lobes, realizing downward compatibility of high-bandwidth devices, and meeting the application scene of coupling uplink and downlink optical communication; this scheme need not to promote DSP's upsampling multiplying power and can avoid the frequency aliasing to take place, effectively reduces the module consumption, promotes the module performance.

The other coherent optical module provided by the embodiment of the application can automatically select the matched filtering bandwidth according to different baud rate code patterns transmitted by a receiving side, thereby filtering harmonic frequency in a high-bandwidth scene, suppressing spectral side lobes, realizing downward compatibility of high-bandwidth devices, and meeting the application scene of coupling uplink and downlink optical communication.

Drawings

The accompanying drawings, which are included to provide a further understanding of the application and are incorporated in and constitute a part of this application, illustrate embodiment(s) of the application and together with the description serve to explain the application and not to limit the application. In the drawings:

fig. 1 is a schematic diagram illustrating a digital-to-analog conversion process of a DAC according to an embodiment of the present application;

fig. 2 is a schematic structural diagram of a coherent optical module according to an embodiment of the present application;

fig. 3 is a schematic structural diagram of a coherent optical module according to an embodiment of the present application;

fig. 4 is a schematic structural diagram of a first filtering unit in a coherent optical module according to an embodiment of the present application;

fig. 5 is a schematic structural diagram of a coherent optical module according to an embodiment of the present application;

fig. 6 is a schematic structural diagram of a coherent optical module according to an embodiment of the present application;

fig. 7 is a schematic structural diagram of a second filtering unit in a coherent optical module according to an embodiment of the present application;

fig. 8 is a schematic structural diagram of a coherent optical module according to an embodiment of the present application;

fig. 9 is a schematic structural diagram of another coherent optical module according to an embodiment of the present application;

fig. 10 is a schematic structural diagram of another coherent optical module according to an embodiment of the present application;

fig. 11 is a schematic structural diagram of a second filtering unit in another coherent optical module according to an embodiment of the present application.

Detailed Description

In order to make the objects, technical solutions and advantages of the present application more apparent, the technical solutions of the present application will be described in detail and completely with reference to the following specific embodiments of the present application and the accompanying drawings. It should be apparent that the described embodiments are only some of the embodiments of the present application, and not all of the embodiments. All other embodiments obtained by a person of ordinary skill in the art without making creative efforts based on the embodiments in the present application shall fall within the protection scope of this document.

The terms "first," "second," and the like in the description and in the claims of the present application are used for distinguishing between similar elements and not for describing a particular sequential or chronological order, or for indicating or implying relative importance. In addition, "and/or" in the specification and claims means at least one of connected objects, a character "/" generally means that a preceding and succeeding related objects are in an "or" relationship.

The coherent Optical module is a key component in an OTN (Optical Transport Network), and realizes signal generation, signal regeneration, and signal reception by photoelectric conversion. A Modulator and a Demodulator are integrated in the coherent optical module, and a digital signal generated by the DSP is loaded into the Modulator through a DAC and a Driver to generate an optical signal carrying a service. The DAC performs a function of converting digital quantity into analog quantity, and a digital-to-analog conversion process of the DAC is shown in fig. 1.

As described above, in a low baud rate code pattern, the high-bandwidth coherent optical module may have a scene where adjacent channel frequencies are aliased, thereby generating a spectral side lobe, which causes a difficulty in downward compatibility of a high-bandwidth device. The specific reasons are as follows: when a digital signal output by a DSP of a coherent optical module is converted into an analog signal through a DAC, multiple harmonic frequencies can be generated due to the zero-order holding function of the DAC, the harmonic frequencies cannot be filtered under a high-bandwidth scene, and spectral side lobes can be generated additionally after the harmonic frequencies act on a Modulator (Modulator), so that frequency aliasing is caused.

In order to suppress the spectrum sidelobe problem generated by a low-baud-rate code pattern under a high-bandwidth device, the existing solution mainly increases the up-sampling magnification of a DSP to make a spectrum mirror image far away from a main spectrum, so that the spectrum mirror image can be filtered out under the same filtering bandwidth. However, increasing the up-sampling rate of the DSP increases the sampling rate requirement for the DAC, and on the other hand, increasing the sampling rate brings about greater power consumption, and brings a challenge to the heat dissipation design, and at the same time, increases the long-term use cost.

In view of this, embodiments of the present application aim to provide a coherent optical module, which can provide a filter bandwidth matched with a baud rate for a high-speed radio frequency signal generated by a code pattern with a different baud rate, so as to filter a harmonic frequency in a high-bandwidth scene, suppress a spectral side lobe, achieve downward compatibility of a high-bandwidth device, and meet an application scenario of coupling add-drop optical communication.

The embodiment of the application can be applied to a scene that a high-bandwidth coherent optical module is downward compatible, namely a scene that a high-bandwidth device transmits a low-baud rate code pattern, wherein different filtering bandwidths are required to be adopted for filtering out spectrum images in different baud rates in the scene.

As shown in fig. 2, for a coherent optical module 200 provided in an embodiment of the present application, a transmitting side of the coherent optical module 200 generally includes a DSP (digital signal processor) 201, a DAC (digital-to-analog converter) 202, and a Driver 203. In order to provide filtering bandwidths matched with baud rates transmitted by a transmitting side aiming at different baud rate code patterns, so as to filter harmonic frequencies and suppress spectral side lobes, a first filtering unit 205 may be disposed in the coherent optical module 200, the dsp201 is electrically connected to the first filtering unit 205, the first filtering unit 205 is electrically connected between the DAC 202 and the Driver 203, wherein:

the first filtering unit 205 has at least two kinds of filtering bandwidths matched to different baud rates, and the adopted filtering bandwidth is matched to the first baud rate of the transmission side.

Specifically, the DSP201 may generate a first control instruction according to a first baud rate transmitted by the sending side and issue the first control instruction to the first filtering unit 205; based on the first control instruction issued by the DSP201, the first filtering unit 205 has a filtering bandwidth matched with the first baud rate transmitted by the sending side, that is, the first filtering unit 205 adopts a filtering bandwidth matched with the first baud rate transmitted by the sending side, and for convenience of distinction, the filtering bandwidth may be referred to as a first target filtering bandwidth.

In an optional implementation manner, an MCU (Micro-programmed Control Unit) may be built in the DSP201, a first Control instruction is generated by the built-in MCU according to a first baud rate transmitted by the transmitting side, and the first Control instruction is issued to the first filtering Unit 205 to Control the first filtering Unit 205 to switch to a first target filtering bandwidth matched with the first baud rate.

In an optional implementation manner, as shown in fig. 3, the coherent optical module 200 may further include a control unit 204, the control unit 204 is electrically connected between the DSP201 and the first filtering unit 205, and the control unit 204 may be an MCU (micro controller unit) or an FPGA (field Programmable gate Array) chip. The control unit 204 may directly obtain the first baud rate transmitted by the sending side from the DSP201, generate a first control instruction according to the first baud rate transmitted by the sending side, and control the first filtering unit 205 to switch to the first target filtering bandwidth matched with the first baud rate by issuing the first control instruction to the first filtering unit 205.

For example, the first filtering unit may provide filtering bandwidths matched with several commonly used baud rates, for example, the commonly used baud rates are 32G, 64G, 96G, 128G, and the like, and then a filtering bandwidth matched with each commonly used baud rate may be provided.

In this embodiment, the first filtering unit 205 may be implemented by using an automatic switching multi-channel method or a bandwidth adjustable filter method.

In the multi-channel mode of automatic switching, each circuit channel adopts a micro-strip filter with different filtering bandwidths, a proper 3dB bandwidth is designed according to the requirement of a baud rate, and the 3dB bandwidth refers to a frequency range defined when the highest point of power spectral density is reduced to 1/2.

In an alternative implementation, as shown in fig. 4, an alternative structure of the first filtering unit 205 includes a first switch chip 401 and at least two first microstrip filters 402 with fixed filtering bandwidths; the DSP201 is in circuit connection with a first switch chip 401, the first switch chip 401 is in circuit connection between the DAC 202 and at least two first microstrip filters 402, and the at least two first microstrip filters 402 are in circuit connection between the first switch chip 401 and the Driver 203; wherein:

at least two first microstrip filters 402 are in a parallel structure, and different first microstrip filters 402 provide different filtering bandwidths; the first switch chip 401 includes a plurality of switch devices in a parallel structure, the number of the switch devices is greater than or equal to the number of the first microstrip filters 402, each first microstrip filter 402 is connected to a switch device circuit, and the on or off of a circuit channel of the connected first microstrip filter 402 is controlled by the on or off of the switch device.

In the first switch chip 401, when one switch device is turned on, the other switch devices are turned off.

The related functions are introduced as follows:

a first switch chip 401, configured to control the circuit channels of each first microstrip filter 402 to be opened and closed;

a first microstrip filter 402 for providing a filtering bandwidth matched to a specific baud rate; wherein, the baud rates matched by the different first microstrip filters 402 are different;

the DSP201 is specifically configured to generate a first control instruction according to the first baud rate transmitted by the sending side and issue the first control instruction to the first switch chip 401, so as to control the first switch chip 401 to open a circuit channel of the first microstrip filter 402 for providing the first target filter bandwidth, and close circuit channels of other first microstrip filters 402.

In the structure shown in fig. 4, the first control instruction is generated by the DSP201 through a built-in MCU and is issued to the first switch chip 401. It is understood that, in the case that a separate control unit 204 is disposed between the DSP201 and the first filtering unit 205, the control unit 204 may be electrically connected to the first switch chip 401, and the first control instruction is generated by the control unit 204 and issued to the first switch chip 401.

The circuit channels controlled by the first switch chip 401 are not limited to two, and may be a plurality of circuit channels. The basis of the downward compatibility division of the high-bandwidth device is the baud rate, which can be divided into several levels, and the common baud rate is generally adopted, for example, the baud rate can be 32G, 64G, 96G, 128G, and the like.

For example, assuming that a high bandwidth device with a bandwidth of 75G needs to be compatible with 64G baud rate, a matched filter bandwidth needs to be designed to meet the bandwidth requirement corresponding to the baud rate, and meanwhile, high frequency noise is suppressed. The filtering bandwidth can be generally set by using the following formula [1 ]:

F＝B×(1+β)/2

wherein F is the filter bandwidth, B is the baud rate of transmission, and β is the roll-off factor. Assuming a roll-off factor of 0.2, the filter bandwidth needs to be set to 38.4G. That is, in order to be compatible with the 64G baud rate downward, the filter bandwidth of one of the first microstrip filters 401 may be designed to be a filter bandwidth (e.g., 38.4G) that matches a specific baud rate (e.g., 64G). Similarly, in order to be compatible with other commonly used baud rates, such as 32G, 96G, 128G, etc., the filter bandwidths of the other first microstrip filters 401 may be designed to be respectively filter bandwidths (e.g., 19.2G, 57.6G, 76.8G) matching with the specific baud rates (e.g., 32G, 96G, 128G, etc.).

Assuming that the first baud rate of the transmission at the transmitting side is 64g, the dsp201 or the control unit 204 may generate a corresponding first control instruction (e.g. 0101), and by means of the first control instruction, the first switch chip 401 may be controlled to open the switch device connected to the first microstrip filter 401 with the filtering bandwidth of 38.4G, and close the other switch devices.

It should be noted that the number of the first microstrip filters 402 included in the first filtering unit 205 may be flexibly configured according to requirements, and fig. 4 illustrates an example in which the first filtering unit 205 includes four first microstrip filters 402.

In an automatic switching multi-channel mode, through designing microstrip filters with various bandwidths, different baud rates can be switched to different microstrip filters by a switch chip, and therefore compatible use of high and low baud rate code patterns of a high-bandwidth coherent optical module can be achieved.

The mode of the bandwidth-adjustable filter can also be called as a single-channel mode, and the switching control of the filtering bandwidth in the circuit channel is realized by automatically adjusting the electric device of the microstrip filter. The microstrip filter with adjustable filter bandwidth can replace a switch chip and a combination of a plurality of microstrip filters, and the filter bandwidth of the microstrip filter is controlled by the DSP201 or the control unit 204, so that the same technical effect is realized.

In an alternative implementation manner, the first filtering unit 205 may be a second microstrip filter 403 with adjustable filtering bandwidth; the DSP201 or the control unit 204 is connected to the second microstrip filter 403 circuit, and the second microstrip filter 403 circuit is connected between the DAC 202 and the Driver 203. Wherein:

the DSP201 or the control module 204 is specifically configured to generate a first control instruction according to the first baud rate transmitted by the sending side and send the first control instruction to the second microstrip filter 403, so as to adjust the filter bandwidth provided by the second microstrip filter 403 to the first target filter bandwidth by adjusting an electric device of the second microstrip filter 403.

In the embodiment, the microstrip filter with the adjustable filter bandwidth is designed for different baud rate code patterns, and can be compatible with high and low baud rate code patterns to filter harmonic frequencies, so that spectral side lobes are suppressed.

Referring to fig. 5, the receiving side of the coherent optical module 200 generally includes a DSP (digital signal processor) 201, an ADC (analog-to-digital converter) 206 and a TIA (transimpedance amplifier) 207. In an alternative implementation manner, in order to further improve module performance, a second filtering unit 208 may be further disposed in the coherent optical module 200, the dsp201 is electrically connected to the second filtering unit 208, and the second filtering unit 208 is electrically connected between the ADC 206 and the TIA 207, where:

the second filtering unit 208 has at least two filtering bandwidths matched with different baud rates, and the adopted filtering bandwidth is matched with the second baud rate transmitted by the receiving side.

Specifically, the DSP201 may generate a second control instruction according to a second baud rate transmitted by the receiving side, and issue the second control instruction to the second filtering unit 208; the second filtering unit 208 is configured to match a filtering bandwidth with a second baud rate transmitted by the receiving side based on a second control instruction issued by the DSP 201; that is, the second filtering unit 208 adopts a filtering bandwidth matched with the second baud rate of the receiving-side transmission, and for convenience of distinction, it may be referred to as a second target filtering bandwidth.

The DSP201 or a board carrying the coherent optical module 200 may calculate a second baud rate transmitted by the receiving side according to the received signal.

In an optional implementation manner, the DSP201 may generate a second control instruction according to a second baud rate transmitted by the receiving side through a built-in MCU, and control the second filtering unit 208 to switch to a second target filtering bandwidth matched with the second baud rate by issuing the second control instruction to the second filtering unit 208.

In an alternative implementation manner, as shown in fig. 6, the coherent optical module 200 may further include a control unit 204, where the control unit 204 is electrically connected between the DSP201 and the first filtering unit 205, and the control unit 204 is electrically connected between the DSP201 and the second filtering unit 208. The control unit 204 may obtain a second baud rate transmitted by the receiving side from the DSP201 or the board bearing the coherent optical module 200, generate a second control instruction according to the second baud rate transmitted by the receiving side, and control the second filtering unit 208 to switch to a second target filtering bandwidth matched with the second baud rate by issuing the second control instruction to the second filtering unit 208. For example, the second filtering unit may also provide filtering bandwidths matched with several commonly used baud rates, for example, the commonly used baud rates are 32G, 64G, 96G, 128G, and the like, and then a filtering bandwidth matched with each commonly used baud rate may be provided.

It is understood that in the case of the MCU built in the DSP201, the control unit 204 may be only electrically connected between the DSP201 and the first filtering unit 205, while the DSP201 is directly electrically connected to the second filtering unit 208; alternatively, the control unit 204 may be only electrically connected between the DSP201 and the second filtering unit 208, while the DSP201 is directly electrically connected to the first filtering unit 205.

In this embodiment, the second filtering unit 208 may be implemented in a multi-channel manner or a bandwidth-adjustable filter manner with automatic switching.

In an alternative implementation manner, as shown in fig. 7, an alternative structure of the second filtering unit 208 includes a second switch chip 701 and at least two third microstrip filters 702 with fixed filtering bandwidths; the DSP201 is in circuit connection with the second switch chip 701, the second switch chip 701 is in circuit connection between the ADC 206 and the at least two third microstrip filters 702, and the at least two third microstrip filters 702 are in circuit connection between the second switch chip 701 and the TIA 207; wherein:

at least two third microstrip filters 702 are in a parallel structure, and different third microstrip filters 702 provide different filtering bandwidths; the second switch chip 701 includes a plurality of switch devices in a parallel structure, the number of the switch devices is greater than or equal to the number of the third microstrip filters 702, each third microstrip filter 702 is connected to a switch device circuit, and the on or off of a circuit channel of the connected third microstrip filter 702 is controlled by the on or off of the switch device.

In the second switch chip 701, when one switch device is turned on, the other switch devices are turned off.

The functions of the relevant modules are introduced as follows:

a second switch chip 701, configured to control the circuit channels of each third microstrip filter 702 to be opened and closed;

a third microstrip filter 702 for providing a filtering bandwidth matched to a specific baud rate; the baud rates matched by the different third microstrip filters 702 are different;

the DSP201 is specifically configured to generate a second control instruction according to a second baud rate transmitted by the receiving side and send the second control instruction to the second switch chip 701, so as to control the second switch chip 701 to open a circuit channel of the third microstrip filter 702 for providing the second target filtering bandwidth, and close circuit channels of other third microstrip filters 702.

In the structure shown in fig. 7, the second control instruction is generated by the DSP201 through a built-in MCU and issued to the second switch chip 701. It is understood that, in the case that an independent control unit 204 is disposed between the DSP201 and the second filtering unit 208, the control unit 204 may be electrically connected to the second switch chip 701, and the second control instruction is generated by the control unit 204 and issued to the second switch chip 701.

The circuit paths controlled by the second switch chip 701 are not limited to two, and may be a plurality of circuit paths. The backward compatibility of the high-bandwidth device is based on the baud rate, which can be divided into several levels, and the baud rate generally adopts the commonly used baud rate, for example, the baud rate can adopt 32G, 64G, 96G, 128G, etc., and the filter bandwidth respectively matched with each baud rate can be 19.2G, 38.4G, 57.6G, 76.8G, etc.

It should be noted that the number of the third microstrip filters 702 included in the second filtering unit 208 can be flexibly configured according to requirements, and fig. 7 illustrates that the second filtering unit 208 includes four third microstrip filters 702.

In an alternative implementation manner, the second filtering unit 208 may be a fourth microstrip filter 703 with adjustable filtering bandwidth; the DSP201 or the control unit 204 is in circuit connection with a fourth microstrip filter 703, which fourth microstrip filter 703 is in circuit connection between the ADC 206 and the TIA 207. Wherein:

the DSP201 or the control module 204 is specifically configured to generate a second control instruction according to the second baud rate transmitted by the receiving side and send the second control instruction to the fourth microstrip filter 703, so as to adjust the filter bandwidth provided by the fourth microstrip filter 703 to a second target filter bandwidth by adjusting an electric device of the fourth microstrip filter 703.

In an alternative implementation manner, the filter bandwidth of the Driver 203 is adjustable, and the DSP201 or the control unit 204 may be connected to the Driver 203 circuit, where the filter bandwidth adopted by the Driver 203 is matched to the first baud rate of the transmission at the transmitting side.

In an optional implementation manner, the filtering bandwidth of the TIA 207 is adjustable, and the DSP201 or the control unit 204 may be connected to the TIA 207 circuit, where the filtering bandwidth adopted by the TIA 207 is matched to the second baud rate of the transmission at the receiving side.

Specifically, the Driver 203 matches the filtering bandwidth with a first baud rate transmitted by the transmitting side based on a first control instruction issued by the DSP201 or the control unit 204; based on a second control instruction issued by the DSP201 or the control unit 204, the TIA 207 matches the filter bandwidth to a second baud rate transmitted by the receiving side.

That is to say, the DSP201 or the control unit 204 is further configured to, in a case that a filter bandwidth of the Driver 203 is adjustable, control the Driver 203 to switch to the first target filter bandwidth by issuing a first control command to the Driver 203, and/or, in a case that a filter bandwidth of the TIA 207 is adjustable, control the TIA 207 to switch to the second target filter bandwidth by issuing a first control command to the TIA 207.

Similarly, for the modulator and mixer with adjustable filtering bandwidth, the switching can be automatically controlled by the DSP201 or the control unit 204 based on the baud rate of the transmission.

The corresponding filter bandwidth can be automatically matched for different baud rates under the control of devices such as an MCU (microprogrammed control unit) arranged in the DSP, an MCU arranged independently, or an FPGA (field programmable gate array) chip. Specifically, circuit channels with various filter bandwidths can be adopted between the DAC and the Driver and between the ADC and the TIA for the coherent optical module to be automatically switched through a switch chip, or a single circuit channel with adjustable filter bandwidth is adopted to be automatically switched through a control unit. Furthermore, the filter bandwidth of a Driver (driving chip) or a TIA (transimpedance amplifier) can be automatically adjusted through the control of devices such as a built-in MCU, an independently arranged MCU, or an FPGA chip in the DSP.

As shown in fig. 8, an optional structure of a coherent optical module capable of suppressing a spectral side lobe is provided for an embodiment of the present application. The coherent optical module generally includes a DSP (digital signal processor), a DAC (digital-to-analog converter), a Driver (Driver chip), a Modulator, an ADC (analog-to-digital converter), a TIA (transimpedance amplifier), and a 90 ° Hybrid (90 degree mixer).

At a transmitting side (TX), after a digital signal output by the DSP is converted into an analog signal by a DAC, a circuit channel of a suitable microstrip filter (Fliter 1 or Fliter 2) is selected by a high-speed switch, which is controlled by an MCU (micro control unit), and a switch state is switched according to a bandwidth requirement of a baud rate (for convenience of distinction, referred to as a first baud rate) transmitted by the transmitting side. Meanwhile, the MCU can selectively and automatically control the filtering bandwidth of the Driver, secondary optimization of channel filtering is realized, and finally the analog signal is loaded onto a Modulator to realize modulation of a carrier.

On a receiving side (RX), an analog signal output by a 90-degree Hybrid (90-degree mixer) is amplified by a TIA, passes through a filtering channel, is subjected to analog-to-digital conversion by an ADC (analog-to-digital converter) and then is input to the DSP for digital algorithm processing, a code pattern and a baud rate which are solved by the DSP are fed back to an MCU (microprogrammed control unit), a high-speed switch is controlled by the MCU, and the MCU selects a circuit channel of a proper micro-strip filter (Fliter 1 or Fliter 2) according to the bandwidth requirement switching state of the baud rate (called as a second baud rate for convenience of distinguishing) transmitted by the receiving side. Meanwhile, the MCU can selectively and automatically control the filtering bandwidth of the TIA (transimpedance amplifier).

In this embodiment, the MCU may be used to control the high-speed switch, driver, TIA, etc., or the FPGA or DSP (embedded MCU) may be used to control these devices, or only one of the high-speed switch, driver, or TIA may be controlled individually.

The coherent optical module provided by the embodiment of the application can automatically select the matched filtering bandwidth according to different baud rate code patterns transmitted by a transmitting side, thereby filtering harmonic frequency in a high-bandwidth scene, inhibiting spectral side lobes, realizing downward compatibility of high-bandwidth devices, and meeting the application scene of coupling uplink and downlink optical communication; this scheme need not to promote DSP's the rate of upsampling and can avoid the frequency aliasing to take place, effectively reduces the module consumption, promotes the module performance.

Under the scene of transmitting a low-baud rate code pattern in a high-bandwidth coherent optical module, for example, when an 800G coherent optical module is used for transmitting 100G services, by using the coherent optical module provided by the embodiment of the present application, the frequency aliasing effect can be avoided only by switching a circuit channel of a filter unit or adjusting the filter bandwidth without replacing the module or increasing the up-sampling magnification of a DSP, so as to improve the flexibility of the use of the coherent module.

The coherent optical module provided by the embodiment of the application can realize the compatibility of a high-bandwidth device under a low-baud rate code pattern, avoid the occurrence of a frequency aliasing effect, widen the application scene of the module, save the research and development cost of the coherent optical module, and simultaneously reduce the power consumption of the module.

Based on the same technical concept, as shown in fig. 9, another coherent optical module 900 is provided in the embodiment of the present application, and a receiving side of the coherent optical module 900 generally includes a DSP (digital signal processor) 201, an ADC (analog-to-digital converter) 206, and a TIA (transimpedance amplifier) 207. In order to provide a filtering bandwidth matched with the baud rate transmitted by the receiving side aiming at modulation code patterns with different baud rates, so as to filter harmonic frequency and suppress spectral side lobes, a second filtering unit 208 may be arranged in the coherent optical module 900, the dsp201 is electrically connected to the second filtering unit 208, the second filtering unit 208 is electrically connected between the ADC 206 and the TIA 207, wherein:

Specifically, the DSP201 may generate a second control instruction according to a second baud rate transmitted by the receiving side, and issue the second control instruction to the second filtering unit 208; the second filtering unit 208 is configured to match a filtering bandwidth with a second baud rate transmitted by the receiving side based on a second control instruction issued by the DSP 201; that is, the second filtering unit 208 adopts a filtering bandwidth matched with the second baud rate of the receiving-side transmission, and for convenience of distinction, may be referred to as a second target filtering bandwidth.

The DSP201 or the board carrying the coherent optical module 900 may calculate a second baud rate transmitted by the receiving side according to the received signal.

In an optional implementation manner, an MCU may be built in the DSP201, the built-in MCU generates a second control instruction according to a second baud rate transmitted by the receiving side, and the second control instruction is issued to the second filtering unit 208 to control the second filtering unit 208 to switch to a second target filtering bandwidth matched with the second baud rate.

In an alternative implementation manner, as shown in fig. 10, the coherent optical module 900 may further include a control unit 204, and the control unit 204 is electrically connected between the DSP201 and the second filtering unit 208. The control unit 204 may obtain a second baud rate transmitted by the receiving side from the DSP201 or the board carrying the coherent optical module 900, generate a second control instruction according to the second baud rate transmitted by the receiving side, and control the second filtering unit 208 to switch to a second target filtering bandwidth matched with the second baud rate by issuing the second control instruction to the second filtering unit 208. For example, a filter bandwidth matching several commonly used baud rates may be provided, for example, the commonly used baud rates are 32G, 64G, 96G, 128G, etc., respectively, and a filter bandwidth matching each commonly used baud rate may be provided.

In an alternative implementation, as shown in fig. 11, an alternative structure of the second filtering unit 208 includes a second switch chip 701 and at least two third microstrip filters 702 with fixed filtering bandwidths; the DSP201 is in circuit connection with the second switch chip 701, the second switch chip 701 is in circuit connection between the ADC 206 and the at least two third microstrip filters 702, and the at least two third microstrip filters 702 are in circuit connection between the second switch chip 701 and the TIA 207; wherein:

The functions of the relevant modules are introduced as follows:

the DSP201 is specifically configured to generate a second control instruction according to a second baud rate transmitted by the receiving side and issue the second control instruction to the second switch chip 701, so as to control the second switch chip 701 to open a circuit channel of the third microstrip filter 702 for providing the second target filter bandwidth, and close circuit channels of other third microstrip filters 702.

In the structure shown in fig. 11, the second control instruction is generated by the DSP201 through a built-in MCU and issued to the second switch chip 701. It is understood that, in the case that an independent control unit 204 is disposed between the DSP201 and the second filtering unit 208, the control unit 204 may be electrically connected to the second switch chip 701, and the second control instruction is generated by the control unit 204 and issued to the second switch chip 701.

the DSP201 or the control module 204 is specifically configured to send the second baud rate transmitted by the receiving side to the fourth microstrip filter 703, so as to adjust the filter bandwidth provided by the fourth microstrip filter 703 to a second target filter bandwidth by adjusting an electrical device of the fourth microstrip filter 703.

According to the other coherent optical module provided by the embodiment of the application, the matched filter bandwidth is automatically selected by acquiring different baud rates transmitted by the receiving side, so that the harmonic frequency in a high-bandwidth scene is filtered, the spectral side lobe is suppressed, the downward compatibility of a high-bandwidth device is realized, and the application scene of coupling the optical communication of an upper path and a lower path is met.

It is understood that the same or similar parts in the above embodiments may be mutually referred to, and the same or similar parts in other embodiments may be referred to for the content which is not described in detail in some embodiments.

In the description of the present specification, reference to the description of "one embodiment," "some embodiments," "an example," "a specific example," or "some examples" or the like means that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the present invention. In this specification, the schematic representations of the terms used above do not necessarily refer to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.

Although embodiments of the present invention have been shown and described, it is understood that the above embodiments are exemplary and should not be construed as limiting the present invention, and that variations, modifications, substitutions and alterations can be made to the above embodiments by those of ordinary skill in the art without departing from the scope of the present invention.

Claims

1. A coherent optical module, comprising a digital signal processor DSP, a digital-to-analog converter DAC and a Driver chip, wherein the coherent optical module further comprises a first filter unit, the DSP is connected to the first filter unit by a circuit, the first filter unit is connected between the DAC and the Driver chip by a circuit, wherein:

2. The coherent optical module of claim 1, wherein the first filtering unit comprises a first switch chip and at least two first microstrip filters with fixed filtering bandwidths; the DSP is connected with the first switch chip circuit, the first switch chip circuit is connected between the DAC and the at least two first microstrip filters, and the at least two first microstrip filter circuits are connected between the first switch chip and the Driver; wherein:

the at least two first microstrip filters are of a parallel structure, and different first microstrip filters provide different filtering bandwidths; the first switch chip comprises a plurality of switch devices in a parallel structure, and the number of the switch devices is greater than or equal to that of the first microstrip filters; each first microstrip filter is respectively connected with one switching device circuit, and the on or off of the circuit channel of the connected first microstrip filter is controlled by the on or off of the switching device.

3. The coherent optical module of claim 1, wherein the first filter unit is a second microstrip filter with adjustable filter bandwidth; the DSP is connected with the second microstrip filter circuit, and the second microstrip filter circuit is connected between the DAC and the Driver.

4. The coherent optical module of claim 1, further comprising an analog-to-digital converter (ADC) and a transimpedance amplifier (TIA), wherein the coherent optical module further comprises a second filter unit, wherein the DSP is in circuit connection with the second filter unit, and wherein the second filter unit is in circuit connection between the ADC and the TIA, and wherein:

5. The coherent optical module of claim 4, wherein the second filtering unit comprises a second switch chip and at least two third microstrip filters with fixed filtering bandwidths; the DSP is connected with the second switch chip circuit, the second switch chip circuit is connected between the ADC and the at least two third microstrip filters, and the at least two third microstrip filter circuits are connected between the second switch chip and the TIA; wherein, the first and the second end of the pipe are connected with each other,

the at least two third microstrip filters are of a parallel structure, and different third microstrip filters provide different filtering bandwidths; the second switch chip comprises a plurality of switch devices in a parallel structure, the number of the switch devices is greater than or equal to that of the third microstrip filters, each third microstrip filter is respectively connected with one switch device circuit, and the circuit channels of the connected third microstrip filters are controlled to be connected or disconnected by opening or closing the switch devices.

6. The coherent optical module of claim 4, wherein the second filter unit is a fourth microstrip filter with adjustable filter bandwidth; the DSP is connected with the fourth microstrip filter circuit, and the fourth microstrip filter circuit is connected between the ADC and the TIA.

7. The coherent optical module of claim 4, wherein the filter bandwidth of the Driver is adjustable, the DSP is connected to the Driver circuit, and the filter bandwidth adopted by the Driver is matched to the first baud rate of the transmission at the transmitting side; and/or the presence of a gas in the gas,

the filter bandwidth of the TIA is adjustable, the DSP is connected with the TIA circuit, and the filter bandwidth adopted by the TIA is matched with a second baud rate transmitted by a receiving side.

8. The coherent optical module of claim 4, further comprising a control unit, wherein the control unit is electrically connected between the DSP and the first filtering unit, and/or wherein the control unit is electrically connected between the DSP and the second filtering unit; the control unit is a micro control unit MCU or a field programmable gate array FPGA chip.

9. A coherent optical module comprises a Digital Signal Processor (DSP), an analog-to-digital converter (ADC) and a transimpedance amplifier (TIA), and is characterized by further comprising a second filter unit, wherein the DSP is connected with the second filter unit through a circuit, the second filter unit is connected between the ADC and the TIA through a circuit, and the Digital Signal Processor (DSP) is connected with the TIA through a circuit, wherein:

10. The coherent optical module of claim 9, wherein the second filtering unit comprises a second switch chip and at least two third microstrip filters with fixed filtering bandwidths; the DSP is connected with the second switch chip circuit, the second switch chip circuit is connected between the ADC and the at least two third microstrip filters, and the at least two third microstrip filter circuits are connected between the second switch chip and the TIA; wherein the content of the first and second substances,

the at least two third microstrip filters are of a parallel structure, and different third microstrip filters provide different filtering bandwidths; the second switch chip comprises a plurality of switch devices in a parallel structure, the number of the switch devices is larger than or equal to that of the third microstrip filters, each third microstrip filter is connected with one switch device circuit, and the on or off of a circuit channel of the connected third microstrip filters is controlled through the on or off of the switch devices.