CN218868282U - Multi-adaptive LVDS display screen signal transmission circuit - Google Patents
Multi-adaptive LVDS display screen signal transmission circuit Download PDFInfo
- Publication number
- CN218868282U CN218868282U CN202223123712.1U CN202223123712U CN218868282U CN 218868282 U CN218868282 U CN 218868282U CN 202223123712 U CN202223123712 U CN 202223123712U CN 218868282 U CN218868282 U CN 218868282U
- Authority
- CN
- China
- Prior art keywords
- lvds
- signal
- video stream
- display screen
- serial
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Images
Classifications
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
Landscapes
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
Abstract
The utility model discloses a many adaptations LVDS display screen signal transmission circuit, include: the signal source outputs LVDS video stream signals; the LVDS source end receives the LVDS video stream signal and carries out serial processing on the LVDS video stream signal to output a serial signal; the LVDS terminal receives the serial signals, carries out deserializing processing on the serial signals and restores the serial signals into LVDS video stream signals; the transmission link transmits the serial signal output by the LVDS source end to the LVDS terminal; and the LVDS display screen receives the LVDS video stream signal and displays corresponding content on the screen. The utility model discloses the suitability is strong, and system architecture does not change along with the change of signal source output video signal mode.
Description
Technical Field
The utility model belongs to the technical field of video signal transmission, specifically, relate to a many adaptations LVDS display screen signal transmission circuit.
Background
Video transmission technology is rapidly developed, and real-time transmission of the video transmission technology causes challenges to traditional communication modes due to the huge data volume. With the development of LVDS (Low Voltage Differential Signal) technology, this problem has been gradually solved. However, as the connection distance of the display screen of the terminal increases, the LVDS technology has poor anti-interference and anti-attenuation characteristics and cannot transmit in a long distance, which is a pain point of its development.
SUMMERY OF THE UTILITY MODEL
In order to solve the technical problem, the utility model provides a many adaptations LVDS display screen signal transmission circuit.
The technical scheme of the utility model as follows:
a kind of multi-adaptation LVDS display screen signal transmission circuit, including:
the signal source outputs an LVDS video stream signal;
the LVDS source end receives the LVDS video stream signal and carries out serial processing on the LVDS video stream signal to output a serial signal;
the LVDS terminal receives the serial signals, carries out deserializing processing on the serial signals and restores the serial signals into LVDS video stream signals;
the transmission link transmits the serial signals output by the LVDS source end to the LVDS terminal;
and the LVDS display screen receives the LVDS video stream signal and displays corresponding content on the screen.
Furthermore, the signal source is a system on chip or a host device with an image processor, and directly outputs the LVDS video stream signal.
Further, the signal source includes a system on chip or a host device with an image processor, which outputs a non-LVDS format video stream signal, and a format conversion circuit, which converts the non-LVDS format video stream signal into an LVDS video stream signal.
Furthermore, the transmission Link adopts an FPD-Link III high-speed serial bus.
Further, the LVDS video stream signals include video signals, audio signals, control signals and data signals.
Furthermore, the LVDS source end adopts a DS90UB947 chip, and the LVDS terminal adopts a DS90UB948 chip.
Furthermore, the power supply module is further included, the power supply module adopts an XL1507 chip to supply power within a wide range of 4.5V to 40V.
Furthermore, the backlight driving module is also included, and the backlight driving module adopts a MAX25511 chip.
Compared with the prior technical scheme, the implementation case has the following advantages:
1. the adaptability is strong, and the system structure does not change along with the change of the mode of outputting the video signal by the signal source;
2. the system has strong expansibility, and all video equipment with LVDS interfaces can use the system scheme;
3. by adopting a separated design, the LVDS source end and the terminal are connected through an HSD (High Speed Data) line, and ultra-long distance transmission can be realized;
4. the FPD-LINK III scheme is adopted for data transmission, so that the cost is low, and the anti-interference and anti-attenuation effects are achieved.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings that are required to be used in the embodiments will be briefly described below, it should be understood that the following drawings only illustrate some embodiments of the present invention, and therefore should not be considered as limiting the scope, and for those skilled in the art, other related drawings can be obtained according to the drawings without inventive efforts.
FIG. 1 is a schematic structural view of the present invention;
FIG. 2 is a block diagram of an embodiment of the present invention;
FIG. 3 is a block diagram of another embodiment of the present invention;
fig. 4 is a partial circuit diagram of an embodiment of an LVDS source according to the present invention;
fig. 5 is a partial circuit diagram of an embodiment of an LVDS terminal according to the present invention;
fig. 6 is a circuit diagram of an embodiment of a power module according to the present invention;
fig. 7 is a circuit diagram of an embodiment of the backlight driving module of the present invention.
Detailed Description
Preferred embodiments of the present invention will be described in detail below with reference to the accompanying drawings.
The technical solutions in the embodiments of the present invention will be described clearly and completely with reference to the accompanying drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by a person skilled in the art without making creative efforts belong to the protection scope of the present invention.
The expression "comprising" in this text is an expression of "open" which merely means that there are corresponding components or steps and should not be interpreted as excluding additional components or steps.
In order to achieve the purpose of the utility model, a many adaptations LVDS display screen signal transmission circuit, as shown in FIG. 1, include:
the signal source outputs LVDS video stream signals;
the LVDS source end receives the LVDS video stream signal, carries out serial processing on the LVDS video stream signal and outputs a serial signal;
the LVDS terminal receives the serial signal, carries out deserialization processing on the serial signal and restores the serial signal into an LVDS video stream signal;
the transmission link transmits the serial signal output by the LVDS source end to the LVDS terminal;
and the LVDS display screen receives the LVDS video stream signal and displays corresponding content on the screen.
In one embodiment, as shown in fig. 2, the signal source is preferably a system-on-chip or a host device having an image processor that directly outputs the LVDS video stream signal.
In this embodiment, the SOC (system-on-chip) system or the image processor has a function of directly outputting the LVDS video stream signal, and can directly output the LVDS video stream signal to be received by the LVDS source.
In one embodiment, as shown in fig. 3, the signal source includes a system-on-chip or a host device having an image processor that outputs a non-LVDS format video stream signal and a format conversion circuit that converts the non-LVDS format video stream signal into an LVDS video stream signal.
In this embodiment, the SOC (system-on-chip) system or the image processor does not have a function of directly outputting the LVDS video stream signals, and at this time, the format conversion circuit is required to convert the non-LVDS format video stream signals into the LVDS video stream signals, and then the LVDS video stream signals are received by the LVDS source.
Furthermore, the non-LVDS formats include MIPI and HDMI, and the format conversion circuit includes chips such as LT8912 and ICN6202 adapted to MIPI to LVDS, and chips such as ADV7613 and LT8619C adapted to HDMI to LVDS.
In one embodiment, the transmission Link employs an FPD-Link III high speed serial bus.
In this embodiment, the FPD-Link III high speed serial bus greatly reduces electromagnetic interference through low voltage differential signals, data permuting, random generation, and the like.
Furthermore, the FPD-Link III high-speed serial bus comprises an FPD-Link III interface and a twisted pair or a coaxial cable, and is low in cost and high in interference resistance and attenuation resistance.
In one embodiment, the LVDS video stream signals include video signals, audio signals, control signals and data signals. The deserializing process includes separating a video signal, an audio signal, a control signal and a data signal from the serial signal; the video signal and the audio signal are transmitted to the LVDS display screen through the LVDS interface and display corresponding contents on the LVDS screen, the control signal controls the operation of the unit to which the video signal belongs through high and low levels, and the data signal is transmitted to the touch module of the LVDS display screen through the I2C interface.
In one embodiment, the backlight driving module is further included, receives the control signal, and then starts the light source in response, and the backlight driving module adopts a MAX25511 chip.
In some embodiments, the LVDS source employs a DS90UB947 chip, and the LVDS terminal employs a DS90UB948 chip.
FIGS. 1-3 show the overall schematic of the system in logical order from left to right: the signal source comprises a Graphics Processor (image Processor) or a system on a SOC (system on a chip) and can be additionally provided with a format conversion circuit, finally, the signal source outputs an LVDS video stream signal to a chip DS90UB947 sequencer (serializer) through an LVDS interface, the DS90UB947 chip transmits the signal to a chip DS90UB948 Deserializer after serial encryption, and the DS90UB948 chip deserializes the serial data signal to restore the serial data signal to an original LVDS video stream signal and transmits the video stream to an LVDS Display (Display) through the LVDS interface.
In one embodiment, the SOC may directly output LVDS video stream signals, which are of the type IMX8MP.
In one embodiment, the power modules of the LVDS source and the LVDS terminal adopt filter capacitors with different capacitance values for purification; differential lines with impedance of 100 omega are used in LVDS partial lines, and equal-length and equal-distance processing is carried out; the independent controllability of an LVDS source end and an LVDS terminal is realized; the I2C interface adopts a transparent transmission mode to completely transmit data signals of the LVDS display screen.
In one embodiment, as shown in fig. 5, the power module adopts an XL1507 chip, so that the wide-range power consumption requirement of 4.5V-40V is met, and the 5 th pin of the XL1507 chip is used for controlling the output of the power supply, so that remote control is realized.
In one embodiment, as shown in fig. 5, the output of the power module can be controlled by pin5 of the XL1507 chip to realize remote control of the switch; the backlight driving part of the LVDS adopts a Meixin led driver max25511, a chip enabling part and a PWM control part pin of the LVDS are connected to a GPIO part of a DS90UB948 chip, remote control can be achieved through GPIO transparent transmission of the DS90UB947 and the DS90UB948, meanwhile, signals transmitted through the GPIO transparent transmission are integrated in an FPD-LINK III LINK, and the FPD-LINK III LINK has the characteristics of interference resistance and attenuation resistance.
Fig. 6 and 7 are partial circuit designs of TI947 and TI948, respectively, where the source end of the chip uses filter capacitors with different capacitance values to perform purification processing on the output power; differential lines with impedance of 100 omega are used in LVDS partial lines, and equal-length and equal-distance processing is carried out; the GPIO part is multiplexed into a functional pin for GPIO transparent transmission, so that the independent controllability of an LVDS source end and a terminal is realized; the IIC interface part adopts a transparent transmission mode, so that the touch signals of the display screen part are perfectly transmitted.
Compared with the prior technical scheme, the implementation case has the following advantages:
1. the adaptability is strong, and the system structure does not change along with the change of the mode of outputting the video signal by the SOC end;
2. the system has strong expansibility, and all video output devices with LVDS interfaces can use the system scheme;
3. by adopting a separated design, the LVDS source end and the terminal are connected through an HSD (High Speed Data) line, and ultra-long distance transmission can be realized;
4. the FPD-LINK III scheme is adopted for data transmission, so that the cost is low, and the anti-interference and anti-attenuation effects are achieved.
The basic principles and main features of the present invention and the advantages of the present invention have been shown and described above, and it should be understood by those skilled in the art that the present invention is not limited by the above embodiments, which are only illustrative, but also various changes and modifications may be made without departing from the spirit and scope of the present invention, which fall within the scope of the present invention as claimed, which is defined by the appended claims and their equivalents.
Claims (8)
1. A kind of many adapts LVDS display screen signal transmission circuit, characterized by, comprising:
the signal source outputs LVDS video stream signals;
the LVDS source end receives the LVDS video stream signal and carries out serial processing on the LVDS video stream signal to output a serial signal;
the LVDS terminal receives the serial signal, carries out deserialization processing on the serial signal and restores the serial signal into an LVDS video stream signal;
the transmission link transmits the serial signal output by the LVDS source end to the LVDS terminal;
and the LVDS display screen receives the LVDS video stream signal and displays corresponding content on the screen.
2. The multi-adaptive LVDS display screen signal transmission circuit according to claim 1, wherein the signal source is a system on chip or a host device with an image processor, and directly outputs an LVDS video stream signal.
3. The multi-adaptive LVDS display screen signal transmission circuit according to claim 1, wherein the signal source comprises a system-on-chip or a host device with an image processor outputting a non-LVDS format video stream signal and a format conversion circuit converting the non-LVDS format video stream signal into an LVDS video stream signal.
4. The multi-adaptive LVDS display screen signal transmission circuit according to claim 1, wherein the transmission link employs an FPD-LinkIII high speed serial bus.
5. The multi-adaptive LVDS display screen signal transmission circuit according to claim 1, wherein the LVDS video stream signals include video signals, audio signals, control signals and data signals.
6. The multi-adaptive LVDS display screen signal transmission circuit according to claim 1, wherein the LVDS source end adopts a DS90UB947 chip, and the LVDS terminal adopts a DS90UB948 chip.
7. The multi-adaptive LVDS display screen signal transmission circuit according to claim 1, further comprising a power supply module, wherein the power supply module adopts an XL1507 chip and supplies power in a wide range of 4.5V to 40V.
8. The multi-adaptive LVDS display screen signal transmission circuit according to claim 1, further comprising a backlight driving module, wherein the backlight driving module adopts a MAX25511 chip.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202223123712.1U CN218868282U (en) | 2022-11-24 | 2022-11-24 | Multi-adaptive LVDS display screen signal transmission circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202223123712.1U CN218868282U (en) | 2022-11-24 | 2022-11-24 | Multi-adaptive LVDS display screen signal transmission circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN218868282U true CN218868282U (en) | 2023-04-14 |
Family
ID=87350891
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202223123712.1U Active CN218868282U (en) | 2022-11-24 | 2022-11-24 | Multi-adaptive LVDS display screen signal transmission circuit |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN218868282U (en) |
-
2022
- 2022-11-24 CN CN202223123712.1U patent/CN218868282U/en active Active
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN101334762B (en) | Data-transmission system for computer | |
| CN103198807A (en) | Display signal processing system and circuit board and liquid crystal display device | |
| CN112187362B (en) | Photoelectric transmission board card compatible with various communication interfaces | |
| CN201655249U (en) | Integrated audio/video controller for LED display | |
| CN112055215A (en) | Optical fiber video processing method based on FPGA | |
| CN218868282U (en) | Multi-adaptive LVDS display screen signal transmission circuit | |
| CN105118409A (en) | FPGA-Based V-BY-ONE codec system and method | |
| CN205068361U (en) | Computer extender | |
| CN219716106U (en) | Independent display and integrated display switching circuit and terminal equipment | |
| CN215187068U (en) | FPD-Link-based long-distance screen display circuit | |
| CN112367480A (en) | Multi-screen display system based on single processor | |
| US20170220069A1 (en) | Docking apparatus and control method thereof | |
| CN112347016A (en) | Dual-video input switching device and control method of tablet computer | |
| CN210478401U (en) | Electronic device | |
| CN113259679A (en) | Image processing system for realizing image compression based on domestic DSP chip | |
| CN102819284B (en) | Motherboard-shared display system | |
| CN116567161B (en) | Graphic display terminal | |
| CN206224827U (en) | A kind of passive electronic blackboard device based on single cable interface | |
| CN217486495U (en) | MIPI signal isolation structure and MIPI signal isolating device | |
| Li et al. | Design of High-Speed Video Data Transmission Circuit Based on GMSL Technology | |
| CN214045650U (en) | Digital sound console with RTA real-time frequency spectrum display function | |
| CN211742610U (en) | Split screen display system | |
| CN210609456U (en) | 5G display device | |
| CN213601207U (en) | Line concentration expansion circuit and line concentration device | |
| CN220821061U (en) | 4K eDP liquid crystal drive board based on SoC |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| GR01 | Patent grant | ||
| GR01 | Patent grant |