CN218850623U - Conducted interference suppression circuit based on unbalanced circuit - Google Patents
Conducted interference suppression circuit based on unbalanced circuit Download PDFInfo
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- CN218850623U CN218850623U CN202221082788.1U CN202221082788U CN218850623U CN 218850623 U CN218850623 U CN 218850623U CN 202221082788 U CN202221082788 U CN 202221082788U CN 218850623 U CN218850623 U CN 218850623U
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Abstract
The utility model discloses a conducted interference suppression circuit based on unbalanced circuit is applied to unbalanced circuit or impulse circuit's electromagnetic interference's suppression, and unbalanced circuit leads to common mode inductance's inefficacy, and then makes the filtering inefficacy simultaneously, can't satisfy electromagnetic compatibility's requirement. The device is applied in a novel way aiming at the problems, and finally the requirement of electromagnetic compatibility is met. The characteristics of the unbalanced pulse circuit, the circuit schematic diagram of the filter circuit, the suppression effect of the filter circuit and the characteristics and the selection of different devices used in the circuit schematic diagram are included.
Description
Technical Field
The utility model belongs to the wave filter field, concretely relates to conducted interference suppression circuit based on unbalanced circuit.
Background
The suppression of electromagnetic interference mainly aims at the electromagnetic interference generated in equipment, and the interference does not return along an original loop by increasing the impedance of a circuit on the path or providing a path with low impedance, so that other equipment of the same power supply system is not influenced.
Generally, the input port low potential line (negative polarity of dc device, N line of ac device) of electronic device is not connected to the metal casing (earth), the incoming and outgoing currents of a group of wires with opposite polarity at the power supply port are equal, and the device is in balanced circuit with the power supply port. For complex electronic equipment consisting of a plurality of functional units (the function integration degree is high, the number of modules in the equipment is greatly increased), part of circuit loops are necessarily connected with the ground so as to realize the common reference level of the system or solve the safety problem of electricity utilization; the equipment is in an unbalanced circuit to a power supply port, partial current can return from a nearby grounding path, so that a group of wires of the power supply port with opposite polarity electrodes flows out, and the sizes of return currents are unequal; residual current generated by the unbalanced circuit can saturate a common-mode inductance iron core on a power supply line of the equipment, inductance is greatly reduced, and the electromagnetic interference suppression effect of the common-mode inductance is greatly reduced.
The environmental requirements of the onboard equipment require that, in order to increase the ground plane, the negative pole of the equipment is connected with the shell ground, and meanwhile, part of high-voltage products achieve the functions by taking the shell ground as a reference loop, so that the current on a power supply line and a loop of a power supply port is unbalanced, and the common-mode device fails.
With the increasing development of electronic technology, the requirements of electrical and electronic equipment such as aviation, aerospace, military industry and the like on high integration and miniaturization are more and more strict, and in order to ensure that the equipment can meet normal work under lower power, a pulse working mode is designed. Electromagnetic interference is mainly generated by di/dt and du/dt, the pulse circuit necessarily causes larger di/dt or du/dt to be generated, and the electromagnetic interference suppression of the pulse circuit is also an urgent problem to be solved.
Based on the short circuit characteristic of the loop of the pulse circuit and the shell (ground), the contradiction between the broadband conduction interference suppression requirement of the power line of the pulse circuit and the high insertion loss requirement of common-mode filtering, the implementation method for solving the electromagnetic interference of the unbalanced pulse circuit is provided.
SUMMERY OF THE UTILITY MODEL
The utility model discloses for solve the technical problem who exists among the background art, aim at provides the conducted interference suppression circuit based on unbalanced circuit, adopts the mode that differential mode electric capacity, common mode inductance and common mode electric capacity combine, adopts the anti saturation design method of inductance simultaneously, effectively suppresses pulse wide band interference, has solved the problem of unbalanced pulse circuit's electromagnetic interference suppression.
In order to solve the technical problem, the technical scheme of the utility model is that:
a conducted interference suppression circuit based on an unbalanced circuit, comprising: power supply and load, still include: a filter circuit; the power supply is connected with the input end of the filter circuit, and the output end of the filter circuit is connected with a load;
the filter circuit includes: the common mode inductor L1, the common mode inductor L2, the common mode inductor L3, the common mode capacitor Cy4 and the differential mode capacitor Cx1;
It can be understood that: the filter circuit is designed comprehensively by using the characteristics of the existing devices and combining the characteristics of the application circuit, so that the problem of filter failure caused by device saturation is solved. The low-frequency interference suppression mostly adopts the characteristics of a differential mode capacitor, a larger direct current resistance of an anti-saturation device and leakage inductance of a common mode inductor, the high-frequency interference suppression adopts the anti-saturation common mode device and the common mode capacitor to suppress the high-frequency common mode interference, and the application frequency band of the device and the expression frequency band of the interference are well combined, so that the interference suppression effect is achieved. Conducted interference suppression mainly aiming at impulse interference in a frequency range of CE102 kHz-10 MHz with voltage <40 VDC; the common-mode inductor L1 mainly aims at the suppression of the common-mode interference of high-frequency coupling; the common-mode inductor L2 mainly solves the problems of pulse signal saturation and common-mode interference suppression of 100 kHz-10 MHz; the common mode inductances L3 and Cx1 are mainly for suppressing interference at low frequencies of 10kHz to 100 kHz.
Further, the filter circuit further includes: a common mode capacitance Cy1 and a common mode capacitance Cy2; two ends of the common-mode capacitor Cy1 are connected to a pin 1 and a pin 3 of the common-mode inductor L1, and two ends of the common-mode capacitor Cy2 are connected to a pin 1 and a pin 2 of the common-mode inductor L1.
Further, the common mode inductor L1 is 1uH to 50uH, the common mode inductor L2 is 0.5mH to 5mH, and the common mode inductor L3 is 50uH to 800uH.
Further, the common mode capacitance Cy1 is 0.001uF to 0.1uF, the common mode capacitance Cy2 is 0.001uF to 0.1uF, the common mode capacitance Cy3 is 0.001uF to 0.1uF, the common mode capacitance Cy4 is 0.001uF to 0.1uF, and the differential mode capacitance Cx1 is 0.1uF to 100uF.
Further, the common mode inductor L1 is a three-phase common mode inductor.
Compared with the prior art, the utility model has the advantages of:
the utility model discloses the characteristic of the current device of better use combines application circuit's characteristic to carry out the integrated design simultaneously, solves the problem of the filtering inefficacy that the device saturation leads to. The low-frequency interference suppression mostly adopts the characteristics of a differential mode capacitor, a larger direct current resistance of an anti-saturation device and leakage inductance of a common mode inductor, the high-frequency interference suppression adopts the anti-saturation common mode device and the common mode capacitor to suppress the high-frequency common mode interference, and the application frequency band of the device and the expression frequency band of the interference are well combined, so that the interference suppression effect is achieved.
Conducted interference suppression for impulsive interference within the frequency band range of CE102 kHz-10 MHz with a voltage <40 VDC; the common mode inductors L1 and L2 and the common mode capacitors Cy1, cy2, cy3 and Cy4 are mainly used for inhibiting common mode interference coupled at high frequency of 100 kHz-10 MHz; the common mode inductances L3 and Cx1 are mainly for suppressing interference at low frequencies of 10kHz to 100 kHz.
Drawings
FIG. 1 is a schematic diagram of an unbalanced pulse circuit of the present invention;
FIG. 2 is a characteristic diagram of electromagnetic interference;
FIG. 3, profiles of CM and DM;
FIG. 4 is a frequency characteristic diagram of an anti-saturation inductive device;
FIG. 5 is a frequency characteristic diagram of a capacitor device;
FIG. 6 is a connection diagram of the filter circuit of the present invention;
FIG. 7 is a diagram showing the effect of suppressing electromagnetic interference;
fig. 8 is a graph of insertion loss data for the filter circuit.
Detailed Description
The following description of the embodiments of the present invention refers to the accompanying drawings:
it should be noted that the structures, ratios, sizes, etc. illustrated in the present specification are only used to cooperate with the contents disclosed in the specification for the understanding and reading of the people skilled in the art, and are not used to limit the limit conditions that the present invention can be implemented, and any modifications of the structures, changes of the ratio relationships or adjustments of the sizes should still fall within the scope that the technical contents disclosed in the present invention can cover without affecting the functions and the achievable purposes of the present invention.
Meanwhile, the terms such as "upper", "lower", "left", "right", "middle" and "one" used in the present specification are for convenience of description, and are not intended to limit the scope of the present invention, and changes or adjustments of the relative relationship thereof may be made without substantial technical changes, and the present invention is also regarded as the scope of the present invention.
Example 1
As shown in fig. 6, the conducted interference suppression circuit based on the unbalanced circuit includes: power supply and load, still include: a filter circuit; the power supply is connected with the input end of the filter circuit, and the output end of the filter circuit is connected with a load;
the filter circuit includes: the common mode inductor L1, the common mode inductor L2, the common mode inductor L3, common mode capacitances Cy1, cy2 and Cy3, a common mode capacitance Cy4 and differential mode capacitances Cx1 and Cx2;
It can be understood that: the filter circuit is designed comprehensively by using the characteristics of the existing devices and combining the characteristics of the application circuit, so that the problem of filter failure caused by device saturation is solved. The low-frequency interference suppression mostly adopts the characteristics of a differential mode capacitor, a larger direct current resistance of an anti-saturation device and leakage inductance of a common mode inductor, the high-frequency interference suppression adopts the anti-saturation common mode device and the common mode capacitor to suppress the high-frequency common mode interference, and the application frequency band of the device and the expression frequency band of the interference are well combined, so that the interference suppression effect is achieved. Conducted interference suppression mainly aiming at impulse interference in a frequency range of CE10210 kHz-10 MHz with voltage <40 VDC; the common-mode inductor L1 mainly aims at the suppression of the common-mode interference of high-frequency coupling; the common-mode inductor L2 mainly solves the problems of pulse signal saturation and common-mode interference suppression of 100 kHz-10 MHz; the common mode inductances L3 and Cx1 are mainly for suppressing interference at low frequencies of 10kHz to 100 kHz.
Further, the filter circuit further includes: a common mode capacitance Cy1 and a common mode capacitance Cy2; two ends of the common-mode capacitor Cy1 are connected to a pin 1 and a pin 3 of the common-mode inductor L1, and two ends of the common-mode capacitor Cy2 are connected to a pin 1 and a pin 2 of the common-mode inductor L1.
Further, the common mode inductor L1 is 1uH to 50uH, the common mode inductor L2 is 0.5mH to 5mH, and the common mode inductor L3 is 50uH to 800uH.
Further, the common mode capacitance Cy1 is 0.001uF to 0.1uF, the common mode capacitance Cy2 is 0.001uF to 0.1uF, the common mode capacitance Cy3 is 0.001uF to 0.1uF, the common mode capacitance Cy4 is 0.001uF to 0.1uF, and the differential mode capacitance Cx1 is 0.1uF to 100uF.
Further, the common mode inductor L1 is a three-phase common mode inductor.
Example 2
This embodiment is applied to an unbalanced pulse circuit, see fig. 1, the current flowing through the power supply + and the power supply-at the power supply port of the unbalanced circuit has a slight difference, and the voltage/current change is large when the pulse circuit is in operation, which results in large conduction interference of the power supply line, for example: the results of the CE102 test for a certain pulse circuit are shown in fig. 2, and the standard requirements cannot be met. The ferrite device with the ferrite characteristic selected conventionally for the two problems has the saturation resistance which does not meet the requirement, so that the device fails. Ferrite devices with good anti-saturation characteristics are selected for use in the circuit, and the characteristics of the devices are shown in fig. 4. Meanwhile, for the serious exceeding of the low frequency in fig. 2, a large suppression effect is required in the frequency band, and a device with a good characteristic in the frequency band is selected as shown in fig. 5. According to the distribution model of electromagnetic interference, interference above 1MHz is mainly represented as common mode interference, so that it is necessary to select a common mode device to suppress interference above 1MHz frequency band. The specific circuit is shown in fig. 6. The method is characterized in that: the power supply line of the equipment is filtered, and then the interference inside the equipment can be reduced through the conduction emission of the power line.
The inductors L1 and L2 and the capacitors Cy1 and Cy2, cy3, and Cy4 suppress common mode conducted interference of 100kHz or more, and have a good suppression capability at high frequencies.
The inductance L3 and the capacitance CX1 mainly inhibit the consistency of the conduction interference of 10 kHz-100 kHz, and the good low-frequency characteristic of the device is mainly selected.
Example 3
As shown in fig. 6, the circuit for suppressing conducted interference of an unbalanced circuit includes inductances L1, L2, and L3 and two sets of capacitances Cx1, cy2, cy3, and Cy4.
According to the test result of the original state, the full frequency band of 10 kHz-10 MHz exceeds the standard, and the interference is generated when the pulse circuit works. According to the electromagnetic interference distribution diagram, as shown in fig. 3, the interference in the frequency band of 10kHz to 100kHz is differential mode interference, the interference in the frequency band of 100kHz to 1MHz is common-differential mode interference, and the interference above 1MHz is mainly common-mode interference. According to the characteristics, corresponding measures are taken in corresponding frequency bands.
The method mainly adopts a differential mode suppression device when 10 kHz-100 kHz exceeds about 15-30 dB, adopts a low-frequency suppression inductor L3 at a power supply port according to the impedance mismatch principle, adds a capacitor Cx1 at an output port of a filter, suppresses the conduction interference of 10 kHz-100 kHz, and suppresses the insertion loss to be more than 30dB, as shown in figure 8.
L3 adopts a magnetic core with large leakage inductance and is not easy to saturate at 10 kHz-100 kHz, the allowed current is up to dozens of A, and the suppression effect at low frequency is obvious.
Aiming at the interference in the frequency band of 100 kHz-10 MHz, the common-mode interference in the frequency band is inhibited by adopting inductors L2 and Cy 1-Cy 4, and the differential-mode interference in the frequency band of 100 kHz-1 MHz is inhibited by leakage inductance generated by the inductor L2. The interference in the frequency band of 100 kHz-10 MHz can be ensured to meet the requirement of CE102 by the design selection. The inhibition effect is shown in fig. 7.
Generally, the test frequency band of the CE102 is 10kHz to 10MHz, the limit value is 60dBuV, the problem of the RE102 is also caused by conducted interference radiation of a power line, the limit value requirement of the RE102 is not less than 24dbuv, and a certain difference exists between the CE102 and the limit value of the RE102, and if the suppression effect of the CE102 in the frequency band only meets the requirement of the CE102, the exceeding of the RE102 is inevitably caused. In order to better design the filter to meet the requirement of equipment and simultaneously avoid the coupling between internal lines of the filter and lines in the production and processing process, the input port of the filter is additionally provided with the L1 to inhibit the interference of high-frequency coupling and better inhibit the interference in a frequency band of 1MHz to 10 MHz.
Although the preferred embodiments of the present invention have been described in detail, the present invention is not limited to the above embodiments, and various changes can be made without departing from the spirit of the present invention within the knowledge of those skilled in the art.
Many other changes and modifications can be made without departing from the spirit and scope of the invention. It is to be understood that the invention is not to be limited to the specific embodiments, and that the scope of the invention is defined by the appended claims.
Claims (5)
1. A conducted interference suppression circuit based on an unbalanced circuit, comprising: power supply and load, its characterized in that still includes: a filter circuit; the power supply is connected with the input end of the filter circuit, and the output end of the filter circuit is connected with a load;
the filter circuit includes: the common mode inductor L1, the common mode inductor L2, the common mode inductor L3, the common mode capacitor Cy4 and the differential mode capacitor Cx1;
pins 1 and 2 of the common-mode inductor L1 are connected with a power supply, pins 3 and 3 ' of the common-mode inductor L1 are grounded, pin 1 ' of the common-mode inductor L1 is connected with pin 1 of the common-mode inductor L2, pin 2 ' of the common-mode inductor L1 is connected with pin 2 of the common-mode inductor L2, pin 1 ' of the common-mode inductor L2 is connected with pin 1 of the common-mode inductor L3, pin 2 ' of the common-mode inductor L2 is connected with pin 2 of the common-mode inductor L3, and pin 1 ' and pin 2 ' of the common-mode inductor L3 are connected with a load; one end of the common-mode capacitor Cy3 is connected to a pin 1' of the common-mode inductor L3, and the other end of the common-mode capacitor Cy3 is grounded; two ends of the differential mode capacitor Cx1 are connected with a pin 1 'and a pin 2' of the common mode inductor L3; one end of the common mode capacitor Cy4 is connected to a pin 2' of the common mode inductor L3, and the other end of the common mode capacitor Cy4 is grounded.
2. The unbalanced circuit-based conducted interference suppression circuit of claim 1, wherein the filtering circuit further comprises: a common mode capacitance Cy1 and a common mode capacitance Cy2; the two ends of the common-mode capacitor Cy1 are connected into a pin 1 and a pin 3 of the common-mode inductor L1, and the two ends of the common-mode capacitor Cy2 are connected into a pin 1 and a pin 2 of the common-mode inductor L1.
3. The unbalanced-circuit-based conducted interference rejection circuit of claim 1, wherein the common mode inductor L1 is 1uH to 50uH, the common mode inductor L2 is 0.5mH to 5mH, and the common mode inductor L3 is 50uH to 800uH.
4. The unbalanced-circuit-based conducted interference suppression circuit of claim 2, wherein the common-mode capacitance Cy1 is 0.001uF to 0.1uF, the common-mode capacitance Cy2 is 0.001uF to 0.1uF, the common-mode capacitance Cy3 is 0.001uF to 0.1uF, the common-mode capacitance Cy4 is 0.001uF to 0.1uF, and the differential-mode capacitance Cx1 is 0.1uF to 100uF.
5. The unbalanced circuit based conducted interference rejection circuit of claim 1, wherein the common mode inductor L1 is a three-phase common mode inductor.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202221082788.1U CN218850623U (en) | 2022-05-07 | 2022-05-07 | Conducted interference suppression circuit based on unbalanced circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202221082788.1U CN218850623U (en) | 2022-05-07 | 2022-05-07 | Conducted interference suppression circuit based on unbalanced circuit |
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| Publication Number | Publication Date |
|---|---|
| CN218850623U true CN218850623U (en) | 2023-04-11 |
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| CN202221082788.1U Active CN218850623U (en) | 2022-05-07 | 2022-05-07 | Conducted interference suppression circuit based on unbalanced circuit |
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| CN (1) | CN218850623U (en) |
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- 2022-05-07 CN CN202221082788.1U patent/CN218850623U/en active Active
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