CN218829139U

CN218829139U - Dual-battery management circuit and electronic equipment

Info

Publication number: CN218829139U
Application number: CN202221920460.2U
Authority: CN
Inventors: 毛扬; 石聪; 张铁利; 张长营
Original assignee: Honor Device Co Ltd
Current assignee: Honor Device Co Ltd
Priority date: 2022-07-22
Filing date: 2022-07-22
Publication date: 2023-04-07
Anticipated expiration: 2032-07-22
Also published as: WO2024016693A1

Abstract

The application discloses double-battery management circuit and electronic equipment relates to the field of battery charging, and is used for preventing a large current from being generated between two batteries and realizing voltage balance of the two batteries. The dual battery management circuit includes: a first PMIC and a second PMIC; the first PMIC controls the charge and discharge of the first battery and measures the voltage of the first battery, and the second PMIC controls the charge and discharge of the second battery and measures the voltage of the second battery; the first battery is coupled to a coupling point through the first PMIC and the second battery is coupled to a load through the second PMIC, and the coupling point is coupled to a power supply through the first PMIC and the second PMIC respectively; when the voltage difference between the first battery and the second battery is greater than or equal to a threshold, the first PMIC and the second PMIC are configured to: and if the power supply is not connected, conducting the first battery and the second battery, and limiting the conducting current between the first battery and the second battery.

Description

Dual-battery management circuit and electronic equipment

Technical Field

The present application relates to the field of battery charging, and in particular, to a dual battery management circuit and an electronic device.

Background

At present, some mobile phones adopt a double-battery management circuit to improve the charging and discharging efficiency of batteries, but because two batteries inevitably have voltage difference in production and use processes, when the voltage difference is large, a large current between the two batteries can be generated, and the risk of burning the batteries exists.

SUMMERY OF THE UTILITY MODEL

The embodiment of the application provides a double-battery management circuit and electronic equipment, which are used for preventing a large current from being generated between two batteries and realizing the voltage balance of the two batteries.

In order to achieve the above purpose, the embodiments of the present application adopt the following technical solutions:

in a first aspect, a dual battery management circuit is provided, comprising: a first power management integrated circuit PMIC and a second PMIC; the first PMIC is used for controlling the charging and discharging of the first battery and measuring the voltage of the first battery, and the second PMIC is used for controlling the charging and discharging of the second battery and measuring the voltage of the second battery; the first battery is coupled to a coupling point through the first PMIC, the second battery is coupled to the coupling point through the second PMIC, the coupling point is coupled to a load, and the coupling point is further used for being coupled to a power supply through the first PMIC and the second PMIC respectively; when the voltage difference between the first battery and the second battery is greater than or equal to a threshold, the first PMIC and the second PMIC are used for: if the power supply is not connected, the first battery and the second battery are conducted, and the conduction current between the first battery and the second battery is limited, so that the battery with high voltage carries out current-limiting charging on the battery with low voltage.

The utility model provides a bi-battery management circuit, through the voltage difference of comparing between two batteries, when the voltage difference is greater than the threshold value, switch on two batteries to, these two PMICs carry out the current-limiting to the conduction current between two batteries, thereby prevent to produce the heavy current between two batteries, and realize the voltage balance of two batteries.

In one possible embodiment, when the voltage difference between the first battery and the second battery is greater than or equal to a threshold, the first PMIC and the second PMIC are further configured to: and if the power supply is connected, stopping charging the battery with high voltage, opening the current-limiting function, and performing current-limiting charging on the battery with low voltage. The voltage difference between the first battery and the second battery is made less than the threshold as quickly as possible.

In one possible embodiment, when the voltage difference between the first battery and the second battery is less than the threshold, the first PMIC and the second PMIC are further configured to: and conducting the first battery and the second battery, and closing the current limiting function. So that the two batteries are charged and discharged simultaneously to ensure the voltage balance of the two batteries.

In a possible implementation manner, the device further includes a comparator, configured to compare a voltage of the first battery with a voltage of the second battery, and output an enable signal to a PMIC corresponding to a battery with a high voltage, where the enable signal is used to instruct the corresponding PMIC to turn on a charging function for the battery with the high voltage. For a scene that the electronic device is shut down due to over-discharge of the battery, the normal operation of the whole electronic device cannot be guaranteed due to over-low battery voltage (for example, 2.4V), and only the operation of the PMIC can be guaranteed. If a power adapter is plugged in at this time, the battery with higher voltage can be charged to improve the power supply voltage, so that the battery can be restored to the power supply voltage (for example, 3V) capable of ensuring the normal operation of the electronic equipment as soon as possible. Therefore, the comparator is used for ensuring that the battery with relatively high voltage can be charged quickly in the scene that the electronic equipment is shut down due to over-discharge of the battery.

In one possible embodiment, the first PMIC includes a first switch tube, the second PMIC includes a second switch tube, the first battery is coupled to the coupling point through the first switch tube, and the second battery is coupled to the coupling point through the second switch tube. This embodiment provides a solution for how the first battery and the second battery are connected in parallel.

In one possible embodiment, conducting the first battery and the second battery and turning on the current limiting function includes: and controlling the first switching tube to be conducted, controlling the second switching tube to be conducted, and controlling one of the first switching tube or the second switching tube to be in a linear impedance region. The conduction current of the switch tube can be adjusted by adjusting the equivalent resistance value of the switch tube in the linear impedance region, so that the conduction current of the switch tube is limited and controllable, and the first battery and the second battery are prevented from generating large current.

In a second aspect, an electronic device is provided, which includes the dual battery management circuit, the first battery, and the second battery according to the first aspect and any implementation manner thereof, where the dual battery management circuit is configured to manage charging and discharging of the first battery and the second battery.

Technical effects of the second aspect are described with reference to the first aspect and any one of the embodiments thereof, and will not be repeated here.

Drawings

Fig. 1 is a schematic structural diagram of an electronic device according to an embodiment of the present disclosure;

fig. 2 is a schematic view of an electronic device provided in an embodiment of the present application as a folding screen mobile phone;

fig. 3 is a schematic view of another electronic device provided in an embodiment of the present application as a folding-screen mobile phone;

fig. 4 is a schematic structural diagram of a dual battery management circuit according to an embodiment of the present disclosure;

FIG. 5 is a schematic diagram illustrating an operating principle of a dual battery management circuit according to an embodiment of the present disclosure;

FIG. 6 is a schematic diagram of a current path provided in an embodiment of the present application;

FIG. 7 is a schematic diagram of another current path provided by an embodiment of the present application;

FIG. 8 is a schematic diagram of yet another current path provided by an embodiment of the present application;

FIG. 9 is a schematic diagram of yet another current path provided by an embodiment of the present application;

FIG. 10 is a schematic diagram of yet another current path provided by an embodiment of the present application;

FIG. 11 is a schematic diagram of yet another current path provided by an embodiment of the present application;

FIG. 12 is a schematic diagram of yet another current path provided by an embodiment of the present application;

fig. 13 is a schematic diagram of another current path according to an embodiment of the present disclosure.

Detailed Description

Some concepts to which this application relates will first be described.

Reference to the terms "first," "second," and the like in the embodiments of the present application are only for the purpose of distinguishing one type of feature from another, and are not to be construed as indicating relative importance, quantity, order, or the like.

Reference throughout this specification to the word "exemplary" or "such as" is used to indicate that a particular embodiment is referred to as being an example, instance, or illustration. Any embodiment or design described herein as "exemplary" or "such as" is not necessarily to be construed as preferred or advantageous over other embodiments or designs. Rather, use of the word "exemplary" or "such as" is intended to present concepts related in a concrete fashion.

The terms "coupled" and "connected" in the embodiments of the present application should be understood broadly, and may refer to, for example, a direct connection physically or an indirect connection via an electronic device, such as a connection via a resistor, an inductor, a capacitor, or other electronic devices.

The embodiment of the application provides an electronic device, which can be a device with at least two batteries, and the electronic device can be mobile or fixed. The electronic device may be deployed on land (e.g., indoors or outdoors, hand-held or vehicle-mounted, etc.), on the water (e.g., ship, etc.), or in the air (e.g., airplane, balloon, satellite, etc.). The electronic device may be referred to as a User Equipment (UE), an access terminal, a terminal unit, a subscriber unit (subscriber unit), a terminal station, a Mobile Station (MS), a mobile station, a terminal agent, or a terminal apparatus. For example, the electronic device may be a mobile phone, a tablet computer, a notebook computer, a smart band, a smart watch, an earphone, a smart speaker, a Virtual Reality (VR) device, an Augmented Reality (AR) device, a terminal in industrial control (industrial control), a terminal in unmanned driving (self driving), a terminal in remote medical treatment (remote medical), a terminal in smart grid (smart grid), a terminal in transportation safety (transportation safety), a terminal in smart city (smart city), a terminal in smart home (smart home), and the like. The embodiment of the present application does not limit the specific type, structure, and the like of the electronic device. One possible structure of the electronic device is explained below.

Taking an electronic device as an example of a mobile phone, fig. 1 shows a possible structure of the electronic device 101. The electronic device 101 may include a processor 210, an external memory interface 220, an internal memory 221, a Universal Serial Bus (USB) interface 230, a power management module 240, a battery 241, a wireless charging coil 242, an antenna 1, an antenna 2, a mobile communication module 250, a wireless communication module 260, an audio module 270, a speaker 270A, a receiver 270B, a microphone 270C, an earphone interface 270D, a sensor module 280, a key 290, a motor 291, an indicator 292, a camera 293, a display screen 294, and a Subscriber Identity Module (SIM) card interface 295, among others.

Among other things, the sensor module 280 may include a pressure sensor, a gyroscope sensor, an air pressure sensor, a magnetic sensor, an acceleration sensor, a distance sensor, a proximity light sensor, a fingerprint sensor, a temperature sensor, a touch sensor, an ambient light sensor, a bone conduction sensor, and the like.

It is to be understood that the illustrated structure of the embodiment of the present application does not constitute a specific limitation to the electronic device 101. In other embodiments of the present application, the electronic device 101 may include more or fewer components than illustrated, or combine certain components, or split certain components, or a different arrangement of components. The illustrated components may be implemented in hardware, software, or a combination of software and hardware.

Processor 210 may include one or more processing units, such as: the processor 210 may be a Field Programmable Gate Array (FPGA), an Application Specific Integrated Circuit (ASIC), a system on chip (SoC), a Central Processing Unit (CPU), an Application Processor (AP), a Network Processor (NP), a Digital Signal Processor (DSP), a Micro Control Unit (MCU), a Programmable Logic Device (PLD), a modem processor, a Graphic Processing Unit (GPU), an Image Signal Processor (ISP), a controller, a video codec, a baseband processor, and a neural Network Processor (NPU). The different processing units may be separate devices or may be integrated into one or more processors. For example, the processor 210 may be an application processor AP. Alternatively, the processor 210 may be integrated in a system on chip (SoC). Alternatively, the processor 210 may be integrated in an Integrated Circuit (IC) chip. The processor 210 may include an Analog Front End (AFE) and a micro-controller unit (MCU) in an IC chip.

The controller may be, among other things, a neural center and a command center of the electronic device 101. The controller can generate an operation control signal according to the instruction operation code and the time sequence signal to finish the control of instruction fetching and instruction execution.

A memory may also be provided in processor 210 for storing instructions and data. In some embodiments, the memory in the processor 210 is a cache memory. The memory may hold instructions or data that have just been used or recycled by processor 210. If the processor 210 needs to use the instruction or data again, it can be called directly from the memory. Avoiding repeated accesses reduces the latency of the processor 210, thereby increasing the efficiency of the system.

In some embodiments, processor 210 may include one or more interfaces. The interface may include an integrated circuit (I2C) interface, an integrated circuit built-in audio (I2S) interface, a Pulse Code Modulation (PCM) interface, a universal asynchronous receiver/transmitter (UART) interface, a Mobile Industry Processor Interface (MIPI), a general-purpose input/output (GPIO) interface, a Subscriber Identity Module (SIM) interface, and/or a USB interface, etc.

It should be understood that the interface connection relationship between the modules illustrated in the embodiment of the present application is only an exemplary illustration, and does not constitute a structural limitation on the electronic device 101. In other embodiments of the present application, the electronic device 101 may also adopt different interface connection manners or a combination of multiple interface connection manners in the above embodiments.

The wireless communication function of the electronic device 101 may be implemented by the antenna 1, the antenna 2, the mobile communication module 250, the wireless communication module 260, the modem processor, the baseband processor, and the like.

The antennas 1 and 2 are used for transmitting and receiving electromagnetic wave signals. Each antenna in the electronic device 101 may be used to cover a single or multiple communication bands. Different antennas can also be multiplexed to improve the utilization of the antennas. For example: the antenna 1 may be multiplexed as a diversity antenna of a wireless local area network. In other embodiments, the antenna may be used in conjunction with a tuning switch.

The mobile communication module 250 may provide a solution including 2G/3G/4G/5G wireless communication and the like applied on the electronic device 101. The wireless communication module 260 may provide a solution for wireless communication applied to the electronic device 101, including Wireless Local Area Networks (WLANs), such as wireless fidelity (Wi-Fi) networks, bluetooth (BT), global Navigation Satellite Systems (GNSS), frequency Modulation (FM), near Field Communication (NFC), infrared (IR), and the like. In some embodiments, antenna 1 of electronic device 101 is coupled to mobile communication module 250 and antenna 2 is coupled to wireless communication module 260 so that electronic device 101 can communicate with networks and other devices through wireless communication techniques.

The external memory interface 220 may be used to connect an external memory card, such as a Micro SanDisk (Micro SD) card, to extend the storage capability of the electronic device 101. The external memory card communicates with the processor 210 through the external memory interface 220 to implement a data storage function. For example, files such as music, video, etc. are saved in the external memory card.

Internal memory 221 may be used to store computer-executable program code, including instructions. The processor 210 executes various functional applications of the electronic device 101 and data processing by executing instructions stored in the internal memory 221. In addition, the internal memory 221 may include a high-speed random access memory, and may further include a nonvolatile memory, such as at least one magnetic disk storage device, a flash memory device, a universal flash memory (UFS), and the like.

The memory referred to in embodiments of the present application may be volatile memory or non-volatile memory, or may include both volatile and non-volatile memory. The non-volatile memory may be a read-only memory (ROM), a Programmable ROM (PROM), an Erasable PROM (EPROM), an Electrically Erasable PROM (EEPROM), or a flash memory. Volatile memory can be Random Access Memory (RAM), which acts as external cache memory. By way of example, but not limitation, many forms of RAM are available, such as Static Random Access Memory (SRAM), dynamic Random Access Memory (DRAM), synchronous Dynamic Random Access Memory (SDRAM), double data rate SDRAM, enhanced SDRAM, SLDRAM, synchronous Link DRAM (SLDRAM), and direct rambus RAM (DR RAM). It should be noted that the memory of the systems and methods described herein is intended to comprise, without being limited to, these and any other suitable types of memory.

The electronic device 101 may implement audio functions through the audio module 270, the speaker 270A, the receiver 270B, the microphone 270C, the headphone interface 270D, the application processor, and the like. Such as music playing, recording, etc.

Audio module 270 is used to convert digital audio information into an analog audio signal output and also to convert an analog audio input into a digital audio signal. In some embodiments, the audio module 270 may be disposed in the processor 210, or some functional modules of the audio module 270 may be disposed in the processor 210. The speaker 270A, also called a "horn", is used to convert an audio electrical signal into an acoustic signal. The receiver 270B, also called "earpiece", is used to convert the electrical audio signal into an acoustic signal. The microphone 270C, also referred to as a "microphone," is used to convert sound signals into electrical signals. The electronic device 101 may be provided with at least one microphone 270C. The headphone interface 270D is used to connect wired headphones. The headset interface 270D may be the USB interface 230, or may be an open mobile platform (OMTP) standard interface of 3.5mm, or a cellular telecommunications industry association (cellular telecommunications industry association of the USA, CTIA) standard interface.

The keys 290 include a power-on key, a volume key, etc. The keys 290 may be mechanical keys. Or may be touch keys. The electronic device 101 may receive a key input, and generate a key signal input related to user settings and function control of the electronic device 101. The motor 291 may generate a vibration cue. The motor 291 can be used for both incoming call vibration prompting and touch vibration feedback. Indicator 292 may be an indicator light that may be used to indicate a state of charge, a change in charge, or a message, missed call, notification, etc. The SIM card interface 295 is used to connect a SIM card. The SIM card can be attached to and detached from the electronic device 101 by being inserted into the SIM card interface 295 or being pulled out from the SIM card interface 295. The electronic device 101 may support 1 or N SIM card interfaces, N being a positive integer greater than 1. The SIM card interface 295 may support a Nano SIN (Nano SIM) card, a Micro SIM (Micro SIM) card, a SIM card, and the like. In some embodiments, the electronic device 101 employs an embedded SIM (eSIM) card, which may be embedded in the electronic device 101 and may not be separable from the electronic device 101.

The electronic device 101 may implement a shooting function through the ISP, the camera 293, the video codec, the GPU, the display screen 294, and the application processor, etc. The ISP is used to process the data fed back by the camera 293. In some embodiments, the ISP may be provided in camera 293. The camera 293 is used to capture still images or video. In some embodiments, electronic device 101 may include 1 or N cameras 293, N being a positive integer greater than 1.

The electronic device 101 may implement display functionality via the GPU, the display screen 294, and the application processor, among others. The GPU is a microprocessor for image processing, and is connected to the display screen 294 and an application processor. The GPU is used to perform mathematical and geometric calculations for graphics rendering. Processor 210 may include one or more GPUs that execute program instructions to generate or alter display information.

The display screen 294 is used to display images, video, and the like. The display screen 294 includes a display panel. In some implementations, the electronic device 101 can include 1 or more display screens 294. In other embodiments, the touch screen in the display screen 294 may be a folding screen. For example, as shown in fig. 2 and 3, the display panel of the display screen 294 may include a first touch area 31 and a second touch area 32, and when the display screen 294 is folded, the first touch area 31 and the second touch area 32 may be located on different planes, where the display screen 294 in fig. 2 is folded outward, so that the folded first touch area 31 and the folded second touch area 32 are visible to a user, and the user may still perform a touch operation on the display screen 294, and the display screen 294 in fig. 3 is folded inward, so that the completely folded first touch area 31 and the completely folded second touch area 32 are opposite to each other, which is beneficial to protecting the display panel of the display screen 294. The display screen 294 provided in the embodiment of the present application may be an outward-folded foldable screen shown in fig. 2, and may also be applied to an inward-folded foldable screen shown in fig. 3.

The battery 241 may include at least two batteries respectively located in two touch areas of the display screen 294.

The power management module 240 is configured to receive a charging input from a charger. The charger may be a wireless charger (such as a wireless charging base of the electronic device 101 or other devices that can wirelessly charge the electronic device 101), or may be a wired charger. For example, the power management module 240 may receive a charging input of a wired charger through the USB interface 230. The power management module 240 may receive a wireless charging input through a wireless charging coil 242 of the electronic device.

The power management module 240 may also supply power to the electronic device while charging the battery 241. The power management module 240 receives an input of the battery 241, and supplies power to the processor 210, the internal memory 221, the external memory interface 220, the display 294, the camera 293, the wireless communication module 260, and the like. The power management module 240 may also be used to monitor parameters such as battery capacity, battery cycle number, battery state of health (leakage, impedance) of the battery 241. In some other embodiments, the power management module 240 may also be disposed in the processor 210.

The power management module 240 includes a dual battery management circuit for respectively charging two batteries. The voltage difference must appear in production, use at present two batteries, can produce great electric current between two batteries when the voltage difference is great, has the risk of damaging battery and power management chip. In order to solve the problem, the dual-battery management circuit provided in the embodiment of the present application compares the voltage difference between the two batteries, and when the voltage difference is greater than the threshold, if the dual-battery management circuit is in a non-charging scenario, the battery with a high voltage is controlled to charge the battery with a low voltage so that the voltage difference is less than the threshold, and if the dual-battery management circuit is in a charging scenario, the dual-battery management circuit controls the battery with a low voltage to be charged first so that the voltage difference is less than the threshold. It should be noted that, the present application takes two batteries as an example for description, and may also be applied to a scenario with more batteries.

As shown in fig. 4, a dual battery management circuit 40 provided in an embodiment of the present application includes: a first Over Voltage Protection (OVP) circuit 401, a second OVP circuit 402, a first Power Management Integrated Circuit (PMIC) 403, a second PMIC 404, and a comparator 405. The circuit also comprises a capacitor C1, a capacitor C2, a capacitor C3, a capacitor C4, an inductor L1 and an inductor L2. The capacitor C1 is used for filtering the charging current input to the first PMIC 403, and the capacitor C2 is used for filtering the charging current input to the second PMIC 404. The inductor L1 and the capacitor C3 are used for filtering the charging current output by the first PMIC 403 to the load 45 and the first battery 43, and the inductor L2 and the capacitor C4 are used for filtering the charging current output by the second PMIC 404 to the load 45 and the second battery 44.

One end of the first OVP circuit 401 and one end of the second OVP circuit 402 may be coupled to the power adapter 41 (may be referred to as a power supply) through USB interfaces, the other end of the first OVP circuit 401 is coupled to the first PMIC 403, and the other end of the second OVP circuit 402 is coupled to the second PMIC 404. The first OVP circuit 401 is used to over-voltage protect the first PMIC 403, and the second OVP circuit 402 is used to over-voltage protect the second PMIC 404.

The first battery 43 is coupled to a coupling point N through the first PMIC 403, the second battery 44 is coupled to a coupling point N through the second PMIC 404, the coupling point N is coupled to the load 45, and the coupling point N is further configured to be coupled to the power adapter 41 (i.e., the power supply) through the first PMIC 403 and the second PMIC 404, respectively.

The first PMIC 403 is used to control charging and discharging of the first battery 43, measure the voltage of the first battery 43, and supply power to the load 45. The second PMIC 404 is used to control charging and discharging of the second battery 44, measure the voltage of the second battery 44, and supply power to the load 45.

For the first PMIC 403, the first PMIC 403 includes a switch Q11, a first voltage conversion circuit and a switch Q14, and the first voltage conversion circuit includes a switch Q12 and a switch Q13. The first voltage conversion circuit may be a buck (buck) circuit, a boost (boost) circuit, a buck-boost (buck-boost) circuit, etc., IN the embodiment of the present application, the name of the first voltage conversion circuit is USB _ IN1 port as an input port, and VSW1 port as an output port, where the first voltage conversion circuit is a buck circuit. Then the first voltage conversion circuit is a voltage boost circuit when the VSW1 port is used as the input port and the USB _ IN1 port is used as the output port.

The USB _ IN1 pin is used for inputting a charging current. The USB _ IN1 pin is coupled to the PMID1 pin through the switch Q11, and the PMID1 pin is coupled to the capacitor C1, so as to filter the charging current input to the first PMIC 403. The PMID1 pin is coupled to the VSW1 pin through the switch tube Q12, the VSW1 pin is grounded through the switch tube Q13, the VPH _ PW1 pin is coupled to the VCHG _ OUT1 pin through the switch tube Q14, and the VCHG _ OUT1 pin is coupled to the first battery 43 and the comparator 405.

The first PMIC 403 controls the electrical connection between the first voltage converting circuit and the USB _ IN1 pin by controlling the on and off of the switch Q11. The first PMIC 403 regulates the output charging voltage and charging current by controlling the duty cycles of the switching tube Q12 and the switching tube Q13. The VSW1 pin is coupled to an inductor L1 and a capacitor C3 for filtering the charging current output by the first PMIC 403 to the load 45 and the first battery 43.

For the second PMIC 404, the second PMIC 404 includes a switch Q21, a second voltage conversion circuit and a switch Q24, and the second voltage conversion circuit includes a switch Q22 and a switch Q23. The second voltage conversion circuit may be a buck (buck) circuit, a boost (boost) circuit, a buck-boost (buck-boost) circuit, etc., IN the embodiment of the present application, the name of the second voltage conversion circuit is USB _ IN2 port as an input port, and VSW2 port as an output port, where the second voltage conversion circuit is a buck circuit. Then the second voltage conversion circuit is a voltage boost circuit when the VSW2 port is used as the input port and the USB _ IN2 port is used as the output port.

The USB _ IN2 pin is used for inputting a charging current. The USB _ IN2 pin is coupled to the PMID2 pin through the switch Q21, and the PMID2 pin is coupled to the capacitor C2, so as to filter the charging current input to the second PMIC 404. The PMID2 pin is coupled to the VSW2 pin through the switch Q22, the VSW2 pin is grounded through the switch Q23, the VPH _ PW2 pin is coupled to the VCHG _ OUT2 pin through the switch Q24, and the VCHG _ OUT2 pin is coupled to the second battery 44 and the comparator 405.

The second PMIC 404 controls the electrical connection between the second voltage converting circuit and the USB _ IN2 pin by controlling the on and off of the switching tube Q21. The second PMIC 404 regulates the output charging voltage and charging current by controlling the duty cycle of the switching tube Q22 and the switching tube Q23. The VSW2 pin is coupled to an inductor L2 and a capacitor C4 for filtering the charging current output by the second PMIC 404 to the load 45 and the second battery 44.

The VPH _ PW1 pin of the first PMIC 403 is coupled to the VPH _ PW2 pin of the second PMIC 404, such that the first battery 43 may be coupled in parallel with the second battery 44.

The first PMIC 403 and the second PMIC 404 may communicate with each other via an inter-integrated circuit (I2C) bus, a Serial Peripheral Interface (SPI) bus, a Signal Processing and Multimedia Image (SPMI) bus, and the like. One PMIC may be a master PMIC and the other PMIC may be a slave PMIC. The master PMIC may inform the slave PMIC to turn on a certain function of a certain pin, and the slave PMIC may inform the master PMIC of the voltage of the battery measured by the slave PMIC through the VCHG _ OUT pin.

The comparator 405 is configured to compare voltages of the first battery 43 and the second battery 44, and output an enable signal to the first PMIC 403 or the second PMIC 404, where the enable signal is used to indicate that the PMIC turns on a charging function for the corresponding battery.

As shown in fig. 5, the operating principle of the dual battery management circuit 40 is as follows:

s101, the comparator 405 compares voltages of the first battery 43 and the second battery 44, and outputs an enable signal to a PMIC coupled to a battery with a high voltage, so as to instruct the corresponding PMIC to turn on a charging function for the battery with the high voltage.

For example, as shown in fig. 6, if the voltage VBAT1 of the first battery 43 is higher than the voltage VBAT2 of the second battery 44, the comparator 405 outputs an enable signal to the first PMIC 403 to indicate that the first PMIC 403 turns on the charging function, and if the power adapter 41 is plugged in at this time, the first PMIC 403 turns on the switch Q11, the switch Q12, and the switch Q14, so that the charging current can be output to the first battery 43 to charge the first battery 43.

For example, as shown in fig. 7, if the voltage VBAT2 of the second battery 44 is higher than the voltage VBAT1 of the first battery 43, the comparator 405 outputs an enable signal to the second PMIC 404 to instruct the second PMIC 404 to turn on the charging function, and if the power adapter 41 is plugged in at this time, the second PMIC 404 turns on the switch Q21, the switch Q22, and the switch Q24, so that the charging current can be output to the second battery 44 to charge the second battery 44.

For a scene that the electronic device is shut down due to over-discharge of the battery, the normal operation of the whole electronic device cannot be guaranteed due to over-low battery voltage (for example, 2.4V), and only the operation of the PMIC can be guaranteed. If the power adapter 41 is plugged in, the battery with higher voltage can be charged to increase its power supply voltage, so that the battery can be restored to the power supply voltage (e.g. 3V) capable of ensuring the normal operation of the electronic device as soon as possible. Therefore, the comparator 405 functions to ensure that a battery with a relatively high voltage can be charged quickly in a scenario where the battery overdischarge causes the electronic device to shut down.

The present application takes the first PMIC 403 as an example of turning on the charging function, and in this case, the first PMIC 403 is used as the master PMIC, and the second PMIC 404 is used as the slave PMIC.

S102, the first PMIC 403 detects that the electronic device is turned on by being plugged into the power adapter 41 or by being turned on by pressing the power key for a long time when the electronic device is turned on.

If the power-on is triggered by a long press of the power-on key (i.e., the power adapter 41 is not plugged in and the battery is not being charged), the first PMIC 403 detects a power-on signal at a pin (not shown) coupled to the power-on key, and then steps S103-S104 are executed. If the power-on is triggered by the insertion of the power adapter 41 (i.e., the battery is being charged), the first PMIC 403 detects a higher charging voltage at the USB _ IN1 pin and performs steps S105-S106.

S103, if the voltage difference between the voltage VBAT1 of the first battery 43 and the voltage VBAT2 of the second battery 44 is less than the threshold Δ Vth (i.e., | VBAT1-VBAT2| <Δvth), the first PMIC 403 and the second PMIC 404 turn on the first battery 43 and the second battery 44, so that the first battery 43 and the second battery 44 are discharged in parallel.

Taking the first PMIC 403 as the master PMIC and the second PMIC 404 as the slave PMIC as an example, the first PMIC 403 may obtain the voltage VBAT1 of the first battery 43 by measuring the voltage of the pin VCHG _ OUT1, the second PMIC 404 may obtain the voltage VBAT2 of the second battery 44 by measuring the voltage of the pin VCHG _ OUT2, and then the voltage VBAT2 of the second battery 44 is sent to the first PMIC 403, and the first PMIC 403 compares the voltage difference between the voltage VBAT1 of the first battery 43 and the voltage VBAT2 of the second battery 44.

The first PMIC 403 turns on the switch Q14 and is in a saturation region, the first PMIC 403 indicates that the second PMIC 404 turns on the switch Q24 and is in a saturation region, so as to connect the first battery 43 and the second battery 44 in parallel, and the conduction current of the switch in the saturation region reaches the maximum (i.e. the conduction current does not increase with the increase of the gate voltage), at this time, the discharge current of the battery is not limited, i.e. the current limiting function is turned off, so that the battery can normally supply power to the load. As shown in fig. 8, the first PMIC 403 may turn off the switching transistor Q11 and the switching transistor Q12, the second PMIC 404 may turn off the switching transistor Q21 and the switching transistor Q22, and the first battery 43 and the second battery 44 connected in parallel may supply power to the load 45 together.

In the normal use process (in the non-charging mode) of the electronic device, the switching tube Q14 and the switching tube Q24 are always conducted, the voltage difference between the first battery 43 and the second battery 44 is small, the discharging can be synchronously performed, no large current is generated between the first battery 43 and the second battery 44, and the battery or the PMIC cannot be damaged.

S104, if the voltage difference between the voltage VBAT1 of the first battery 43 and the voltage VBAT2 of the second battery 44 is greater than or equal to the threshold Δ Vth, the first PMIC 403 and the second PMIC 404 conduct the first battery 43 and the second battery 44, and the first PMIC 403 or the second PMIC 404 limits the conduction current between the first battery 43 and the second battery 44, so that the battery with high voltage performs current-limiting charging on the battery with low voltage until the voltage difference between the voltage VBAT1 of the first battery 43 and the voltage VBAT2 of the second battery 44 is less than the threshold Δ Vth.

At this time, the first PMIC 403 turns on the switching tube Q14, the second PMIC 404 turns on the switching tube Q24, and controls one of the switching tube Q14 and the switching tube Q24 to be in the linear impedance region, and the on current of the switching tube can be adjusted by adjusting the equivalent resistance value of the switching tube in the linear impedance region, so that the on current of the switching tube is limited and controllable, thereby preventing a large current from being generated between the first battery 43 and the second battery 44.

For example, as shown in fig. 9, assuming that VBAT1> VBAT2 +. DELTA.Vth, the first PMIC 403 turns on the switch Q14 and is in a saturation region, and instructs the second PMIC 404 to turn on the switch Q24 and is in a linear impedance region, at this time, the first battery 43 not only supplies power to the load 45, but also charges the second battery 44 in a current-limiting manner. In this process, the voltage difference between the voltage VBAT1 of the first battery 43 and the voltage VBAT2 of the second battery 44 gradually decreases until the voltage difference between the voltage VBAT1 of the first battery 43 and the voltage VBAT2 of the second battery 44 is smaller than the threshold Δ Vth, and the step S103 is continuously executed.

For example, as shown in fig. 10, assuming that VBAT2> VBAT1 +. DELTA.Vth, the first PMIC 403 turns on the switch Q14 and is in a linear impedance region, and instructs the second PMIC 404 to turn on the switch Q24 and is in a saturation region, at this time, the second battery 44 not only supplies power to the load 45, but also charges the first battery 43 in a current-limiting manner. In this process, the voltage difference between the voltage VBAT1 of the first battery 43 and the voltage VBAT2 of the second battery 44 gradually decreases until the voltage difference between the voltage VBAT1 of the first battery 43 and the voltage VBAT2 of the second battery 44 is smaller than the threshold Δ Vth, and step S103 is executed continuously.

S105, if the voltage difference between the voltage VBAT1 of the first battery 43 and the voltage VBAT2 of the second battery 44 is smaller than the threshold Δ Vth (i.e., | VBAT1-VBAT2| <Δvth), the first PMIC 403 and the second PMIC 404 turn on the first battery 43 and the second battery 44, such that the first battery 43 and the second battery 44 are charged in parallel.

The first PMIC 403 turns on the switching transistor Q14 and is in a saturation region, the first PMIC 403 instructs the second PMIC 404 to turn on the switching transistor Q24 and is in the saturation region, so that the first battery 43 and the second battery 44 are connected in parallel, and the conduction current of the switching transistor in the saturation region reaches a maximum (i.e., the conduction current does not increase with the increase of the gate voltage), at this time, the charging current of the battery is not limited, i.e., the current limiting function is turned off, so that the battery can be charged as soon as possible. As shown in fig. 11, the first PMIC 403 and the second PMIC 404 not only supply power to the load 45, but also simultaneously charge the first battery 43 and the second battery 44.

During the charging process of the electronic device, the switching tube Q14 and the switching tube Q24 are always conducted, the voltage difference between the first battery 43 and the second battery 44 is small, the charging can be performed synchronously, no large current is generated between the first battery 43 and the second battery 44, and the battery or the PMIC cannot be damaged. In addition, when a certain battery is fully charged first, the corresponding PMIC may turn off the function of charging the battery (i.e., turn off the switching tube Q14 or Q24), and the two PMICs may continue to charge another battery that is not fully charged until the two batteries are fully charged, thereby solving the problem that a certain battery cannot be fully charged in a scheme of a single PMIC with a plurality of batteries.

S106, if the voltage difference between the voltage VBAT1 of the first battery 43 and the voltage VBAT2 of the second battery 44 is greater than or equal to the threshold Δ Vth, the PMIC corresponding to the battery with the high voltage stops charging the battery with the high voltage, the PMIC corresponding to the battery with the low voltage turns on a current limiting (limiting) function, and the first PMIC 403 and the second PMIC 404 charge the battery with the low voltage in a current limiting manner.

For example, as shown in fig. 12, assuming VBAT1> VBAT2 +. DELTA.Vth, the first PMIC 403 turns off the switch Q14 and instructs the second PMIC 404 to turn on the switch Q24 and to be in a linear impedance region, and the first PMIC 403 and the second PMIC 404 jointly charge the second battery 44 in a current-limiting manner. In this process, the voltage difference between the voltage VBAT1 of the first battery 43 and the voltage VBAT2 of the second battery 44 gradually decreases until the voltage difference between the voltage VBAT1 of the first battery 43 and the voltage VBAT2 of the second battery 44 is smaller than the threshold Δ Vth, and the step S105 is continuously executed.

For example, as shown in fig. 13, assuming that VBAT2> VBAT1 +. Δ Vth, the first PMIC 403 turns on the switch Q14 and is in a linear impedance region, and instructs the second PMIC 403 to turn off the switch Q24, at this time, the first and

second PMICs

403 and 404 commonly charge the first battery 43 in a current-limiting manner. In this process, the voltage difference between the voltage VBAT1 of the first battery 43 and the voltage VBAT2 of the second battery 44 gradually decreases until the voltage difference between the voltage VBAT1 of the first battery 43 and the voltage VBAT2 of the second battery 44 is smaller than the threshold Δ Vth, and the step S105 is continuously executed.

The double-battery management circuit and the electronic equipment provided by the embodiment of the application have the advantages that the voltage difference between the two batteries is compared, when the voltage difference is larger than the threshold value, the two batteries are conducted, in addition, the conducting current between the two batteries is limited by the two PMICs, so that the large current is prevented from being generated between the two batteries, and the voltage balance of the two batteries is realized.

It should be understood that, in the various embodiments of the present application, the sequence numbers of the above-mentioned processes do not imply any order of execution, and the order of execution of the processes should be determined by their functions and inherent logic, and should not constitute any limitation to the implementation process of the embodiments of the present application.

Those of ordinary skill in the art will appreciate that the various illustrative modules and algorithm steps described in connection with the embodiments disclosed herein may be implemented as electronic hardware, or combinations of computer software and electronic hardware. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the implementation. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present application.

It can be clearly understood by those skilled in the art that, for convenience and brevity of description, the specific working processes of the system, the apparatus and the module described above may refer to the corresponding processes in the foregoing method embodiments, and are not described herein again.

In the several embodiments provided in the present application, it should be understood that the disclosed system, apparatus and method may be implemented in other ways. For example, the above-described device embodiments are merely illustrative, and for example, the division of the modules is only one logical functional division, and other divisions may be realized in practice, for example, a plurality of modules or components may be combined or integrated into another device, or some features may be omitted, or not executed. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be an indirect coupling or communication connection through some interfaces, devices or modules, and may be in an electrical, mechanical or other form.

The modules described as separate parts may or may not be physically separate, and parts displayed as modules may or may not be physical modules, may be located in one device, or may be distributed on a plurality of devices. Some or all of the modules may be selected according to actual needs to achieve the purpose of the solution of the present embodiment.

In addition, functional modules in the embodiments of the present application may be integrated into one device, or each module may exist alone physically, or two or more modules are integrated into one device.

In the above embodiments, the implementation may be wholly or partially realized by software, hardware, firmware, or any combination thereof. When implemented using a software program, it may be implemented in whole or in part in the form of a computer program product. The computer program product includes one or more computer instructions. The procedures or functions described in accordance with the embodiments of the application are all or partially generated when the computer program instructions are loaded and executed on a computer. The computer may be a general purpose computer, a special purpose computer, a network of computers, or other programmable device. The computer instructions may be stored on a computer readable storage medium or transmitted from one computer readable storage medium to another, for example, from one website, computer, server, or data center to another website, computer, server, or data center via wire (e.g., coaxial cable, fiber optic, digital Subscriber Line (DSL)) or wireless (e.g., infrared, wireless, microwave, etc.). The computer-readable storage medium can be any available medium that can be accessed by a computer or can comprise one or more data storage devices, such as a server, a data center, etc., that can be integrated with the medium. The usable medium may be a magnetic medium (e.g., floppy Disk, hard Disk, magnetic tape), an optical medium (e.g., DVD), or a semiconductor medium (e.g., solid State Disk (SSD)), among others.

The above description is only for the specific embodiments of the present application, but the scope of the present application is not limited thereto, and any person skilled in the art can easily conceive of the changes or substitutions within the technical scope of the present application, and shall be covered by the scope of the present application. Therefore, the protection scope of the present application shall be subject to the protection scope of the claims.

Claims

1. A dual battery management circuit, comprising: a first PMIC and a second PMIC; the first PMIC is used for controlling charging and discharging of a first battery and measuring the voltage of the first battery, and the second PMIC is used for controlling charging and discharging of a second battery and measuring the voltage of the second battery; the first battery is coupled to a coupling point through the first PMIC, the second battery is coupled to the coupling point through the second PMIC, the coupling point is coupled to a load, and the coupling point is further configured to be coupled to a power source through the first PMIC and the second PMIC respectively; when a voltage difference between the first battery and the second battery is greater than or equal to a threshold, the first PMIC and the second PMIC are to:

and if the power supply is not connected, the first battery and the second battery are conducted, and the conduction current between the first battery and the second battery is limited, so that the battery with high voltage carries out current-limiting charging on the battery with low voltage.

2. The circuit of claim 1, wherein when a voltage difference between the first battery and the second battery is greater than or equal to a threshold, the first PMIC and the second PMIC are further to:

and if the power supply is connected, stopping charging the battery with high voltage, opening the current-limiting function, and performing current-limiting charging on the battery with low voltage.

3. The circuit of claim 1 or 2, wherein when the voltage difference between the first battery and the second battery is less than a threshold, the first PMIC and the second PMIC are further to:

and conducting the first battery and the second battery, and closing the current limiting function.

4. The circuit of claim 1 or 2, further comprising a comparator,

the comparator is used for comparing the voltage of the first battery with the voltage of the second battery and outputting an enable signal to the PMIC corresponding to the battery with high voltage, and the enable signal is used for indicating the corresponding PMIC to turn on the charging function of the battery with high voltage.

5. The circuit of claim 1 or claim 2 wherein the first PMIC includes a first switching transistor therein and the second PMIC includes a second switching transistor therein, the first battery being coupled to the coupling point through the first switching transistor and the second battery being coupled to the coupling point through the second switching transistor.

6. The circuit of claim 5, wherein conducting the first battery to the second battery and turning on a current limiting function comprises:

the first switch tube is controlled to be conducted, the second switch tube is controlled to be conducted, and one of the first switch tube and the second switch tube is controlled to be in a linear impedance region.

7. An electronic device, comprising the dual battery management circuit according to any one of claims 1 to 6, a first battery, and a second battery, wherein the dual battery management circuit is configured to manage charging and discharging of the first battery and the second battery.