CN218827141U - OLED display panel - Google Patents
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- CN218827141U CN218827141U CN202222938608.1U CN202222938608U CN218827141U CN 218827141 U CN218827141 U CN 218827141U CN 202222938608 U CN202222938608 U CN 202222938608U CN 218827141 U CN218827141 U CN 218827141U
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Abstract
The utility model provides a OLED display panel. The OLED display panel is characterized in that the buffer layer, the interlayer insulating layer, the passivation layer and the flat layer are provided with at least one groove for connecting the substrate and the pixel limiting layer in the GOA area, and the first shading part is formed in the groove, so that the first shading part has a shading effect on light, and the first shading part can prevent the light emitted by the light emitting function layer of the display area from irradiating the second thin film transistor in the GOA area, further avoid the influence of the light on the second thin film transistor in the GOA area, reduce the negative bias probability of the threshold voltage of the second thin film transistor and be beneficial to improving the electrical performance of the second thin film transistor; in addition, the second shading part is arranged, so that light emitted by the light-emitting function layer of the display area can be prevented from irradiating the first thin film transistor of the display area, and the electrical performance of the first thin film transistor can be improved.
Description
Technical Field
The utility model relates to a show technical field, especially relate to a OLED display panel.
Background
As a new generation Display technology, an OLED (organic light-emitting diode) has higher contrast, faster response speed and wider viewing angle compared to a conventional LCD (Liquid Crystal Display), and is widely applied to the fields of smart phones and TVs.
The driving of the horizontal scanning lines of the OLED display panel is realized by an external integrated circuit, and the external integrated circuit can control the progressive starting of the scanning lines of each stage. A Gate Driver on Array (GOA) technology, which is an Array substrate line driving technology, is to fabricate a Gate scanning driving circuit on a TFT Array substrate of an OLED display device by using a TFT (Thin Film Transistor) Array process to realize a line-by-line scanning driving method, which can reduce the number of external chips (ICs), so as to make a frame of the display device narrower and thinner, and to achieve a higher panel integration level, a richer product form, a simpler process flow, and a more competitive product in the future; and the equipment cost can be reduced, the module yield is improved, and the IC cost is saved.
The OLED display device is provided with a plurality of pixels which are arranged in an array mode, the organic light emitting diodes are driven to emit light through a pixel driving circuit, and the pixel driving circuit comprises a thin film transistor. Both the thin film transistor in the GOA area and the thin film transistor in the pixel driving circuit in the display area will generate negative bias in the threshold voltage of the thin film transistor due to the influence of light, so that the display picture will generate uneven brightness, which affects the display effect.
SUMMERY OF THE UTILITY MODEL
An object of the utility model is to provide an OLED display panel can avoid illumination to the second thin film transistor in GOA district and the influence of the first thin film transistor in display area.
In order to achieve the above object, the present invention provides an OLED display panel, which includes a substrate, a buffer layer disposed on the substrate, a first plate layer, a first gate and a second gate disposed on the buffer layer at an interval, an interlayer insulating layer covering the buffer layer, the first plate layer, the first gate and the second gate, a second plate layer, a first drain, a first source, a first active layer, a second drain, a second source and a second active layer disposed on the interlayer insulating layer, a passivation layer covering the interlayer insulating layer, the second plate layer, the first source, the first drain, the first active layer, the second drain, the second source and the second active layer, a flat layer disposed on the passivation layer, a pixel defining layer and an anode disposed on the flat layer, a light emitting functional layer disposed on the anode, and a cathode covering the light emitting functional layer and the pixel defining layer;
the substrate comprises a display area and a GOA area positioned on one side of the display area, the pixel limiting layer limits an opening area in the display area, and the anode and the light-emitting function layer are positioned in the opening area;
the first drain electrode, the first source electrode, the first active layer and the first grid electrode form a first thin film transistor, and the first thin film transistor is positioned in the display area; the second drain electrode, the second source electrode, the second active layer and the second grid electrode form a second thin film transistor, and the second thin film transistor is positioned in the GOA area;
one of the first drain electrode and the first source electrode is connected with the anode through the second diode layer;
the first polar plate layer is connected with the second polar plate layer through a first connecting part penetrating through the interlayer insulating layer, and the first polar plate layer and the second polar plate layer are both positioned in the display area;
the OLED display panel comprises a substrate, a pixel limiting layer, a buffer layer, an interlayer insulating layer, a passivation layer and a flat layer, wherein at least one groove for connecting the substrate and the pixel limiting layer is formed in a GOA region of the buffer layer, the interlayer insulating layer, the passivation layer and the flat layer;
the first thin film transistor is located between the opening area and the first light shielding portion, and the first light shielding portion is located between the first thin film transistor and the second thin film transistor.
The OLED display panel is also provided with a second shading part penetrating through the passivation layer and the flat layer; one end of the second diode layer close to the first thin film transistor is connected with the pixel limiting layer through the second shading part.
The first shading part, the second shading part and the pixel limiting layer are integrally formed and are a whole.
The materials of the first shading part, the second shading part and the pixel limiting layer are all black photoresistors.
One of the first drain electrode and the first source electrode is connected with the second diode layer, and the anode is connected with the second diode layer through a via hole penetrating through the passivation layer and the flat layer.
The first source electrode is connected with the second diode layer.
The OLED display panel further comprises a third pole plate layer arranged between the substrate and the buffer layer and located in the display area, and a second connecting portion penetrating through the buffer layer and the interlayer insulating layer, wherein the third pole plate layer is connected with the second pole plate layer through the second connecting portion.
The first drain electrode, the first source electrode, the second drain electrode, the second source electrode, the first connecting portion, the second connecting portion and the second diode layer are integrally formed, and the first source electrode, the second diode layer, the first connecting portion and the second connecting portion are integrated.
The first drain electrode, the first source electrode, the second drain electrode, the second source electrode, the first connecting portion, the second connecting portion and the second diode layer are made of light-tight metal.
The OLED display panel is an AMOLED display panel, the light-emitting function layer is an organic light-emitting material layer, and the second active layer is made of IGZO.
The utility model has the advantages that: the utility model discloses a OLED display panel, through set up the connection with buffer layer, interlayer insulation layer, passivation layer and flat layer in the GOA district at least one slot on layer is injectd to base plate and pixel to form first shading portion in the slot, because first shading portion has the effect of shielding to the light, consequently, the setting of first shading portion can avoid the second thin film transistor in the light irradiation GOA district that the luminous functional layer in display area sent, and then avoided light to cause the influence to the second thin film transistor in GOA district, thereby reduced the negative bias probability of the threshold voltage of second thin film transistor, be favorable to improving the electrical property of second thin film transistor. In addition, the second shading part is arranged, so that light emitted by the light emitting function layer of the display area can be prevented from irradiating the first thin film transistor of the display area, and the electrical performance of the first thin film transistor can be improved.
Drawings
For a better understanding of the features and technical content of the present invention, reference should be made to the following detailed description of the present invention and accompanying drawings, which are provided for the purpose of illustration and description and are not intended to limit the present invention.
In the drawings, there is shown in the drawings,
fig. 1 is a schematic structural diagram of an OLED display panel according to the present invention;
fig. 2 is a performance test chart of a second thin film transistor of an OLED display panel according to an embodiment of the present invention;
fig. 3 is a performance test chart of a second thin film transistor of the OLED display panel corresponding to the comparative example.
Detailed Description
To further illustrate the technical means and effects of the present invention, the following detailed description is given with reference to the preferred embodiments of the present invention and the accompanying drawings.
Referring to fig. 1, the present invention provides an OLED display panel, including a substrate 10, a buffer layer 20 disposed on the substrate 10, first plate layers 31, first gates 11 and second gates 21 disposed on the buffer layer 20 at intervals, an interlayer insulating layer 40 covering the buffer layer 20, the first plate layers 31, the first gates 11 and the second gates 21, a second plate layer 32, a first drain electrode 12, a first source electrode 13, a first active layer 14, a second drain electrode 22, a second source electrode 23 and a second active layer 24 disposed on the interlayer insulating layer 40, a passivation layer 60 covering the interlayer insulating layer 40, the second plate layer 32, the first source electrode 13, the first drain electrode 12, the first active layer 14, the second drain electrode 22, the second source electrode 23 and the second active layer 24, a flat layer 70 disposed on the passivation layer 60, a pixel defining layer 80 and an anode 811 disposed on the flat layer 70, a light emitting functional layer 812 disposed on the anode 811, and a cathode 813 covering the light emitting functional layer 812 and the pixel defining layer 80.
The substrate 10 includes a display area AA and a GOA area BB located at one side of the display area AA, the pixel defining layer 80 defines an opening area 81 in the display area AA, and the anode 811 and the light emitting functional layer 812 are located in the opening area 81.
The first drain electrode 12 and the first source electrode 13 are respectively connected with two ends of the first active layer 14, the first drain electrode 12, the first source electrode 13, the first active layer 14 and the first gate electrode 11 form a first thin film transistor 1, and the first thin film transistor 1 is located in the display area AA; the second drain 22 and the second source 23 are respectively connected to two ends of the second active layer 24, the second drain 22, the second source 23, the second active layer 24 and the second gate 21 form a second thin film transistor 2, and the second thin film transistor 2 is located in the GOA region BB.
One of the first drain electrode 12 and the first source electrode 13 is connected to the anode electrode 811 through the second plate layer 32.
The first plate layer 31 is connected to the second plate layer 32 by a first connection portion 51 penetrating through the interlayer insulating layer 40, and both the first plate layer 31 and the second plate layer 32 are located in the display area AA.
The buffer layer 20, the interlayer insulating layer 40, the passivation layer 60 and the planarization layer 70 are formed with at least one trench 910 in the GOA region BB, which connects the substrate 10 and the pixel defining layer 80, and the OLED display panel further includes a first light blocking portion 91 disposed in the trench 910. In this embodiment, the number of the grooves 910 is three.
The first thin film transistor 1 is located between the opening region 81 and the first light-shielding portion 91, and the first light-shielding portion 91 is located between the first thin film transistor 1 and the second thin film transistor 2.
Specifically, the OLED display panel is further provided with a second light shielding portion 92 penetrating through the passivation layer 60 and the planarization layer 70, and one end of the second diode layer 32 near the first thin film transistor 1 is connected to the pixel defining layer 80 through the second light shielding portion 92.
Specifically, the first light-shielding portion 91, the second light-shielding portion 92 and the pixel defining layer 80 are integrally formed, that is, the first light-shielding portion 91, the second light-shielding portion 92 and the pixel defining layer 80 are manufactured by the same process, and the materials of the first light-shielding portion 91, the second light-shielding portion 92 and the pixel defining layer 80 are the same. The above arrangement enables the first light-shielding portion 91 and the second light-shielding portion 92 to be formed in the manufacturing process of the pixel defining layer 80, that is, the first light-shielding portion 91 and the second light-shielding portion 92 are formed on the basis of the original process, and the number of photomasks is not increased, so that the process cost is not additionally increased. In this embodiment, the first light-shielding portion 91, the second light-shielding portion 92, and the pixel defining layer 80 are integrated, and the first light-shielding portion 91, the second light-shielding portion 92, and the pixel defining layer 80 are made of black photoresist.
Specifically, one of the first drain electrode 12 and the first source electrode 13 is connected to the second diode layer 32, and the anode 811 is connected to the second diode layer 32 through a via 814 penetrating the passivation layer 60 and the planarization layer 70. In this embodiment, the first source electrode 13 is connected to the second diode layer 32.
Specifically, the OLED display panel further includes a third plate layer 33 disposed between the substrate 10 and the buffer layer 20 and located in the display area AA, and a second connection portion 52 penetrating the buffer layer 20 and the interlayer insulating layer 40, wherein the third plate layer 33 is connected to the second plate layer 32 through the second connection portion 52. By adding the third plate layer 33, the first plate layer 31, and the second plate layer 32 constitute a three-layer overlap capacitance, so that an area required for capacitance in a horizontal direction is reduced, compared to a capacitance constituted only by the first plate layer 31 and the second plate layer 32, and thus a pixel of high resolution can be realized.
Specifically, the first drain electrode 12, the first source electrode 13, the second drain electrode 22, the second source electrode 23, the first connection portion 51, the second connection portion 52, and the second diode layer 32 are integrally formed, that is, the first drain electrode 12, the first source electrode 13, the second drain electrode 22, the second source electrode 23, the first connection portion 51, the second connection portion 52, and the second diode layer 32 are manufactured by using the same process, and the materials thereof are the same. The above arrangement enables the first connection portion 51, the second connection portion 52 and the second diode layer 32 to be formed in the manufacturing process of the first drain electrode 12, the first source electrode 13, the second drain electrode 22 and the second source electrode 23, that is, the first connection portion 51, the second connection portion 52 and the second diode layer 32 are formed on the basis of the original process, and the number of masks is not increased, so that the process cost is not additionally increased. In the present embodiment, the first source electrode 13, the second diode layer 32, the first connection portion 51, and the second connection portion 52 are integrated.
Specifically, the materials of the first drain electrode 12, the first source electrode 13, the second drain electrode 22, the second source electrode 23, the first connection portion 51, the second connection portion 52, and the second diode layer 32 are all opaque metals, which can perform a conductive function and can shield light well.
Specifically, the OLED display panel is an AMOLED (Active-matrix organic light-emitting diode) display panel, and the light-emitting function layer 812 is an organic light-emitting material layer (OLED). The material of the second active layer 24 is IGZO.
It should be noted that the present invention is provided with the first shading part, which can prevent the light emitted from the light emitting function layer of the display area from irradiating the second thin film transistor of the GOA area; the second shading part is arranged, so that the first thin film transistor of the display area can be prevented from being irradiated by light emitted by the light emitting function layer of the display area, and the first thin film transistor can be further shielded by the second diode layer, the first connecting part and the second connecting part, so that the probability of negative bias of threshold voltages of the first thin film transistor and the second thin film transistor is reduced, and the electrical properties of the first thin film transistor and the second thin film transistor are further ensured. In addition, the third electrode plate layer, the first electrode plate layer and the second electrode plate layer form a three-layer overlapping capacitor, so that the area required by the capacitor in the horizontal direction is reduced, and a pixel with high resolution can be realized.
Referring to fig. 2 and 3, the present invention provides the above embodiment and a comparative example corresponding to the embodiment, and the negative bias of the threshold voltage of the second thin film transistor 2 in the embodiment and the comparative example is measured. The OLED display panel provided by the comparative example is different from the OLED display panel provided by the above embodiment in that: the OLED display panel of the comparative example does not have the first light-shielding portion 91.
Specifically, in the examples and comparative examples, the initial value of the threshold voltage of the second thin film transistor 2 on the side of the GOA region close to the display region was set to 1V. When the OLED display panel was lit for 100h, ids of the second thin film transistor 2 was measured as Vgs after the OLED display panel was lit at a constant Vds in the example and the comparative example, respectively. Wherein Vds is the voltage difference between the drain and the source; ids is the current through the drain and source; vgs is the voltage difference between the gate and the drain.
For the second thin film transistor 2 of the embodiment, as shown in fig. 2, when Vds is 0.1V and 10.1V, vgs is about 0V, and the threshold voltage of the second thin film transistor 2 is 0V at this time, that is, the second thin film transistor 2 does not have a significant negative bias phenomenon.
In contrast, in the second thin film transistor 2 of the comparative example, when Vds is 0.1V, vgs is around-3V as shown in fig. 3, the negative bias value of the threshold voltage of the second thin film transistor 2 is-3V at this time, that is, the second thin film transistor 2 exhibits a significant negative bias phenomenon.
Therefore, the utility model discloses a set up first shading portion 91 in OLED display panel, can play good shielding effect to the side light that the display area AA produced and ambient light to avoid second thin film transistor 2's threshold voltage to take place negative deflection phenomenon, improved the electrical property of second thin film transistor 2 in the GOA district BB.
To sum up, the utility model provides a pair of OLED display panel, through set up buffer layer, interlayer insulation layer, passivation layer and flat layer in the GOA district and connect at least one slot on layer is injectd to base plate and pixel to form first shading portion in the slot, because first shading portion has the effect of shielding to the light, consequently, the setting of first shading portion can avoid the second thin film transistor in the light irradiation GOA district that the luminous functional layer in display area sent, and then avoided light to cause the influence to the second thin film transistor in GOA district, thereby reduced the negative bias probability of the threshold voltage of second thin film transistor, be favorable to improving the electrical property of second thin film transistor. In addition, the second shading part is arranged, so that light emitted by the light emitting function layer of the display area can be prevented from irradiating the first thin film transistor of the display area, and the electrical performance of the first thin film transistor can be improved.
From the above, it is obvious to those skilled in the art that various other changes and modifications can be made according to the technical solution and the technical idea of the present invention, and all such changes and modifications should fall within the protective scope of the appended claims.
Claims (10)
1. An OLED display panel, comprising a substrate (10), a buffer layer (20) disposed on the substrate (10), first plate layers (31), first grids (11) and second grids (21) disposed at intervals on the buffer layer (20), an interlayer insulating layer (40) covering the buffer layer (20), the first plate layers (31), the first grids (11) and the second grids (21), a second plate layer (32), a first drain electrode (12), a first source electrode (13), a first active layer (14), a second drain electrode (22), a second source electrode (23) and a second active layer (24) disposed on the interlayer insulating layer (40), a passivation layer (60) covering the interlayer insulating layer (40), the second plate layer (32), the first source electrode (13), the first drain electrode (12), the first active layer (14), the second drain electrode (22), the second source electrode (23) and the second active layer (24), a flat layer (70) disposed on the passivation layer (60), a pixel layer (70) disposed on the flat layer (811), and an anode functional layer (811) and a light-emitting layer (80) disposed on the anode layer (811), and a cathode (813) covering the light-emitting functional layer (812) and the pixel defining layer (80);
the substrate (10) comprises a display area (AA) and a GOA area (BB) positioned on one side of the display area (AA), the pixel defining layer (80) defines an opening area (81) in the display area (AA), and the anode (811) and the light-emitting functional layer (812) are positioned in the opening area (81);
the first drain electrode (12) and the first source electrode (13) are respectively connected with two ends of the first active layer (14), the first drain electrode (12), the first source electrode (13), the first active layer (14) and the first grid electrode (11) form a first thin film transistor (1), and the first thin film transistor (1) is located in the display area (AA); the second drain electrode (22) and the second source electrode (23) are respectively connected with two ends of the second active layer (24), the second drain electrode (22), the second source electrode (23), the second active layer (24) and the second grid electrode (21) form a second thin film transistor (2), and the second thin film transistor (2) is located in a GOA area (BB);
one of the first drain electrode (12) and the first source electrode (13) is connected to the anode electrode (811) through the second diode layer (32);
the first pole plate layer (31) is connected with the second pole plate layer (32) through a first connecting part (51) penetrating through the interlayer insulating layer (40), and the first pole plate layer (31) and the second pole plate layer (32) are both positioned in a display area (AA);
the buffer layer (20), the interlayer insulating layer (40), the passivation layer (60) and the flat layer (70) are provided with at least one groove (910) which is arranged in a GOA region (BB) and is used for connecting the substrate (10) and the pixel defining layer (80), and the OLED display panel further comprises a first shading part (91) arranged in the groove (910);
the first thin film transistor (1) is located between the opening area (81) and the first light shielding portion (91), and the first light shielding portion (91) is located between the first thin film transistor (1) and the second thin film transistor (2).
2. The OLED display panel according to claim 1, further provided with a second light shielding portion (92) penetrating the passivation layer (60) and the planarization layer (70), wherein an end of the second diode layer (32) near the first thin film transistor (1) is connected to the pixel defining layer (80) through the second light shielding portion (92).
3. The OLED display panel according to claim 2, wherein the first light shielding portion (91), the second light shielding portion (92), and the pixel defining layer (80) are integrally formed and are one piece.
4. The OLED display panel as claimed in claim 3, wherein the first light-shielding portion (91), the second light-shielding portion (92), and the pixel defining layer (80) are made of black photoresist.
5. The OLED display panel according to claim 1, wherein one of the first drain electrode (12) and the first source electrode (13) is connected to the second diode layer (32), and the anode electrode (811) is connected to the second diode layer (32) through a via hole (814) penetrating the passivation layer (60) and the planarization layer (70).
6. The OLED display panel according to claim 5, wherein the first source electrode (13) is connected to the second diode layer (32).
7. The OLED display panel according to claim 6, further comprising a third polarizer layer (33) disposed between the substrate (10) and the buffer layer (20) and located in the display area (AA), and a second connection portion (52) penetrating the buffer layer (20) and the interlayer insulating layer (40), wherein the third polarizer layer (33) is connected to the second polarizer layer (32) through the second connection portion (52).
8. The OLED display panel according to claim 7, wherein the first drain electrode (12), the first source electrode (13), the second drain electrode (22), the second source electrode (23), the first connection portion (51), the second connection portion (52) and the second diode layer (32) are integrally formed, and the first source electrode (13), the second diode layer (32), the first connection portion (51) and the second connection portion (52) are integrally formed.
9. The OLED display panel according to claim 8, wherein the first drain electrode (12), the first source electrode (13), the second drain electrode (22), the second source electrode (23), the first connection portion (51), the second connection portion (52), and the second diode layer (32) are made of opaque metal.
10. The OLED display panel according to claim 1, wherein the OLED display panel is an AMOLED display panel, the light emitting functional layer (812) is an organic light emitting material layer, and the material of the second active layer (24) is IGZO.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202222938608.1U CN218827141U (en) | 2022-11-04 | 2022-11-04 | OLED display panel |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202222938608.1U CN218827141U (en) | 2022-11-04 | 2022-11-04 | OLED display panel |
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| Publication Number | Publication Date |
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| CN218827141U true CN218827141U (en) | 2023-04-07 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN202222938608.1U Active CN218827141U (en) | 2022-11-04 | 2022-11-04 | OLED display panel |
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| CN (1) | CN218827141U (en) |
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- 2022-11-04 CN CN202222938608.1U patent/CN218827141U/en active Active
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