CN218586004U - Miniature light-emitting diode with dielectric frame - Google Patents
Miniature light-emitting diode with dielectric frame Download PDFInfo
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- CN218586004U CN218586004U CN202222633550.XU CN202222633550U CN218586004U CN 218586004 U CN218586004 U CN 218586004U CN 202222633550 U CN202222633550 U CN 202222633550U CN 218586004 U CN218586004 U CN 218586004U
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Abstract
The utility model provides a miniature emitting diode with dielectric substance frame, this miniature emitting diode includes: an n-type doped layer is epitaxial on the epitaxial substrate; a dielectric frame formed on the epitaxial substrate or the n-type doped layer; a multiple quantum well layer grown in the dielectric frame and on the n-type doped layer; a p-type doped layer is grown in the dielectric frame and positioned on the multiple quantum well layer; a first metal electrode connected to the p-type doped layer; a second metal electrode connected to the n-type doped layer or the epitaxial substrate; and a protective layer covering the dielectric frame and the outer surface of the transparent current spreading layer and exposing the first metal electrode and the second metal electrode; the defects caused by platform etching are effectively avoided, the problem that the EQE of the Micro-LED is rapidly reduced is solved from the source, and the luminous efficiency of the Micro-LED is effectively improved.
Description
Technical Field
The utility model relates to a miniature LED structure with dielectric substance frame.
Background
With the progress of the times, displays become thinner and more power saving, and the mainstream technology of displays has been actively invested from emerging OLED displays to Micro-LED (Micro-LED) displays, and Micro LED displays are expected to become the mainstream technology of displays of the next generation due to the excellent characteristics and feasibility of self-luminescence, low power consumption, fast response time, high brightness, ultra-high contrast, wide color gamut, wide viewing angle, ultra-thinness, long service life and adaptability to various operating temperatures, under the active participation of international leaders and industries. Micro LED technology will typically be millimeter (10) -3 m) scale conventional LED down to 100 microns (10) -6 m) is 1% of the original volume of the LED. However, in the production and assembly process, a macro transfer technique is required to transfer the micron-grade RGB three-color Micro LED dies grown on the epitaxial substrate (or called native substrate or homogeneous substrate) onto the display substrate (or called destination substrate), and the matrix arrangement of RGB pixels is addressed to control the brightness thereof to achieve full-color, so as to form a complete Micro LED display.
Therefore, the complexity, yield and throughput efficiency of mass transfer processes are considered to be critical challenges and troubles. Since the size of the epitaxial and classified dies is very small, it is an obstacle in the industry to accurately transfer Micro LED dies on the order of millions of microns to the correct position on the display substrate.
In order to get rid of the above-mentioned huge transfer problem, a technical solution of fabricating three RGB LED elements or at least two of the RGB LED elements on the same epitaxial substrate and laying out the LED elements according to the requirement of the finished product has been proposed, and the applicant of the present invention also proposes related proposals. In the manufacturing process of Micro-LED display, three primary colors of red, green and blue (RGB) LEDs are used to form unit pixels (pixels), and the current main manufacturing technology needs to mix the nitride (nitides) and phosphide (Phosphides) LEDs to meet the requirement of the three primary colors. When the light emitting diodes of different material systems are used in a mixed mode, different heating and attenuation characteristics directly influence the quality of image presentation; the different electrical driving characteristics directly result in complexity in the driving design of the display module. Therefore, if the light emitting diode with direct light emitting RGB (red, green, and blue) primary colors is implemented on the same material system, it is not only beneficial to solve the above problems, but also beneficial to the development of Micro LED technology because the elimination of the color light conversion mechanism such as phosphor will reduce the process complexity and the energy efficiency loss caused by conversion.
Indium gallium In nitride X Ga 1-X The N-type epitaxial material is one of the material systems for manufacturing mainstream blue light emitting diodes at present, theoretically, the whole visible light emitting range can be covered by means of indium gallium solid solution ratio regulation, indium gallium nitride is expected to have better light emitting efficiency due to the direct energy gap (energy gap) characteristic, and particularly, the blue light mass production technology is simple, so that the N-type epitaxial material receives more attention than other material systems, and has deep potential in manufacturing direct red green blue light emitting diodes (RGB direct LEDs) having similar control conditions and good efficiency. However, limited by the substrate, currently In X Ga 1-X The red light emitting diode of N series epitaxial material faces the technical bottleneck, because In needs to be added to reach the suitable red light emitting band X Ga 1-X The In content ratio of N-based epitaxy is required to be increased by lowering the temperature of epitaxy In the epitaxial production process, but the quality of epitaxy does not meet the application specification. Therefore, the red AlGaInP-based chip is still the main choice for the direct light emitting chip before the technology of the red InGaN-based chip is mature.
However, micro-LEDs are greatly scaled down in size along with the die size, and simultaneously face the problem of a rapid drop in External Quantum Efficiency (EQE). The Micro-LED element size needs to be reduced to less than 5-10 mu m to reach a lower cost level, and display commodities can compete with LCD and OLED displays in price; the EQE level of the existing general-size blue LED element reaches 80%, however, the EQE of the blue LED assembly scaled down to 5-10 μm is usually only 20% or less; such EQEs cannot support products that can exceed LCD, OLED display performance; therefore, the low EQE problem for Micro-LED elements must be solved effectively to enter a highly competitive consumer market.
The source of the EQE droop problem comes from the significant defect effect on the chip sidewall; the sidewall defects include structural damage, foreign contaminants, dangling bonds (SRH), and the like, which cause Shockley-Read-Hall (SRH) nonradiative carrier recombination effects at the sidewall surface. Related research and analysis have confirmed that these chip sidewall defects are mainly caused by mesa etching (mesa etch) of the LED chip, and the standard etching process of the LED chip generally employs ICP RIE dry etching, which uses high energy plasma, ion bombardment and chemical reaction to leave the above defects on the etched sidewall surface. The sidewall of the LED device with general size has the non-radiative recombination effect caused by the above defects, and as the device size shrinks, the proportion of the sidewall surface area to the entire surface area of the device increases, the sidewall defects have more significant influence on the entire light emitting efficiency of the device, and no matter the LED device enters the Micro-LED size range, the blue and green InGaN-based chips or the red AlGaInP-based chips both exhibit the rapid EQE drop phenomenon, especially, the EQE drop problem is more significant because the surface recombination rate and carrier diffusion length (carrier diffusion length) of the AlGaInP-based chips are greater than those of the InGaN-based chips.
Micro-LED dies face low EQE problems, mainly from sidewall defects caused by mesa etching (mesa etch). The most important improvement scheme at present is to make up the defects caused by the mesa etching by the subsequent defect removal or repair processes such as passivation layer (passivation layer) coating, or chemical treatment process of the sidewall surface. Wherein the passivation layer is coated with Al by Atomic Layer Deposition (ALD) 2 O 3 The passivation layer benefits are optimized over other processes such as PECVD and materials such as SiO 2 The improvement efficiency of (1); the passivation layer is combined and matched with a reflecting layer (reflector) for improving the Light Extraction Efficiency (LEE) of the componentBecome an important research and development subject; the defect removal process after the mesa etching is usually performed with KOH or NH 4 S, and the like, performing chemical treatment; n is a radical of 2 Plasma (plasma) processing is also one of the defect repair processes after the mesa etch.
However, in the above-mentioned various technical solutions, after the sidewall defects are formed, the subsequent additional processes are performed to remove or repair the defects, which is a solution of increasing the number of processes and making the processes more complicated, and only further limits the manufacturing yield and the production efficiency. How to avoid the defects and damages of the side wall caused by platform etching in advance and thoroughly eliminate the problem of EQE reduction can really achieve the technical effect of kettle bottom salary.
SUMMERY OF THE UTILITY MODEL
A primary objective of the present invention is to provide a Micro light emitting diode with dielectric frame, through forming the dielectric frame first to among the dielectric frame epitaxy, avoid the defect and the damage of the Micro LED lateral wall that the platform etching caused from this completely, and solve the problem that outside quantum efficiency (EQE) descends rapidly, and then improve Micro LED's luminous efficacy.
In order to achieve the above purpose, the solution of the present invention is:
the utility model discloses a miniature emitting diode with dielectric frame supplies the shaping on an epitaxial substrate, and this miniature emitting diode includes: an n-type doped layer, which is epitaxial on the epitaxial substrate; a dielectric frame formed on the epitaxial substrate or the n-type doped layer; a multiple quantum well layer grown in the dielectric frame and located on the n-type doped layer; a p-type doped layer grown in the dielectric frame and on the multiple quantum well layer; a first metal electrode connected to the p-type doped layer for conducting current to the p-type doped layer; a second metal electrode connected to the n-type doped layer or the epitaxial substrate; and a protective layer covering the outer surface of the dielectric frame and exposing the first metal electrode and the second metal electrode.
The dielectric frame is arranged on the n-type doped layer; the multiple quantum well layer and the p-type doped layer are laminated and grown in a first recess of the dielectric frame; the second metal electrode is arranged outside the dielectric frame, or the dielectric frame beside the lamination layer forms a second cavity, and the second metal electrode is arranged in the second cavity.
The dielectric frame is arranged on the epitaxial substrate, and the n-type doped layer is located in the dielectric frame.
The n-type doping layer, the multiple quantum well layer and the p-type doping layer are grown in a first recess of the dielectric frame in a laminated mode; the second metal electrode is arranged outside the dielectric frame, or the dielectric frame beside the lamination layer forms a second cavity, and the second metal electrode is arranged in the second cavity.
The micro light-emitting diode also comprises a transparent current dispersion layer positioned between the p-type doping layer and the first metal electrode and used for dispersing the current of the first metal electrode to the p-type doping layer, and the protection layer is covered on the outer surfaces of the dielectric frame and the transparent current dispersion layer.
When the second metal electrode is connected to the n-type doped layer in an conduction mode, the epitaxial substrate is a sapphire (sapphire) substrate, the n-type doped layer is made of n-type gallium nitride (GaN) or n-type indium gallium nitride (InGaN), the multiple quantum well layer is made of indium gallium nitride (InGaN), and the p-type doped layer is made of p-type gallium nitride (GaN) or p-type indium gallium nitride (InGaN). When the second metal electrode is connected with the epitaxial substrate in a conduction mode, the epitaxial substrate is a gallium arsenide (GaAs) conductive substrate, the material of the n-type doping layer is n-type aluminum gallium indium phosphide (AlGaInP), the material of the multiple quantum well layer is aluminum gallium indium phosphide (AlGaInP), and the material of the p-type doping layer is p-type aluminum gallium indium phosphide (AlGaInP).
The inner wall of the dielectric frame is inclined inwards from top to bottom. Or the outer wall of the dielectric frame inclines inwards from top to bottom.
The dielectric frame is made of silicon dioxide (SiO) 2 ) And silicon nitride (Si) 3 N 4 ) At least one of the p-type doped layer and the first metal electrode is a transparent current spreading layer made of Indium Tin Oxide (ITO), the protective layer comprises a passivation layer or a reflective layer, and the passivation layer is made of aluminum oxide (Al) 2 O 3 ) And silicon dioxide (SiO) 2 ) Wherein the reflective layer is a Distributed Bragg Reflector (DBR).
The utility model discloses a preparation method of miniature emitting diode with dielectric substance frame, its step includes:
s1, forming an n-type doped layer and a dielectric layer on an epitaxial substrate, and etching the dielectric layer once to form a first cavity, wherein the n-type doped layer is arranged below the dielectric layer or the n-type doped layer is arranged in the first cavity;
s2, growing a multiple quantum well layer on the n-type doped layer, wherein the multiple quantum well layer is positioned in the first cavity;
s3, growing a p-type doping layer on the multiple quantum well layer, wherein the p-type doping layer is located in the first cavity;
s4, etching the dielectric layer on the periphery of the first recess for the second time to form a dielectric frame;
s5, forming a first metal electrode for conducting current to the p-type doped layer and forming a second metal electrode on one of the n-type doped layer and the epitaxial substrate; and forming a protective layer, wherein the protective layer covers the outer surface of the dielectric frame and exposes the first metal electrode and the second metal electrode.
In step S1, an n-type doped layer is formed on the epitaxial substrate, and then a dielectric layer is formed on the n-type doped layer.
Before or after the step S4, adding the steps of: forming a transparent current spreading layer on the p-type doped layer, so that the transparent current spreading layer is between the p-type doped layer and the first metal electrode for spreading the current of the first metal electrode to the p-type doped layer.
After adopting the above technical scheme, the utility model discloses utilize amorphous dielectric layer like silicon dioxide (SiO) 2 ) Or silicon nitride (Si) 3 N 4 ) Firstly, a proper amorphous dielectric layer frame (frame) is manufactured, then epitaxy is sequentially carried out in the frame, so that a Micro-LED structure manufactured in a platform etching mode can be replaced, the side wall damage and defect effects of the Micro-LED caused by platform etching are completely avoided, the problem of rapid drop of EQE of the Micro-LED is solved from the source, and the rapid drop of EQE is solvedThe problem of fast decline effectively improves Micro LED's luminous efficiency, and the improvement in the processing procedure also makes product yield and output efficiency obtain promoting moreover.
The utility model discloses a shaping earlier has the dielectric frame of predetermined overall arrangement, but lets in the different frames on the same base plate the different look Micro LED crystalline grains of epitaxy, can form polychrome crystalline grain on making single base plate, constitutes full-color pixel.
The utility model discloses can be through selecting dielectric substance frame shape, solve the stress problem in manufacturing and the use in step to promote the Efficiency (Light Extraction Efficiency) of Light Extraction. Specifically, a dielectric frame with an inner wall inclined from top to bottom may be selected to relieve stress during epitaxy of the multiple quantum well layer and the p-type doping layer, and a dielectric frame with an outer side inclined from top to bottom may be further used to improve light extraction efficiency.
Drawings
FIG. 1 is a flow chart of a method for manufacturing a first preferred embodiment of the present invention;
FIGS. 2A to 2E are structural cross-sectional views of intermediate steps of the manufacturing process of FIG. 1;
fig. 2F is a sectional view of the first preferred embodiment of the present invention;
fig. 3 is a sectional view of a second preferred embodiment of the present invention;
fig. 4 is a sectional view of a third preferred embodiment of the present invention;
fig. 5 is a sectional view showing a fourth preferred embodiment of the present invention;
fig. 6 is a sectional view of the fifth preferred embodiment of the present invention.
Description of the reference symbols
1. 1', 2, 3, 4 … … … … … … micro light-emitting diode
11. 11', 21, 31, 41 … … … … epitaxial substrate
12. 12', 22, 32, 42 … … … … dielectric frame
13. 13', 23, 33, 43 … … … … n-doped layer
14. 14', 24, 34, 44 … … … … multiple quantum well layers
15. 15', 25, 35, 45 … … … … p-type doped layer
16. 16', 26, 36, 46 … … … … transparent current spreading layer
17. 17', 27, 37, 47 … … … … first metal electrode
18. 18', 28, 38, 48 … … … … second metal electrode
19. 19', 29, 39, 49 … … … … protective layer
120 … … … … … … … … … … … … dielectric layer
121 … … … … … … … … … … … … first cavity
122 … … … … … … … … … … … … second cavity
Detailed Description
The following description of the embodiments of the present invention is provided for illustration, and other advantages and effects of the present invention will be apparent to those skilled in the art from the description. The drawings show the structure, ratio, size and the like only for the purpose of matching with the disclosure of the specification, so as to be understood and read by those skilled in the art, and not for the purpose of limiting the practice of the present invention, and it is not technically essential that any structural modification, ratio relationship change or size adjustment should be made without affecting the efficacy and the achievable purpose of the present invention. In the present specification, the terms "a", "an", "two" and "upper" are used for convenience and clarity only, and are not intended to limit the scope of the present invention, and changes or adjustments of the relative relationship thereof are also considered as the scope of the present invention without substantial changes in the technical content.
As shown in fig. 1, a method for fabricating a micro light emitting diode 1 with a dielectric frame according to a first embodiment of the present invention includes first forming an n-type doped layer 13 of n-type gallium nitride (GaN) or n-type indium gallium nitride (InGaN) on an epitaxial substrate 11, such as sapphire (sapphire), as shown in fig. 2A, and forming a layer, such as SiO, on the n-type doped layer 13 as shown in fig. 2B 2 Or silicon nitride (Si) 3 N 4 ) As shown in fig. 2C, the dielectric layer 120 is etched once to form a first cavity 121, and after the first cavity 121 is etched out of the dielectric layer 120, the remaining portion forms a peripheral wall for limiting the subsequent epitaxial structure.
Subsequently, in step S2, a multiple quantum well layer 14 of, for example, indium gallium nitride (InGaN) based material is epitaxially grown as a main light emitting layer on the n-type doped layer 13 in the first cavity 121 according to the outer limit of the first cavity 121; step S3 is also limited by the limitation of the first cavity 121, and as shown in fig. 2D, p-type gallium nitride (GaN) or p-type indium gallium nitride (InGaN) is grown on the multiple quantum well layer 14 as the p-type doped layer 15, where the p-type doped layer 15 is flush with the dielectric rim 12 in the height direction. In order to distribute the current horizontally so that electron hole pair recombination sites are not too concentrated under the first metal electrode 17 to cause a light blocking problem, step S4' is added to form a transparent current spreading layer 16, such as Indium Tin Oxide (ITO), over the p-doped layer 15.
Next, in step S4, as shown in fig. 2E, the dielectric layer 120 around the first cavity 121 is etched for the second time, so as to form the dielectric frame 12. In step S5, a second cavity 122 is formed at the dielectric frame 12 beside the stacked layer to expose the n-doped layer 13, and filled with metal to form a second metal electrode 18 connected to the n-doped layer 13, and a first metal electrode 17 is formed on the transparent current spreading layer 16, so as to form a complete LED circuit. Finally, an outer surface passivation layer 19 is formed to cover the dielectric frame 12 and the transparent current spreading layer 16, and the top ends of the first metal electrode 17 and the second metal electrode 18 are exposed for conduction. The protective layer 19 may comprise a passivation layer of aluminum oxide (Al) or a reflective layer 2 O 3 ) And silicon dioxide (SiO) 2 ) One of them, the reflective layer is a Distributed Bragg Reflector (DBR) to improve the light output efficiency of the micro light emitting diode 1.
Obviously, since the mqw layer 14 and the p-type doped layer 15 are both confined by the dielectric frame 12 for epitaxy, the mesa etching technique and the accompanying sidewall defect are eliminated, thereby overcoming the technical problem of EQE reduction and effectively improving the light emitting efficiency of the micro light emitting diode.
Of course, as one skilled in the art will readily appreciate, a wider dielectric frame is required to support subsequent processing if isolation/passivation/mechanical strength is required. As shown in fig. 3, the micro light emitting diode 1 'having a dielectric frame according to the second embodiment of the present invention has the same structure as that of the first embodiment, such as the epitaxial substrate 11', the n-type doped layer 13', the dielectric frame 12', the mqw layer 14', the p-type doped layer 15', the transparent current spreading layer 16', the first metal electrode 17', the second metal electrode 18', and the passivation layer 19', the step S4 is directly performed after the step S3, the dielectric layer around the first cavity 121 is further etched for a second time to form the dielectric frame 12', the width of the dielectric frame 12' is narrower than that of the dielectric frame 12 of the previous embodiment, the passivation layer 19 'covers the dielectric frame 12', and the second metal electrode 18 'is located outside the dielectric frame 12', so that the extension in the height direction is lower.
In addition, in the foregoing embodiment, the dielectric frame is formed on the n-doped layer, but it can be easily understood by those skilled in the art that, as the micro light emitting diode 2 with the dielectric frame shown in the third preferred embodiment of fig. 4, the dielectric layer can also be formed directly on the epitaxial substrate 21, such as sapphire, and the first cavity 121 is formed by etching the dielectric layer at one time, so that the n-doped layer 23 and the multiple quantum well layer 24 and the p-doped layer 25 on the subsequent epitaxial layer are also epitaxially grown in the surrounding area defined by the dielectric first cavity 121; etching the dielectric layer around the first cavity 121 again to form a dielectric frame 22, wherein the transparent current spreading layer 26 is located on the p-type doped layer 25 and is also higher than the dielectric frame 22; then, the multiple quantum well layer 24 and the p-type doping layer 25 are partially excavated to expose the n-type doping layer 23, the excavated part is filled with a dielectric layer, and then a second cavity 122 is formed in the dielectric frame 22 and at the dielectric layer filling position, so that the n-type doping layer 23 is exposed in the second cavity 122; the first metal electrode 27 is formed on the transparent current spreading layer 26; the second metal electrode 28 fills the second cavity 122 and is connected to the n-type doped layer 23; a passivation layer 29 covering the outer surfaces of the dielectric frame 22 and the transparent current spreading layer 26 and exposing the first metal electrode 27 and the second metal electrode 28.
Referring to fig. 5 again, a micro light emitting diode 3 with a dielectric frame according to a fourth embodiment of the present invention includes: a gallium arsenide (GaAs) conductive substrate as the epitaxial substrate 31; an n-type doped layer 33 epitaxial on the epitaxial substrate 31; a dielectric layer formed on the epitaxial substrate 31 and etched once to form a first cavity 121, the n-type doped layer 33 being located in the first cavity 121; a multiple quantum well layer 34 grown in the dielectric first cavity 121 and on the n-doped layer 33; a p-type doped layer 35 grown in the dielectric first cavity 121 and on the mqw layer 34; as in the first embodiment, the dielectric layer around the first cavity 121 is etched twice to form the dielectric frame 32, and a transparent current spreading layer 36 is located on the p-type doped layer 35; as in the first embodiment, a second cavity 122 is formed at the dielectric frame 12 beside the stack; a first metal electrode 37 connected to the transparent current spreading layer 36; a second metal electrode 38 filled in the second cavity 122 and electrically connected to the epitaxial substrate 31; and a passivation layer 39 covering the outer surfaces of the dielectric frame 32 and the transparent current spreading layer 36 and exposing the first metal electrode 37 and the second metal electrode 38. In this embodiment, the inner wall of the dielectric frame 32 is inclined inward from top to bottom, thereby relieving the stress of the mqw layer 34 and the p-type doped layer 35 during epitaxy.
Referring to fig. 6 again, a fifth embodiment of the present invention is a micro light emitting diode 4 with a dielectric frame, including: an epitaxial substrate 41; an n-type doped layer 43 epitaxial on the epitaxial substrate 41; a dielectric layer formed on the n-type doped layer 43, and a first cavity 121 is formed by etching the dielectric layer; a multiple quantum well layer 44 grown in the dielectric first cavity 121 and on the n-doped layer 43; a p-type doped layer 45 grown in the dielectric first cavity 121 and on the MQW layer 44; a transparent current spreading layer 46 on the p-doped layer 45; as in the first embodiment, the dielectric layer around the first cavity 121 is etched twice to form the dielectric frame 42; a first metal electrode 47 connected to the transparent current spreading layer 46; a second metal electrode 48 connected to the n-type doped layer 43; and a passivation layer 49 covering the outer surfaces of the dielectric frame 42, the n-type doped layer 43 and the transparent current spreading layer 46 and exposing the first metal electrode 47 and the second metal electrode 48. In this example, not only the inner wall of the dielectric frame 42 is inclined from top to bottom and the stress of the multiple quantum well layer 44 and the p-type doped layer 45 during epitaxy is relieved, but also the outer side of the dielectric frame 42 is inclined from top to bottom and outward, thereby facilitating the improvement of light extraction efficiency.
Although the transparent current spreading layer is formed on the p-type doped layer in the above embodiments, those skilled in the art can easily understand that the first metal electrode itself can make the current distribution uniform and disperse, and the transparent current spreading layer does not need to be provided, which still belongs to the scope of the present invention. After the Micro LED dies are manufactured on the epitaxial substrate, the dies can be separated from the epitaxial substrate by Laser Lift Off (LLO), grinding of the epitaxial substrate or wet etching, and then the Micro LED dies or the Micro LED die array originally formed on the epitaxial substrate is transferred, so that the required range of the invention includes the Micro LED dies existing on the epitaxial substrate or transferred from the epitaxial substrate; in addition, si may be added 3 N 4 SiO is pre-formed at the bottom of the dielectric frame 2 As the stop layer for etching the frame, and wet etching to remove SiO in the frame 2 So as to reduce the dry etching damage of the n epitaxial layer, all the related measures within the range of the epitaxial process based on the enhancement of the light emitting performance or characteristics of the device can be compatible with the dielectric frame process of the present invention, such as superlattice (super lattice), electron Blocking Layer (EBL), cladding layer (cladding layer)r), or a special hetero material layer introduced into the multiple quantum well structure for the purpose of stress action or band engineering (band engineering), such variations are still included in the following claims of the present invention.
To sum up, the utility model discloses miniature emitting diode with dielectric frame and preparation method thereof is because have this dielectric frame, consequently can avoid the platform etching to cause the defect and the damage of miniature emitting diode lateral wall, and solves the problem that outside quantum efficiency descends rapidly, and then improves miniature emitting diode's luminous efficacy. In addition, the inner wall of the dielectric frame is inclined inwards from top to bottom, so that the stress of the multiple quantum well layer and the p-type doping layer during epitaxy can be relieved, and the outer side of the dielectric frame is inclined outwards from top to bottom, so that the light extraction efficiency is improved.
It should be noted that the key point of the present case is that the dielectric layer is formed by etching the dielectric layer twice to form the dielectric frame 12, so that the present invention can form a single independent micro led, and the size of the micro led can be controlled by controlling the size of the dielectric frame 12, so that the present invention can be applied to a mass transfer technology to better meet the requirement of actual assembly. When the epitaxial substrate is gallium arsenide, the second metal electrode 18 may be formed in the dielectric rim 12 or outside the dielectric rim 12. The transparent current spreading layer 16 may be formed before the dielectric frame 12 is formed by the second etching or after the dielectric frame 12 is formed by the second etching. In addition, in step S5, the forming sequence of the first metal electrode 17, the second metal electrode 18 and the protective layer 19 is not limited by the specific embodiment, and the first metal electrode 17 and the second metal electrode 18 may be formed first and then the protective layer 19 is covered; or the protective layer 19 is covered first, then the protective layer 19 is partially removed, and then the first metal electrode 17 and the second metal electrode 18 are formed; it is also possible to form one of the first metal electrode 17 and the second metal electrode 18 first, then cover the protective layer 19, and then form the other of the first metal electrode 17 and the second metal electrode 18; or in other sequences not listed herein, and will not be described further herein.
The above-described embodiments are merely illustrative of the principles and effects of the present invention, and are not to be construed as limiting the invention. Even so, those skilled in the art can modify the above embodiments without departing from the spirit and scope of the present invention. The scope of the invention should, therefore, be determined with reference to the appended claims.
Claims (9)
1. A micro light-emitting diode with a dielectric frame is characterized in that: is formed on an epitaxial substrate, the micro light-emitting diode includes:
an n-type doped layer, which is epitaxial on the epitaxial substrate;
a dielectric frame formed on the epitaxial substrate or the n-type doped layer;
a multiple quantum well layer grown in the dielectric frame and located on the n-type doped layer;
a p-type doped layer grown in the dielectric frame and on the multiple quantum well layer;
a first metal electrode connected to the p-type doped layer for conducting current;
a second metal electrode connected to the n-type doped layer or the epitaxial substrate; and
and the protective layer is covered on the outer surface of the dielectric frame and exposes the first metal electrode and the second metal electrode.
2. The micro light-emitting diode with a dielectric bezel of claim 1, wherein: the dielectric frame is arranged on the n-type doped layer; the multiple quantum well layer and the p-type doped layer are laminated and grown in a first recess of the dielectric frame; the second metal electrode is arranged outside the dielectric frame, or the dielectric frame beside the lamination layer forms a second cavity, and the second metal electrode is arranged in the second cavity.
3. The micro light-emitting diode with a dielectric bezel of claim 1, wherein: the dielectric frame is arranged on the epitaxial substrate, and the n-type doped layer is located in the dielectric frame.
4. The micro light-emitting diode with a dielectric bezel of claim 3, wherein: the n-type doping layer, the multiple quantum well layer and the p-type doping layer are grown in a first recess of the dielectric frame in a laminated mode; the second metal electrode is arranged outside the dielectric frame, or the dielectric frame beside the lamination layer forms a second cavity, and the second metal electrode is arranged in the second cavity.
5. The micro light-emitting diode with a dielectric border of claim 1, wherein: the protective layer is covered on the outer surfaces of the dielectric frame and the transparent current dispersion layer.
6. The micro light-emitting diode with a dielectric bezel of claim 1, wherein: when the second metal electrode is connected with the n-type doping layer in a conduction mode, the epitaxial substrate is a sapphire substrate, the n-type doping layer is made of n-type gallium nitride or n-type indium gallium nitride, the multiple quantum well layer is made of indium gallium nitride, and the p-type doping layer is made of p-type gallium nitride or p-type indium gallium nitride.
7. The micro light-emitting diode with a dielectric bezel of claim 1, wherein: when the second metal electrode is connected with the epitaxial substrate in a conduction mode, the epitaxial substrate is a gallium arsenide conducting substrate, the material of the n-type doping layer is n-type aluminum gallium indium phosphide, the material of the multiple quantum well layer is aluminum gallium indium phosphide, and the material of the p-type doping layer is p-type aluminum gallium indium phosphide.
8. The micro light-emitting diode with a dielectric bezel of claim 1, wherein: the inner wall of the dielectric frame is inclined inwards from top to bottom; or the outer wall of the dielectric frame inclines inwards from top to bottom.
9. The micro light-emitting diode with a dielectric bezel of claim 1, wherein: the dielectric frame is made of at least one of silicon dioxide and silicon nitride, the transparent current dispersion layer is arranged between the p-type doping layer and the first metal electrode, the transparent current dispersion layer is made of indium tin oxide, the protection layer comprises a passivation layer or a reflection layer, the passivation layer is made of one of aluminum oxide and silicon dioxide, and the reflection layer is a distributed Bragg reflector.
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| CN202222633550.XU CN218586004U (en) | 2022-10-08 | 2022-10-08 | Miniature light-emitting diode with dielectric frame |
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| CN202222633550.XU CN218586004U (en) | 2022-10-08 | 2022-10-08 | Miniature light-emitting diode with dielectric frame |
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2022
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