CN218548215U - High-voltage-resistant surface-mounted high-voltage capacitor - Google Patents
High-voltage-resistant surface-mounted high-voltage capacitor Download PDFInfo
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- CN218548215U CN218548215U CN202222302739.0U CN202222302739U CN218548215U CN 218548215 U CN218548215 U CN 218548215U CN 202222302739 U CN202222302739 U CN 202222302739U CN 218548215 U CN218548215 U CN 218548215U
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- 239000003990 capacitor Substances 0.000 title claims abstract description 46
- 239000000919 ceramic Substances 0.000 claims abstract description 31
- 238000005538 encapsulation Methods 0.000 abstract description 6
- 230000006872 improvement Effects 0.000 abstract description 4
- 238000009826 distribution Methods 0.000 abstract description 2
- 238000004806 packaging method and process Methods 0.000 description 6
- 238000003780 insertion Methods 0.000 description 3
- 150000002500 ions Chemical class 0.000 description 3
- 230000015556 catabolic process Effects 0.000 description 2
- 230000008859 change Effects 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000010586 diagram Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 230000008569 process Effects 0.000 description 1
- 238000003466 welding Methods 0.000 description 1
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Abstract
The utility model discloses a high pressure resistant SMD high-voltage capacitor, include: ceramic dielectric, terminal electrodes at both ends of the ceramic dielectric; the ceramic medium is internally provided with at least two groups of first electrode plate groups and at least two groups of second electrode plate groups, the first electrode plate groups comprise a plurality of layers of electrode plates, and the second electrode plate groups comprise a plurality of layers of electrode plates; the first electrode plate groups and the second electrode plate groups are staggered, a row is formed in the middle in the ceramic medium, and the adjacent ends of the electrode plates in the adjacent first electrode plate groups and the adjacent ends of the electrode plates in the second electrode plate groups are overlapped in sequence; the end electrodes at two ends are connected with the first electrode plate group or the second electrode plate group which is close to the first electrode plate group or the second electrode plate group. The utility model discloses, through the electrode slice distribution mode in crisscross, the range upon range of mode setting ceramic dielectric, can effectual improvement SMD high-voltage capacitor's compressive property, compare with SMD high-voltage capacitor's resistance to pressure under the same encapsulation improvement several times.
Description
Technical Field
The utility model relates to an electronic components technical field, concretely relates to high pressure resistant SMD high-voltage capacitor.
Background
The volume of an electronic product is influenced by the size of an electronic device inside the electronic product, and more electronic components are required to be placed in a limited space, so that old direct-insertion type electronic components cannot be replaced by the old direct-insertion type electronic components, and the old direct-insertion type electronic components are replaced by the existing numerous surface-mounted electronic components. The electronic components of SMD are small, and welding is convenient, produces the variety with the wide application to all kinds of electronics now.
The capacitor is packaged in a direct-insert type or a patch type. Taking the patch capacitor with the packaging specification of 1206 as an example, the highest withstand voltage of the conventional 1206-packaged patch capacitor can reach 3000V. The larger the packaging specification of the chip capacitor is, the higher the voltage resistance of the chip capacitor is, but the voltage resistance of the chip capacitor cannot reach the voltage resistance level of tens of thousands of volts. The capacitor, especially the high-voltage capacitor, also needs to be used in the production of the ion generator, because the ion generator needs very high voltage when producing positive and negative ions, generally can exceed 10000V, present paster type high-voltage capacitor can not realize that can also stably work under the environment that exceeds 5000V, when using this kind of paster type high-voltage capacitor, has influenced the overall stability of product.
Disclosure of Invention
The utility model provides a high pressure resistant SMD high-voltage capacitor to solve the not high problem of SMD high-voltage capacitor resistance to pressure among the prior art.
The utility model provides a high pressure resistant SMD high voltage capacitor, include: ceramic dielectric, terminal electrodes at both ends of the ceramic dielectric;
at least two groups of first electrode plate groups and at least two groups of second electrode plate groups are arranged in the ceramic medium, the first electrode plate groups comprise a plurality of layers of electrode plates, and the second electrode plate groups comprise a plurality of layers of electrode plates; the first electrode plate groups and the second electrode plate groups are staggered, a row is formed in the middle in the ceramic medium, and the adjacent ends of the electrode plates in the adjacent first electrode plate groups and the adjacent ends of the electrode plates in the second electrode plate groups are overlapped in sequence; the end electrodes at the two ends are connected with the first electrode sheet group or the second electrode sheet group which is close to the first electrode sheet group or the second electrode sheet group.
Furthermore, 3 first electrode plate groups and 2 second electrode plate groups are arranged in the ceramic medium; forming a row in the middle of the ceramic medium in a staggered arrangement mode of a first electrode plate group, a second electrode plate group, a first electrode plate group, a second electrode plate group and a first electrode plate group; the end electrodes at the two ends are connected with the adjacent first electrode plate groups.
Furthermore, 4 first electrode plate groups and 3 second electrode plate groups are arranged in the ceramic medium; forming a row in the middle of the ceramic medium in a staggered arrangement mode of a first electrode plate group, a second electrode plate group, a first electrode plate group, a second electrode plate group and a first electrode plate group; the end electrodes at the two ends are connected with the adjacent first electrode plate groups.
Further, the range of the distance h between the overlapping ends of the electrode plates in the first electrode plate group and the electrode plates in the second electrode plate group is as follows: 90-120 mu m.
Further, the distance h is: 105 μm.
Furthermore, the number of electrode slices in the first electrode slice group is the same as that in the second electrode slice group.
Furthermore, the number of layers of the electrode plates in the first electrode plate group and the second electrode plate group is different by one layer.
Furthermore, the electrode plates in the first electrode plate group are at equal intervals or at unequal intervals; the electrode plates in the second electrode plate group are at equal intervals or at unequal intervals.
Further, the spacing between the electrode sheets in the first electrode sheet group is the same as the spacing between the electrode sheets in the second electrode sheet group.
Furthermore, the number of the electrode plates in the first electrode plate group and the number of the electrode plates in the second electrode plate group are set according to the capacity required by the capacitor.
The utility model has the advantages that:
the utility model discloses, through the electrode slice distribution mode in crisscross, range upon range of mode setting ceramic dielectric, can effectual improvement SMD high-voltage capacitor's compressive property, than with SMD high-voltage capacitor's under the encapsulation resistance to pressure improvement several times. The utility model discloses a rationally change the quantity of electrode plate group, further improve the compressive property of paster electric capacity under the same encapsulation specification. The utility model discloses a rationally change the interval of overlap department electrode slice, can make electrode piece group gather more under the prerequisite of guaranteeing the resistance to pressure, keep away from the encapsulation edge, avoid high-pressure breakdown electric capacity.
Drawings
The features and advantages of the invention will be more clearly understood by reference to the accompanying drawings, which are schematic and should not be understood as imposing any limitation on the invention, in which:
FIG. 1 is a schematic cross-sectional view of embodiment 1 of the present invention;
FIG. 2 is a schematic cross-sectional view of embodiment 2 of the present invention;
fig. 3 is a schematic diagram of the series connection of equivalent capacitors according to an embodiment of the present invention.
Detailed Description
To make the purpose, technical solution and advantages of the embodiments of the present invention clearer, the attached drawings in the embodiments of the present invention are combined to clearly and completely describe the technical solution in the embodiments of the present invention, and obviously, the described embodiments are part of the embodiments of the present invention, rather than all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without making creative efforts belong to the protection scope of the present invention.
The embodiment of the utility model provides a high pressure resistant SMD high-voltage capacitor, include: a ceramic medium 1, terminal electrodes 2 at two ends of the ceramic medium 1;
at least two groups of first electrode plate groups 3 and at least two groups of second electrode plate groups 4 are arranged in the ceramic medium 1, the first electrode plate groups 3 comprise a plurality of layers of electrode plates 5, and the second electrode plate groups 4 comprise a plurality of layers of electrode plates 5;
the electrode plates 5 in the electrode plate group are embedded in the ceramic medium 1 layer by layer, and the embedding process, the embedding mode and the like are the same as the arrangement of the electrode plates 5 in the conventional chip capacitor. The distances between the electrode plates 5 in the electrode plate group can be the same, or can be partially the same or partially different, and the setting of the distances is adjusted according to the packaging requirements of the capacitor. The distance setting mode of the electrode plates 5 in the first electrode plate group 3 is the same as that of the electrode plates 5 in the second electrode plate group 4, so that the distance between the middle electrode plate 5 and the upper and lower electrode plates 5 is the same when the electrode plates are overlapped.
The first electrode sheet groups 3 and the second electrode sheet groups 4 are arranged in a staggered manner, and when viewed from a longitudinal section as shown in fig. 1 and 2, a row is formed in the middle of the ceramic medium 1, which can be equivalent to the series connection of a plurality of capacitors as shown in fig. 3, the adjacent ends of the electrode sheets 5 in the adjacent first electrode sheet groups 3 and the electrode sheets 5 in the second electrode sheet groups 4 are overlapped in sequence, and when the electrode sheets are overlapped, the distances from the electrode sheet 5 in another group sandwiched between the two adjacent electrode sheets 5 in the same group to the upper and lower electrode sheets 5 are the same. The end electrodes 2 at two ends are connected with the first electrode sheet group 3 or the second electrode sheet group 4 which are close to each other, and because of staggered arrangement, when the number of the first electrode sheet group 3 is the same as that of the second electrode sheet group 4, the end electrode 2 at one end is connected with the first electrode sheet group 3, and the end electrode 2 at the other end is connected with the second electrode sheet group 4; when the number of the first electrode sheet group 3 is different from that of the second electrode sheet group 4 by one, the terminal electrodes 2 at the two ends are connected with the first electrode sheet group 3 which is close to the terminal electrodes.
In order to ensure that the voltage resistance of the high-voltage capacitor is better and the distance between the electrode plate 5 and the packaging edge cannot cause capacitor breakdown due to high voltage, the range of the distance h between the overlapping ends of the electrode plate 5 in the first electrode plate group 3 and the electrode plate 5 in the second electrode plate group 4 is as follows: 90 to 120 μm, the most preferred spacing h being: 105 μm.
The utility model provides a following two embodiments, all select the encapsulation mode that the encapsulation specification is 1206.
Example 1:
as shown in fig. 1, there are 3 first electrode plate groups 3 and 2 second electrode plate groups 4 in a ceramic medium 1; a row is formed in the middle part in the ceramic medium 1 in a staggered arrangement mode of a first electrode plate group 3, a second electrode plate group 4, the first electrode plate group 3, the second electrode plate group 4 and the first electrode plate group 3, and the arrangement mode can be equivalent to two capacitors which are connected in series; the terminal electrodes 2 at both ends are connected with the adjacent first electrode sheet group 3.
Example 2:
as shown in fig. 2, there are 4 first electrode plate groups 3 and 3 second electrode plate groups 4 in the ceramic dielectric 1; the staggered arrangement mode of the first electrode plate group 3, the second electrode plate group 4, the first electrode plate group 3, the second electrode plate group 4 and the first electrode plate group 3 is equivalent to the series connection of three capacitors, and a row is formed in the middle of the ceramic medium 1; the terminal electrodes 2 at the two ends are connected with the adjacent first electrode sheet group 3.
The structure shown in fig. 2 has better pressure resistance in a limited space structure because a group of the first electrode sheet group 3 and the second electrode sheet group 4 is added.
The matching number of the electrode plate sets in the two embodiments is the example of the package 1206, and compared with the existing high-voltage capacitor packaged by 1206, the voltage resistance of the capacitor can reach more than 10000V, and especially the voltage resistance of the capacitor is more stable by the scheme provided by embodiment 2. The matching quantity of the electrode plate groups can be adjusted according to the packaging size by other packaging models, and the pressure resistance of the electrode plate groups is improved on the premise of ensuring the size requirement.
The number of layers of the electrode plate 5 can be adjusted according to the capacity required by the capacitor, and the larger the capacity requirement is, the more the number of layers is. This also makes the number of electrode sheets 5 in the first electrode sheet group 3 and the second electrode sheet group 4 equal or different by one.
Although the embodiments of the present invention have been described with reference to the accompanying drawings, those skilled in the art may make various modifications and variations without departing from the spirit and scope of the invention, and such modifications and variations fall within the scope defined by the appended claims.
Claims (10)
1. A high voltage resistant SMD high voltage capacitor includes: ceramic dielectric, terminal electrodes at both ends of the ceramic dielectric, characterized in that,
the ceramic medium is internally provided with at least two groups of first electrode plate groups and at least two groups of second electrode plate groups, the first electrode plate groups comprise a plurality of layers of electrode plates, and the second electrode plate groups comprise a plurality of layers of electrode plates; the first electrode plate groups and the second electrode plate groups are staggered, a row is formed in the middle in the ceramic medium, and the adjacent ends of the electrode plates in the adjacent first electrode plate groups and the adjacent ends of the electrode plates in the second electrode plate groups are overlapped in sequence; the end electrodes at two ends are connected with the first electrode plate group or the second electrode plate group which is close to the first electrode plate group or the second electrode plate group.
2. The high-voltage-resistant patch type high-voltage capacitor according to claim 1, wherein the ceramic dielectric has 3 first electrode plate groups and 2 second electrode plate groups; forming a row in the middle of the ceramic medium in a staggered arrangement mode of a first electrode plate group, a second electrode plate group, a first electrode plate group, a second electrode plate group and a first electrode plate group; the end electrodes at the two ends are connected with the adjacent first electrode plate groups.
3. The high-voltage-resistant patch type high-voltage capacitor according to claim 1, wherein the ceramic dielectric has 4 first electrode plate groups and 3 second electrode plate groups; forming a row in the middle of the ceramic medium in a staggered arrangement mode of a first electrode plate group, a second electrode plate group, a first electrode plate group, a second electrode plate group and a first electrode plate group; the end electrodes at the two ends are connected with the adjacent first electrode plate groups.
4. The high-voltage-resistant patch type high-voltage capacitor according to any one of claims 1 to 3, wherein the distance h between the overlapping ends of the electrode plates in the first electrode plate group and the electrode plates in the second electrode plate group is in the range: 90-120 mu m.
5. The high voltage resistant patch type high voltage capacitor of claim 4, wherein the distance h is: 105 μm.
6. The high-voltage resistant patch type high-voltage capacitor according to claim 1, wherein the number of electrode sheets in the first electrode sheet group is the same as that in the second electrode sheet group.
7. The high-voltage resistant patch type high-voltage capacitor according to claim 1, wherein the number of layers of the electrode sheets in the first electrode sheet group is different from that of the electrode sheets in the second electrode sheet group by one layer.
8. The high-voltage-resistant patch type high-voltage capacitor according to claim 1, wherein the electrode plates in the first electrode plate group are equally spaced or unequally spaced; the electrode plates in the second electrode plate group are at equal intervals or at unequal intervals.
9. The high-voltage resistant patch type high-voltage capacitor according to claim 1 or 8, wherein the spacing between the electrode sheets in the first electrode sheet set is the same as the spacing between the electrode sheets in the second electrode sheet set.
10. The high-voltage resistant patch type high-voltage capacitor according to claim 1, wherein the number of the electrode sheets in the first electrode sheet group and the number of the electrode sheets in the second electrode sheet group are set according to the capacity required by the capacitor.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202222302739.0U CN218548215U (en) | 2022-08-31 | 2022-08-31 | High-voltage-resistant surface-mounted high-voltage capacitor |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202222302739.0U CN218548215U (en) | 2022-08-31 | 2022-08-31 | High-voltage-resistant surface-mounted high-voltage capacitor |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN218548215U true CN218548215U (en) | 2023-02-28 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202222302739.0U Expired - Fee Related CN218548215U (en) | 2022-08-31 | 2022-08-31 | High-voltage-resistant surface-mounted high-voltage capacitor |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN218548215U (en) |
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2022
- 2022-08-31 CN CN202222302739.0U patent/CN218548215U/en not_active Expired - Fee Related
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Granted publication date: 20230228 |