CN218525041U - Over-temperature detection circuit, linear voltage regulator, chip and electronic equipment - Google Patents

Over-temperature detection circuit, linear voltage regulator, chip and electronic equipment Download PDF

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CN218525041U
CN218525041U CN202222773307.8U CN202222773307U CN218525041U CN 218525041 U CN218525041 U CN 218525041U CN 202222773307 U CN202222773307 U CN 202222773307U CN 218525041 U CN218525041 U CN 218525041U
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mos tube
over
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李念龙
余东升
刘珍超
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Shanghai Awinic Technology Co Ltd
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Shanghai Awinic Technology Co Ltd
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Abstract

The application discloses an over-temperature detection circuit, a linear voltage regulator, a chip and electronic equipment, and relates to the technical field of integrated circuits, wherein the circuit comprises a first input module, a second input module and a control module, wherein the first input module is used for acquiring a first bias signal and generating a positive voltage signal; the second input module is used for acquiring a second bias signal and generating a negative pressure signal, and the negative pressure signal is reduced along with the increase of the temperature; and the comparison module is respectively connected with the first input module and the second input module and used for comparing the positive pressure signal with the negative pressure signal and outputting an over-temperature signal when the positive pressure signal is greater than the negative pressure signal. The positive pressure signal and the negative pressure signal are obtained through the first input module and the second input module, the positive pressure signal and the negative pressure signal are sent to the comparison module to determine a voltage difference value, then the over-temperature signal is determined according to the voltage difference value, and circuit layout can be performed by the aid of the first input module, the second input module and the comparison module, so that the circuit layout area is reduced, and requirements of users on circuit or IC layout miniaturization are met.

Description

Over-temperature detection circuit, linear voltage regulator, chip and electronic equipment
Technical Field
The application relates to the technical field of integrated circuits, in particular to an over-temperature detection circuit, a linear voltage regulator, a chip and electronic equipment.
Background
The conventional over-temperature protection circuit comprises an over-temperature detection sub-circuit and an over-temperature protection sub-circuit, wherein the over-temperature detection circuit obtains forward current through a first branch circuit obtained by combining a bipolar triode, a resistor and a PMOS (P-channel metal oxide semiconductor) tube, obtains reverse current through a second branch circuit obtained by combining a plurality of bipolar triodes, resistors and NMOS (N-channel metal oxide semiconductor) tubes, then sends the forward current and the reverse current into an inverter, judges the level states of the forward current and the reverse current by using the inverter, and cuts off or shuts off the over-temperature protection sub-circuit connected with the inverter when the output of the inverter is high level, so that the over-temperature protection of the circuit is completed.
Although the prior art can realize the over-temperature detection of the circuit by using various element combinations, the over-temperature detection sub-circuit uses various element combinations, so that the layout area of the circuit or the IC is large, and the requirement of a user on the miniaturization of the layout of the circuit or the IC cannot be met.
SUMMERY OF THE UTILITY MODEL
In view of this, the present application provides an over-temperature detection circuit, a linear regulator, a chip and an electronic device, so as to solve the problem that the requirement of a user on miniaturization of a circuit or IC layout cannot be met due to a large circuit layout area in the conventional over-temperature detection circuit.
The application provides a detection circuitry that crosses temperature includes:
the first input module is used for acquiring a first bias signal and generating a positive voltage signal;
the second input module is used for acquiring a second bias signal and generating a negative pressure signal, and the negative pressure signal is reduced along with the increase of the temperature;
and the comparison module is respectively connected with the first input module and the second input module and used for comparing the positive pressure signal with the negative pressure signal, and when the positive pressure signal is greater than the negative pressure signal, an over-temperature signal is output.
The over-temperature detection circuit further comprises a bias module, which is respectively connected with the first input module and the second input module, and is used for providing a first bias signal for the first input module and providing a second bias signal for the second input module, wherein the first bias signal is used for providing a working voltage and a working current for stabilizing the working state of the first input module for the first input module; the second bias signal is used for providing working voltage and working current for stabilizing the working state of the second input module to the second input module;
and the power supply module is connected with the bias module and used for supplying power to the bias module so that the bias module outputs the first bias signal and the second bias signal.
Wherein the power supply module comprises a current source.
Wherein the comparison module comprises:
a first input end of the comparator is connected with the output end of the first input module, and a second input end of the comparator is connected with the output end of the second input module; and the output end of the comparator is used for outputting the over-temperature signal.
Wherein the first input module comprises:
the drain electrode of the first MOS tube is respectively connected with the first input end of the comparison module and the output end of the bias module, the drain electrode of the first MOS tube is used for acquiring the first bias signal and outputting the positive pressure signal to the comparison module, the grid electrode of the first MOS tube is connected with the source electrode of the first MOS tube, and the source electrode of the first MOS tube is grounded.
Wherein the second input module comprises:
the emitter of the first triode is used for acquiring the second bias signal and outputting the negative pressure signal to the comparison module, the emitter of the first triode is used for the grid electrode of the second MOS tube and the source electrode of the second MOS tube to be connected, and the source electrode of the second MOS tube and the collector electrode of the first triode are all grounded.
The bias module comprises a third MOS tube, a fourth MOS tube, a fifth MOS tube and a sixth MOS tube;
the drain electrode of the third MOS tube, the drain electrode of the fourth MOS tube, the drain electrode of the fifth MOS tube and the drain electrode of the sixth MOS tube are all connected with a power supply, the source electrode of the third MOS tube is connected with the power supply module, and the source electrode of the third MOS tube is also respectively connected with the grid electrode of the third MOS tube, the grid electrode of the fourth MOS tube, the grid electrode of the fifth MOS tube and the grid electrode of the sixth MOS tube; the source electrode of the fourth MOS tube is respectively connected with the first input module and the comparison module;
and the source electrode of the fifth MOS tube is connected with the second input module, and the source electrode of the sixth MOS tube is respectively connected with the second input module and the comparison module.
The width-length ratio of the first MOS tube channel is smaller than that of the second MOS tube channel.
Wherein the positive pressure signal
Figure BDA0003900376240000031
The negative pressure signal
Figure BDA0003900376240000032
The parameters of the first MOS tube, the second MOS tube and the first triode are set to meet the following conditions:
when the ambient temperature is equal to or less than the preset temperature When the positive pressure signal is less than the negative pressure signal,
Figure BDA0003900376240000041
Figure BDA0003900376240000042
when the environment temperature is higher than the preset temperature and the positive pressure signal is higher than the negative pressure signal,
Figure BDA0003900376240000043
wherein VTHP is expressed as the threshold voltage of the PMOS tube; IB1 represents the bias current provided to the power supply module and up represents the mobility of holes; cox represents the gate oxide capacitance per unit area; W1/L1 is expressed as the width-length ratio of the channel of the first MOS tube; W2/L2 is expressed as the width-length ratio of the channel of the second MOS tube; vbe1 is represented as the voltage between the emitter and the base of the first transistor.
Wherein the preset temperature is in the range of 140 ℃ to 160 ℃.
Wherein the comparator is a hysteresis voltage comparator.
The current mirror proportion of the third MOS tube, the fourth MOS tube, the fifth MOS tube and the sixth MOS tube is 1:1:1:1.
the application provides a linear voltage regulator, includes the aforesaid excess temperature detection circuit.
The chip provided by the application comprises the over-temperature detection circuit or the linear voltage stabilizer.
The electronic equipment provided by the application comprises the over-temperature detection circuit, the linear voltage regulator or the chip.
The above-mentioned excess temperature detection circuitry that provides of this application acquires malleation signal and negative pressure signal through first input module and second input module, sends into comparison module with malleation signal and negative pressure signal and compares, judges whether malleation signal is greater than negative pressure signal to determine whether there is excess temperature in the circuit, utilize first input module, second input module and comparison module to carry out the circuit layout in this embodiment, reduce circuit layout area, thereby satisfy the user to the miniaturized requirement of circuit or IC overall arrangement.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed to be used in the description of the embodiments are briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present application, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.
Fig. 1 is a schematic structural diagram of an over-temperature detection circuit according to an embodiment of the present application;
FIG. 2 is a schematic diagram of an over-temperature detection circuit according to an alternative embodiment of the present application;
FIG. 3 is a schematic structural diagram of an over-temperature detection circuit according to an embodiment of the present disclosure;
FIG. 4 is a schematic diagram of an over-temperature detection circuit according to an alternative embodiment of the present application;
fig. 5 is a schematic diagram of an over-temperature detection circuit according to an alternative embodiment of the present application.
Detailed Description
The technical solutions in the embodiments of the present application are clearly and completely described below with reference to the accompanying drawings, and it is obvious that the described embodiments are only a part of the embodiments of the present application, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application. The following embodiments and their technical features may be combined with each other without conflict.
In the application process of existing circuit products such as LDO (low dropout regulator) or DC-DC (direct current to direct current), the junction temperature of the circuit may rise due to over-high ambient temperature or heat generated by dissipated power, and if the temperature is over-high, for example, higher than 150 ℃, the life of the circuit may be affected and even thermal breakdown may be caused. In the existing over-temperature detection circuit, the over-temperature detection occupies a larger layout area, and the integration of the circuit is improved in order to avoid circuit damage and reduce the layout area.
Referring to fig. 1, fig. 1 is a schematic structural diagram of an over-temperature detection circuit according to an embodiment of the present disclosure.
The embodiment of the application provides an excess temperature detection circuit, includes:
the first input module 1 is used for acquiring a first offset signal IN1 and generating a positive voltage signal;
the second input module 2 is used for acquiring a second bias signal IN2 and generating a negative pressure signal; the negative pressure signal decreases as the temperature increases;
and the comparison module 3 is respectively connected with the first input module 1 and the second input module 2 and is used for comparing the positive pressure signal with the negative pressure signal and outputting an over-temperature signal EN _ OUT when the positive pressure signal is greater than the negative pressure signal.
The excess temperature detection circuit that this embodiment provided acquires malleation signal and negative pressure signal through first input module 1 and second input module 2, send malleation signal and negative pressure signal into comparison module 3 and compare, judge whether malleation signal is greater than the negative pressure signal, thereby it exists the excess temperature to determine in the circuit, utilize first input module 1, second input module 2 and comparison module 3 to carry out the circuit layout in this embodiment, reduce circuit layout area, thereby satisfy the requirement that the user is miniaturized to circuit or IC layout.
Fig. 2 shows an over-temperature detection circuit provided in this embodiment, and fig. 2 is a schematic structural diagram of an optional over-temperature detection circuit provided in this embodiment.
It should be noted that, in fig. 2, a bias signal I for stabilizing the over-temperature detection circuit is also provided 1 、I 2 、I 3 So that the over-temperature detection circuit can work normally.
The over-temperature detection circuit provided by the embodiment includes a first input module 1, a second input module 2, and a comparison module 3.
The first input module 1 includes a first MOS transistor MP1.
The second input module comprises a second MOS transistor MP2 and a first triode Q1.
The comparison module 3 comprises a comparator.
Wherein, the drain electrode of the first MOS transistor MP1 is used for receiving the bias signal I 1 The drain of the first MOS transistor MP1 is connected to the first input terminal of the comparator, and the source and the gate of the first MOS transistor MP1 are connected toA ground; the drain electrode of the second MOS transistor MP2 is used for receiving the bias signal I 3 The drain electrode of the second MOS tube MP2 is also connected with the base electrode of the first triode Q1, and the grid electrode and the source electrode of the second MOS tube MP2 are grounded; the emitter of the first triode Q1 is used for receiving a bias signal I 2 The emitter of the first triode Q1 is connected to the second input terminal of the comparator, and the collector of the first triode Q1 is connected to ground.
In this embodiment, the first MOS transistor MP1, the second MOS transistor MP2, and the first transistor Q1 are compared by the comparing module 3 after utilizing the negative temperature characteristics (temperature rise at negative temperature), and then the over-temperature signal EN _ OUT is output. In the embodiment, the MOS tube and the triode are used for simplifying the circuit layout, and the layout area occupied by the resistor layout is reduced, so that the requirement of a user on the miniaturization of the circuit or IC layout is met.
As shown in fig. 3, fig. 3 is a schematic structural diagram of an over-temperature detection circuit according to an alternative embodiment of the present application, where the over-temperature detection circuit includes a first input module 1, a second input module 2, and a comparison module 3, and the over-temperature detection circuit may further include:
the bias module 4 is respectively connected with the first input module 1 and the second input module 2, and is used for providing a first bias signal to the first input module 1 and providing a second bias signal to the second input module 2, wherein the first bias signal is used for providing a working voltage and a working current for stabilizing the working state of the first input module 1 to the first input module 1; the second bias signal is used to provide the second input module 2 with a working voltage and a working current that stabilize the working state of the second input module 2.
And the power supply module 5 is connected with the bias module 4 and used for supplying power to the bias module 4 so that the bias module 4 outputs a first bias signal and a second bias signal.
Optionally, the power supply module 5 comprises a current source DC.
Optionally, in order to reduce the circuit layout area and meet the requirements of users on circuit or IC layout, the comparison module 3 may be a comparator, and the positive voltage signal and the negative voltage signal can be quickly obtained by setting the comparator to perform positive and negative voltage signal comparison.
The first end of the comparator is connected with the first input module 1 and the bias module 4 respectively, the second end of the comparator is connected with the second input module 2 and the bias module 4, the third end of the comparator is connected with a power supply, the fourth end of the comparator is grounded, and the fifth end of the comparator is used for outputting an over-temperature signal EN _ OUT, wherein the first end of the comparator is a first input end of the comparison module, the second end of the comparator is a second input end of the comparison module, and the fifth end of the comparator is an output end of the comparison module.
Optionally, in order to reduce the occurrence of signal misjudgment and improve the anti-interference capability of the comparison module 3, the comparator used in the comparison module may be a hysteresis voltage comparator.
The excess temperature detection circuit that this embodiment provided through setting up biasing module 4 and power module 5, makes its excess temperature detection circuit can normally work, guarantees that positive voltage signal and the negative voltage signal gathered can be normally gathered by comparison module 3, guarantees the stability of circuit, simultaneously through carrying out the modularized design, can also optimize or reduce the area that the component occupy the circuit territory.
It should be noted that, in the prior art, when the over-temperature detection circuit is designed, a plurality of resistors are used for designing, and the over-temperature detection circuit occupies a large layout area due to the arrangement of the resistors, which is not favorable for the requirement of a user on circuit miniaturization. In the embodiment of the application, in order to improve the requirements of occupying a large layout area and being not beneficial to the miniaturization of the circuit by a user, the problems that the resistance occupies a large layout area and is not beneficial to the miniaturization of the circuit by the user existing in the over-temperature detection circuit in the prior art are solved by utilizing the negative temperature characteristic of the transistor (the MOS transistor and the switching transistor) and the integration of the comparator and the voltage comparison function.
Referring to fig. 3 to 4, fig. 3 is a schematic structural diagram of an over-temperature detection circuit according to an alternative embodiment of the present application. Fig. 4 is a schematic diagram of an over-temperature detection circuit according to an alternative embodiment of the present application.
It should be noted that, in the over-temperature detection circuit provided in this embodiment, the bias module 4 and the power supply module 5 are additionally arranged on the basis of the over-temperature detection circuit shown in fig. 1, where the bias module 4 includes a first bias unit and a second bias unit.
The over-temperature detection circuit provided by the embodiment comprises a first input module 1, a second input module 2, a comparison module 3, a bias module 4 and a power supply module 5.
The first input module 1 includes a first MOS transistor MP1.
The second input module 2 includes a second MOS transistor MP2 and a first transistor Q1.
The comparison module 3 comprises a comparator.
The first bias unit includes a third MOS transistor MP3 and a fourth MOS transistor MP4.
The second bias unit includes a fifth MOS transistor MP5 and a sixth MOS transistor MP6.
The drain of the first MOS transistor MP1 is connected to the first input terminal of the comparison module 3 and the output terminal of the bias module 4, the drain of the first MOS transistor MP1 is used for acquiring the first bias signal IN1 and outputting the first voltage signal to the bias module 4, the gate of the first MOS transistor MP1 is connected to the source of the first MOS transistor MP1, and the source of the first MOS transistor MP1 is grounded.
The drain electrode of the second MOS transistor MP2 is connected to the output terminal of the bias module 4 and the base electrode of the first triode Q1, the emitter electrode of the first triode Q1 is connected to the second input terminal of the comparison module 3 and the output terminal of the bias module 4, the gate electrode of the second MOS transistor MP2 is connected to the source electrode of the second MOS transistor MP2, and the source electrode of the second MOS transistor MP2 and the collector electrode of the first triode Q1 are both grounded.
The first input end of the comparator is connected with the output end of the first input module, and the second input end of the comparator is connected with the output end of the second input module; the output end of the comparator is used for outputting an over-temperature signal EN _ OUT.
The first input end of the comparator is connected with the drain electrode of the first MOS transistor MP1, the second input end of the comparator is connected with the emitter electrode of the first triode Q1, and the output end of the comparator is used for outputting an over-temperature signal EN _ OUT.
The drain electrode of the third MOS transistor MP3 and the drain electrode of the fourth MOS transistor MP4 are both connected to a power supply, the source electrode of the third MOS transistor MP3 is connected to the power supply module 5, and the source electrode of the third MOS transistor MP3 is also connected to the gate electrode of the third MOS transistor MP3 and the gate electrode of the fourth MOS transistor MP4, respectively; the source of the fourth MOS transistor MP4 is connected to the first input module 1 and the comparison module 3, respectively.
The second bias unit comprises a fifth MOS transistor MP5 and a sixth MOS transistor MP6; the drain electrode of the fifth MOS transistor MP5 and the drain electrode of the sixth MOS transistor MP6 are both connected to the power supply, the gate electrode of the fifth MOS transistor MP5 is connected to the gate electrode of the sixth MOS transistor MP6, and the gate electrode of the fifth MOS transistor MP5 is further connected to the power supply module 5; the source of the fifth MOS transistor MP5 is connected to the second input module 2, and the source of the sixth MOS transistor MP6 is connected to the second input module 2 and the comparison module 3, respectively.
The power supply module 5 provides a bias signal for the current source DC to the third MOS transistor MP3, the fourth MOS transistor MP4, the fifth MOS transistor MP5, and the sixth MOS transistor MP6, and controls the third MOS transistor MP3, the fourth MOS transistor MP4, the fifth MOS transistor MP5, and the sixth MOS transistor MP6 to operate; the current mirror proportion of the third MOS transistor MP3, the fourth MOS transistor MP4, the fifth MOS transistor MP5, and the sixth MOS transistor MP6 is 1:1:1:1.
in this embodiment, in order to detect the over-temperature circuit and reduce the occupied area of the circuit layout, the aspect ratio of the first MOS transistor MP1 and the second MOS transistor MP2 in the over-temperature detection circuit needs to satisfy: the length-to-width ratio of the channel of the first MOS transistor MP1 is smaller than that of the channel of the second MOS transistor MP 2.
In addition, to be able to detect circuit over-temperature, the positive voltage signal may be set to:
Figure BDA0003900376240000101
the negative pressure signal is set as:
Figure BDA0003900376240000102
if the circuit is required to be subjected to over-temperature detection, the parameters of the first MOS tube, the second MOS tube and the first triode are required to be set to satisfy the following conditions:
when the ambient temperature is equal to or less than the preset temperature When the positive pressure signal is less than the negative pressure signal,
Figure BDA0003900376240000111
Figure BDA0003900376240000112
when the environment temperature is higher than the preset temperature and the positive pressure signal is higher than the negative pressure signal,
Figure BDA0003900376240000113
wherein VTHP is expressed as the threshold voltage of the PMOS tube; IB1 represents the bias current provided to the power supply module, up represents the mobility of the holes; cox represents the gate oxide capacitance per unit area; W1/L1 is expressed as the width-length ratio of the channel of the first MOS tube; W2/L2 is expressed as the width-length ratio of the channel of the second MOS tube; vbe1 is represented as the voltage between the emitter and the base of the first transistor.
Alternatively, the preset temperature may range from 140 ℃ to 160 ℃, and preferably, when the preset temperature is set to 150 ℃, the over-temperature detection may be more accurate.
Optionally, according to the negative temperature characteristic of the transistor (triode/MOS transistor), when the output end of the comparator outputs a low level signal, the over-temperature protection of the over-temperature circuit is not turned on; when the output end of the comparator outputs a high level signal, the over-temperature protection of the over-temperature circuit is started.
In this embodiment, the comparing module 3 is used to obtain the positive voltage signal and the negative voltage signal, and then the comparing module 3 compares the positive voltage signal and the negative voltage signal, and the voltage between the emitter and the base decreases due to the negative voltage characteristic of the transistor, so that it can be determined that when the positive voltage signal is greater than the negative voltage signal, an over-temperature condition occurs in the circuit. In addition, in the embodiment, the over-temperature detection circuit is built only through the comparator and the transistor, so that the problem that the over-temperature detection circuit occupies the layout area in the prior art is solved.
As shown in fig. 5, fig. 5 is a schematic diagram of an over-temperature detection circuit according to an alternative embodiment of the present application. The over-temperature detection circuit provided in this embodiment is different from that shown in fig. 4 in that the first MOS transistor MN1 and the second MOS transistor MN2 used in this embodiment are NMOS transistors, and gates thereof are connected to sources thereof; the first MOS transistor MP1 and the second MOS transistor MP2 in fig. 4 are PMOS transistors, and the source and the drain thereof are connected.
Optionally, the first MOS transistor MN1 and the second MOS transistor MN2 provided in this embodiment may be NMOS transistors or PMOS transistors. Therefore, the over-temperature detection circuit can be flexibly built in different modes (by using NMOS tubes or PMOS tubes).
Fig. 4 is a schematic diagram of a linear regulator, where fig. 4 is a schematic diagram of a linear regulator according to an embodiment of the present invention, and the linear regulator includes the over-temperature detection circuit.
In an embodiment of the present application, a chip is further provided, which includes the above over-temperature detection circuit, or the above linear regulator. Optionally, the chip of the over-temperature detection circuit provided by the above embodiment is encapsulated.
An embodiment of the present invention provides an electronic device, including the over-temperature detection circuit, the linear regulator, or the chip.
The above embodiments are merely examples of the present application, and not intended to limit the scope of the present application, and all equivalent structures or equivalent flow transformations made by the present specification and drawings, such as mutual combination of technical features between various embodiments, or direct or indirect application to other related technical fields, are all included in the scope of the present application.

Claims (15)

1. An over-temperature detection circuit, comprising:
the first input module is used for acquiring a first bias signal and generating a positive voltage signal;
the second input module is used for acquiring a second bias signal and generating a negative pressure signal, and the negative pressure signal is reduced along with the increase of the temperature;
and the comparison module is respectively connected with the first input module and the second input module and used for comparing the positive pressure signal with the negative pressure signal, and when the positive pressure signal is greater than the negative pressure signal, an over-temperature signal is output.
2. The over-temperature detection circuit according to claim 1, further comprising:
the bias module is respectively connected with the first input module and the second input module, and is used for providing a first bias signal for the first input module and providing a second bias signal for the second input module, wherein the first bias signal is used for providing a working voltage and a working current for stabilizing the working state of the first input module for the first input module; the second bias signal is used for providing working voltage and working current for stabilizing the working state of the second input module to the second input module;
and the power supply module is connected with the bias module and used for supplying power to the bias module so that the bias module outputs the first bias signal and the second bias signal.
3. The over-temperature detection circuit of claim 2, wherein the power supply module comprises a current source.
4. The over-temperature detection circuit according to claim 2, wherein the comparison module comprises:
a first input end of the comparator is connected with the output end of the first input module, and a second input end of the comparator is connected with the output end of the second input module; and the output end of the comparator is used for outputting the over-temperature signal.
5. The over-temperature detection circuit according to claim 2, wherein the first input module comprises:
the drain electrode of the first MOS tube is respectively connected with the first input end of the comparison module and the output end of the bias module, the drain electrode of the first MOS tube is used for acquiring the first bias signal and outputting the positive pressure signal to the comparison module, the grid electrode of the first MOS tube is connected with the source electrode of the first MOS tube, and the source electrode of the first MOS tube is grounded.
6. The over-temperature detection circuit according to claim 5, wherein the second input module comprises:
the emitter of the first triode is used for acquiring the second bias signal and outputting the negative pressure signal to the comparison module, the emitter of the first triode is used for the grid electrode of the second MOS tube and the source electrode of the second MOS tube to be connected, and the source electrode of the second MOS tube and the collector electrode of the first triode are all grounded.
7. The over-temperature detection circuit according to claim 6,
the bias module comprises a third MOS tube, a fourth MOS tube, a fifth MOS tube and a sixth MOS tube;
the drain electrode of the third MOS tube, the drain electrode of the fourth MOS tube, the drain electrode of the fifth MOS tube and the drain electrode of the sixth MOS tube are all connected with a power supply, the source electrode of the third MOS tube is connected with the power supply module, and the source electrode of the third MOS tube is also respectively connected with the grid electrode of the third MOS tube, the grid electrode of the fourth MOS tube, the grid electrode of the fifth MOS tube and the grid electrode of the sixth MOS tube; the source electrode of the fourth MOS tube is respectively connected with the first input module and the comparison module;
and the source electrode of the fifth MOS tube is connected with the second input module, and the source electrode of the sixth MOS tube is respectively connected with the second input module and the comparison module.
8. The over-temperature detection circuit of claim 7, wherein a width-to-length ratio of the first MOS transistor channel is less than a width-to-length ratio of the second MOS transistor channel.
9. The over-temperature detection circuit according to claim 8,
the positive pressure signal
Figure FDA0003900376230000031
The negative pressure signal
Figure FDA0003900376230000032
The parameters of the first MOS tube, the second MOS tube and the first triode are set to meet the following conditions:
when the ambient temperature is equal to or less than the preset temperature When the positive pressure signal is less than the negative pressure signal,
Figure FDA0003900376230000033
Figure FDA0003900376230000034
when the environment temperature is higher than the preset temperature and the positive pressure signal is higher than the negative pressure signal,
Figure FDA0003900376230000035
wherein VTHP represents the threshold voltage of PMOS tube; IB1 represents the bias current provided to the power supply module and up represents the mobility of holes; cox represents the gate oxide capacitance per unit area; W1/L1 is expressed as the width-length ratio of the channel of the first MOS tube; W2/L2 is expressed as the width-length ratio of the channel of the second MOS tube; vbe1 is represented as the voltage between the emitter and the base of the first transistor.
10. The over-temperature detection circuit according to claim 9, wherein the preset temperature is in a range of 140 ℃ to 160 ℃.
11. The over-temperature detection circuit of claim 4, wherein the comparator is a hysteresis voltage comparator.
12. The over-temperature detection circuit according to claim 7, wherein the current mirror ratio of the third MOS transistor, the fourth MOS transistor, the fifth MOS transistor and the sixth MOS transistor is 1:1:1:1.
13. a linear regulator, comprising: the over-temperature detection circuit of any one of claims 1 to 12.
14. A chip, comprising: the over-temperature detection circuit of any one of claims 1 to 12, or the linear regulator of claim 13.
15. An electronic device, comprising: the over-temperature detection circuit according to any one of claims 1 to 12, or the linear regulator according to claim 13, or the chip according to claim 14.
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