CN218481579U - Current sampling circuit - Google Patents
Current sampling circuit Download PDFInfo
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- CN218481579U CN218481579U CN202220343738.8U CN202220343738U CN218481579U CN 218481579 U CN218481579 U CN 218481579U CN 202220343738 U CN202220343738 U CN 202220343738U CN 218481579 U CN218481579 U CN 218481579U
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Abstract
The utility model relates to a current sampling circuit, including preceding stage current sampling circuit, voltage offset circuit, voltage comparison benchmark input circuit, difference operational amplifier circuit, digital circuit, analog circuit, preceding stage current sampling circuit links to each other with the input of electric current, and voltage offset circuit settles between preceding stage current sampling circuit and difference operational amplifier circuit, and the back level sampling voltage of difference operational amplifier circuit output exports sampling reduction digital circuit and analog circuit. The utility model discloses but use operational amplifier single power supply, utilize voltage bias circuit to carry out linear compensation with sampling voltage and be the positive voltage to the best workspace of sampling current-voltage pure genus compensation to operational amplifier, and according to compensation offset value and amplification factor, obtain input current and back level voltage sample relation, can directly be used for the processing of functional circuit with back level voltage sample value.
Description
Technical Field
The utility model relates to a power electronic technology field, concretely relates to current sampling circuit.
Background
At present, the current in the circuit is sampled by the prior art, and the current is generally sampled by using a sampling resistor with low resistance, but the following problems can exist:
in general, sampling is to convert a current signal into a weak voltage signal, and a high-precision differential amplifier is required for amplification. If the current flows in two directions, the differential amplifier outputs negative voltage when sampling the negative direction, and meanwhile, the differential amplifier needs to adopt a positive and negative two-way power supply to supply power. The negative sampling voltage output by the differential amplifier increases the processing complexity of a post-stage circuit, and meanwhile, the positive and negative bidirectional power supply not only increases the complexity of power supply, but also increases the cost of the circuit.
SUMMERY OF THE UTILITY MODEL
In order to solve the problems of the prior art, the utility model relates to a current sampling circuit.
A current sampling circuit comprises a preceding stage current sampling circuit, a voltage bias circuit, a voltage comparison reference input circuit, a differential operational amplification circuit, a sampling reduction digital circuit and an analog circuit, wherein the preceding stage current sampling circuit is connected with a current input end, the voltage bias circuit is arranged between the preceding stage current sampling circuit and the differential operational amplification circuit, and a rear stage sampling voltage output by the differential operational amplification circuit is output to the sampling reduction digital circuit and the analog circuit. The general flow is that the current signal of the unidirectional or bidirectional input current is converted into the voltage signal by the preceding stage current sampling circuit, the current sampling voltage is biased to a proper range by the voltage bias circuit, the voltage is compared with the voltage comparison reference input circuit by the differential operation amplifying circuit, the difference value is amplified to obtain the following stage voltage sample, and finally the voltage sample is provided for the sampling reduction digital circuit to be processed and the analog circuit to be further processed.
Preferably, the preceding-stage current sampling circuit includes a sampling resistor, and the sampling resistor is connected to the current input terminal.
Preferably, the voltage bias circuit comprises a reference voltage, a first resistor, a second resistor, a third resistor and a diode, wherein one end of the first resistor is connected with the sampling resistor of the preceding-stage current sampling circuit, the other end of the first resistor is connected with the second resistor and the diode, one end of the third resistor is connected with the second resistor, the other end of the third resistor is connected with the reference voltage, and the other end of the reference voltage is grounded.
Preferably, the voltage comparison reference input circuit comprises a reference voltage, a sixth resistor, a seventh resistor and a second capacitor, and the reference voltage is divided by the sixth resistor and the seventh resistor and filtered by the second capacitor; one end of the reference voltage is grounded, the other end of the reference voltage is connected with a sixth resistor, the sixth resistor is connected with a seventh resistor in series, and the seventh resistor is connected with a second capacitor in parallel.
Preferably, the differential operational amplifier circuit includes a fourth resistor, a fifth resistor, and an operational amplifier, a forward input voltage obtained by the voltage bias circuit is input to a non-inverting input terminal of the operational amplifier, a reference input voltage obtained by the voltage comparison reference input circuit is input to an inverting input terminal of the operational amplifier through the fourth resistor, a post-stage sampling voltage is output from the other terminal of the operational amplifier, and the fifth resistor is connected in parallel with the operational amplifier.
Preferably, the sampling reduction digital circuit is an analog-to-digital data converter ADC.
Preferably, the analog circuit is directly inputted to a functional pin of the fourth operational amplifier MCU from a post-sampling voltage, and the post-sampling voltage is analog-to-digital converted into a digital signal by an in port of the analog-to-digital converter ADC thereof for processing, so as to numerically restore a current value of the circuit and perform calibration to prevent sampling errors.
Preferably, the operational amplifier is a general-purpose integrated device, and the diode is a general-purpose device.
Compared with the closest prior art, the technical scheme provided by the utility model following beneficial effect has:
1. prior art if the electric current is two-way flow, then when sampling to the negative direction, differential amplifier can export the negative voltage, and differential amplifier needs to adopt positive negative two-way mains operated simultaneously, the utility model discloses can sample one-way or two-way electric current, but use operational amplifier single mains operated.
2. In the prior art, the differential amplifier outputs negative sampling voltage, so that the processing complexity of a post-stage circuit is increased, and meanwhile, the positive and negative bidirectional power supply not only increases the complexity of power supply, but also increases the cost of the circuit. The utility model discloses utilize voltage bias circuit, carry out linear compensation with sampling voltage and be the positive voltage to the pure best workspace of compensating to operational amplifier of belonging to of sampling current voltage, and according to the bias value and the amplification factor of compensation, obtain the relation of input current and back level voltage sample, utilize the ADC to back level voltage sample, and utilize MCU and algorithm procedure to restore out the current value, be used for the system to handle, also can directly be used for the processing of function circuit with back level voltage sample value.
Drawings
Fig. 1 is a schematic block diagram of the bidirectional current detection of the present invention;
FIG. 2 is a circuit diagram of the bidirectional current detection of the present invention;
fig. 3 is a schematic diagram of the post-stage processing of the bidirectional current detection of the present invention;
fig. 4 shows an example waveform for realizing the bidirectional current detection of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be described clearly and completely with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments in the present invention, all other embodiments obtained by a person skilled in the art without creative work belong to the protection scope of the present invention.
Referring to fig. 1 to 3, the present invention provides a technical solution: a current sampling circuit comprises a preceding stage current sampling circuit, a voltage bias circuit, a voltage comparison reference input circuit, a differential operation amplifying circuit, a sampling reduction digital circuit and an analog circuit. The pre-stage current sampling circuit is connected with the input end of the current, the voltage bias circuit is arranged between the pre-stage current sampling circuit and the differential operational amplification circuit, and the post-stage sampling voltage output by the differential operational amplification circuit is output to the sampling reduction digital circuit and the analog circuit. The working process is that the preceding stage current sampling circuit converts the unidirectional or bidirectional input current from a current signal into a voltage signal, the voltage sampling circuit biases the current sampling voltage to a proper range, the voltage signal is compared with the voltage comparison reference input circuit through the differential operation amplifying circuit, the difference value is amplified to obtain the subsequent stage voltage sampling, and the subsequent stage voltage sampling is finally provided for the sampling reduction digital circuit to be processed and the analog circuit to be further processed.
Furthermore, the preceding stage current sampling circuit comprises a sampling resistor, so that a current signal in the main circuit is converted into a voltage signal. The main circuit unidirectional or bidirectional input current Icurent is sampled by a sampling resistor Rsense to obtain a preceding-stage current sampling voltage Vi-sample, and the relation is as follows:
further, the voltage bias circuit comprises a reference voltage, a first resistor R1, a second resistor R2, a third resistor R3 and a diode D1, wherein one end of the first resistor R1 is connected with a sampling resistor Rsense of the preceding-stage current sampling circuit, the other end of the first resistor R1 is connected with the second resistor R2 and the diode D1, one end of the third resistor R3 is connected with the second resistor R2, the other end of the third resistor R3 is connected with the reference voltage Vref, and the other end of the reference voltage Vref is grounded. A forward voltage is linearly superimposed on the pre-stage current sampling voltage as an input of an input terminal of the operational amplifier U1. And adjusting the pure superposition voltage to ensure that the forward voltage meets the input of the operational amplifier U1, and the input end of the operational amplifier U1 works in the optimal working area, so that the values of VCC and GND which are too close to the power supply of the operational amplifier U1 are avoided. The voltage bias circuit biases Vi-sample voltage into positive voltage to be input into Vx, the diode D1 is used for preventing negative current from being too large due to abnormal current or short circuit of the main circuit, negative voltage is prevented from appearing after the negative voltage on the Rsense sampling resistor exceeds the compensation of the voltage bias circuit, the operational amplifier U1 is prevented from being damaged, and Vx is input into the inverting input end of the U1 through the resistor R4.
Further, the voltage comparison reference input circuit comprises a reference voltage Vref, a sixth resistor R6, a seventh resistor R7 and a second capacitor C2, wherein the reference voltage is divided by the sixth resistor R6 and the seventh resistor R7 and filtered by the second capacitor C2; one end of the reference voltage Vref is grounded, the other end of the reference voltage Vref is connected with a sixth resistor R6, the sixth resistor R6 is connected with a seventh resistor R7 in series, and the seventh resistor R7 is connected with a second capacitor C2 in parallel.
Further, the differential operational amplifier circuit comprises a fourth resistor R4, a fifth resistor R5 and an operational amplifier U1, a forward input voltage obtained by the voltage bias circuit is input to a non-inverting input terminal of the operational amplifier U1, a reference input voltage obtained by the voltage comparison reference input circuit is input to an inverting input terminal of the operational amplifier U1 through the fourth resistor R4, a post-stage sampling voltage is output from the other end of the operational amplifier U1, and the fifth resistor R5 is connected in parallel with the operational amplifier U1. And the operational amplifier U1 performs proportional amplification of a difference value according to two input voltage values of the inverting input end and the non-inverting input end to obtain a post-stage voltage sampling value. In the differential operational amplifier circuit, the relationship between the post-stage sampling voltage Vo-sample and the input current Icurrent is as follows:
wherein: vo _ sample = K Icurent + B
Wherein:
furthermore, the sampling reduction digital circuit is an analog-digital data converter ADC which converts the sampling voltage into a digital signal, and a single chip microcomputer MCU or a DSP carries out numerical value reduction by utilizing an algorithm.
Furthermore, the analog circuit directly inputs the sampling voltage of the later stage into the functional pin of the MCU of the fourth operational amplifier U4, the in port of the analog-to-digital data converter ADC performs analog-to-digital conversion into a digital signal for processing, the current value of the circuit is restored numerically and is calibrated to prevent sampling errors, the sampling of the later stage voltage is performed by the analog-to-digital data converter ADC of the CPU, the current value is restored according to an algorithm, meanwhile, the analog circuit can also perform detection of the maximum limit value, and when the maximum threshold value is set, an alarm or a protection signal can be given for system protection.
Further, the operational amplifiers U1, U2, U3, U4 are general integrated devices, and the diodes D1, D2, D3 are general devices.
Referring to fig. 4, in this embodiment, taking current Icurrent as an example, vi-sample obtained through sampling is finally obtained as a post-stage voltage sample Vo-sample, the voltage range of which is 2.23V to 2.77V, and the waveform of which is shown in fig. 4.
The working principle of the circuit is as follows: a current sampling circuit comprises a preceding stage current sampling circuit, a voltage bias circuit, a voltage comparison reference input circuit, a differential operational amplification circuit, a sampling reduction digital circuit and an analog circuit, wherein the preceding stage current sampling circuit converts unidirectional or bidirectional input current from a current signal into a voltage signal to obtain a preceding stage current sampling voltage, the voltage bias circuit is used for biasing the current sampling voltage to a proper range to obtain a forward voltage input, the input end of the operational amplifier works in an optimal working range, the forward voltage input is compared with the designed voltage comparison reference input circuit through the differential operational amplification circuit, a unidirectional subsequent stage voltage sample is obtained after the difference amplification factor of the circuit is set, the differential amplification is used for obtaining a subsequent stage voltage sample, and the subsequent stage voltage sample is provided for the sampling reduction digital circuit to be processed and the analog circuit to be further processed. Fig. 2 is a schematic diagram for realizing bidirectional current detection and fig. 4 is a schematic diagram for processing a post-stage of bidirectional current detection, which are two functional parts of the same schematic diagram, fig. 2 completes the functions of unidirectional or bidirectional input current, pre-stage current sampling voltage, forward voltage input by voltage bias, voltage comparison reference input, differential amplification to obtain post-stage voltage sampling in fig. 1, and fig. 4 completes the functions of digital circuit sampling reduction and analog circuit application in fig. 1.
The above embodiments are only used to illustrate the technical solution of the present invention and not to limit the same, although the present invention is described in detail with reference to the above embodiments, those skilled in the art can still modify or equally replace the specific embodiments of the present invention, and any modification or equivalent replacement that does not depart from the spirit and scope of the present invention is within the protection scope of the claims of the present invention.
Claims (8)
1. A current sampling circuit, characterized by: including preceding stage current sampling circuit, voltage bias circuit, voltage comparison reference input circuit, difference operation amplifier circuit, sampling reduction digital circuit, analog circuit, preceding stage current sampling circuit links to each other with the input of electric current, voltage bias circuit settles between preceding stage current sampling circuit and difference operation amplifier circuit, and the back level sampling voltage output of difference operation amplifier circuit is exported sampling reduction digital circuit and analog circuit.
2. A current sampling circuit according to claim 1, wherein: the preceding-stage current sampling circuit comprises a sampling resistor, and the sampling resistor is connected with the input end of the current.
3. A current sampling circuit according to claim 1, wherein: the voltage bias circuit comprises reference voltage, a first resistor, a second resistor, a third resistor and a diode, wherein one end of the first resistor is connected with the sampling resistor of the preceding-stage current sampling circuit, the other end of the first resistor is connected with the second resistor and the diode, one end of the third resistor is connected with the second resistor, the other end of the third resistor is connected with the reference voltage, and the other end of the reference voltage is grounded.
4. A current sampling circuit according to claim 1, wherein: the voltage comparison reference input circuit comprises a reference voltage, a sixth resistor, a seventh resistor and a second capacitor, wherein the reference voltage is divided by the sixth resistor and the seventh resistor and filtered by the second capacitor; one end of the reference voltage is grounded, the other end of the reference voltage is connected with a sixth resistor, the sixth resistor is connected with a seventh resistor in series, and the seventh resistor is connected with a second capacitor in parallel.
5. A current sampling circuit according to claim 1, wherein: the differential operational amplification circuit comprises a fourth resistor, a fifth resistor and an operational amplifier, the fifth resistor is connected with the operational amplifier in parallel, forward input voltage obtained by the voltage bias circuit is input to a non-inverting input end of the operational amplifier, reference input voltage obtained by the voltage comparison reference input circuit is input to an inverting input end of the operational amplifier through the fourth resistor, and the other end of the operational amplifier outputs post-stage sampling voltage.
6. A current sampling circuit according to claim 1, wherein: the sampling reduction digital circuit is an analog-digital data converter (ADC).
7. A current sampling circuit according to claim 1, wherein: and the analog circuit is directly input into a functional pin of the fourth operational amplifier MCU through a post-stage sampling voltage.
8. A current sampling circuit according to claim 1, wherein: the operational amplifier of the current sampling circuit is a general integrated device, and the diode is a general device.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202220343738.8U CN218481579U (en) | 2022-02-21 | 2022-02-21 | Current sampling circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202220343738.8U CN218481579U (en) | 2022-02-21 | 2022-02-21 | Current sampling circuit |
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| Publication Number | Publication Date |
|---|---|
| CN218481579U true CN218481579U (en) | 2023-02-14 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202220343738.8U Active CN218481579U (en) | 2022-02-21 | 2022-02-21 | Current sampling circuit |
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| CN (1) | CN218481579U (en) |
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- 2022-02-21 CN CN202220343738.8U patent/CN218481579U/en active Active
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