CN218450050U - Amplifiers and Oscilloscopes - Google Patents

Amplifiers and Oscilloscopes Download PDF

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CN218450050U
CN218450050U CN202222357332.8U CN202222357332U CN218450050U CN 218450050 U CN218450050 U CN 218450050U CN 202222357332 U CN202222357332 U CN 202222357332U CN 218450050 U CN218450050 U CN 218450050U
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current source
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transistor
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严波
李建伟
王悦
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Rigol Technologies Co Ltd
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Abstract

The utility model discloses an amplifier and oscilloscope. The amplifier includes: the device comprises an input amplification module, an isolation module, a feedforward transconductance module, a first current buffer module, a first current source module and a second current source module; the input amplification module and the isolation module are connected in series between the first current source module and the output end of the amplifier; the feedforward transconductance module and the first current buffer module are connected in series between the second current source module and the output end of the amplifier; wherein, the input control end pair is accessed to the input signal pair; the feedforward transconductance module comprises a feedforward control end pair, and the feedforward control end pair is electrically connected with the first node pair in a staggered manner; the isolation module comprises an isolation control end pair, and the isolation control end pair is connected with a first reference voltage; the first current buffer module comprises a first buffer control end pair, and the first buffer control end pair is connected with a second reference voltage. Compared with the prior art, the embodiment of the utility model provides a direct current linearity of amplifier has been promoted.

Description

放大器和示波器Amplifiers and Oscilloscopes

技术领域technical field

本实用新型涉及电路技术领域,尤其涉及一种放大器和示波器。The utility model relates to the technical field of circuits, in particular to an amplifier and an oscilloscope.

背景技术Background technique

示波器是一种用来测量交流电或脉冲电流波形的仪器。其能够将电信号转换成看得见的图像,凡可以变为电效应的周期性物理过程都可以用示波器进行观测,便于人们研究各种电现象的变化过程。An oscilloscope is an instrument used to measure alternating current or pulse current waveforms. It can convert electrical signals into visible images, and all periodic physical processes that can be transformed into electrical effects can be observed with an oscilloscope, which is convenient for people to study the changing process of various electrical phenomena.

在现有技术中,示波器需要设置放大器作为示波器模拟前端放大器。然而,放大器存在非线性失真的问题,非线性失真亦称波形失真、非线性畸变,表现为输出信号与输入信号不成线性关系。一个理想的放大器,其输出信号应当如实的反映输入信号,即输出信号和输入信号可以在幅度上不同、时间上也可能有延迟,但波形应当是相同的。然而,在现有技术中,由于工艺波动等原因,输出信号与输入信号的波形存在差异,这种现象叫做失真。In the prior art, an oscilloscope needs to set an amplifier as an analog front-end amplifier of the oscilloscope. However, the amplifier has the problem of nonlinear distortion, which is also called waveform distortion and nonlinear distortion, and the output signal is not linearly related to the input signal. In an ideal amplifier, the output signal should faithfully reflect the input signal, that is, the output signal and the input signal can be different in amplitude and delayed in time, but the waveform should be the same. However, in the prior art, due to process fluctuations and other reasons, there are differences in the waveforms of the output signal and the input signal, and this phenomenon is called distortion.

在对放大器的直流线性度要求比较高的应用场合,例如:示波器模拟前端放大器、信号源模拟前端放大器、功率音响放大器等,现有的放大器无法满足其直流线性度的要求。In applications that require relatively high DC linearity of amplifiers, such as: oscilloscope analog front-end amplifiers, signal source analog front-end amplifiers, power audio amplifiers, etc., existing amplifiers cannot meet the requirements for DC linearity.

实用新型内容Utility model content

本实用新型提供了一种放大器和示波器,以提升放大器的直流线性度。The utility model provides an amplifier and an oscilloscope to improve the DC linearity of the amplifier.

根据本实用新型的一方面,提供了一种放大器,包括:输入放大模块、隔离模块、前馈跨导模块、第一电流缓冲模块、第一电流源模块和第二电流源模块;According to one aspect of the present invention, an amplifier is provided, including: an input amplification module, an isolation module, a feedforward transconductance module, a first current buffer module, a first current source module, and a second current source module;

所述输入放大模块和所述隔离模块串联于所述第一电流源模块和所述放大器的输出端之间;其中,定义所述输入放大模块和所述隔离模块的连接点为第一节点对;The input amplification module and the isolation module are connected in series between the first current source module and the output terminal of the amplifier; wherein, the connection point defining the input amplification module and the isolation module is a first node pair ;

所述前馈跨导模块和所述第一电流缓冲模块串联于所述第二电流源模块和所述放大器的输出端之间;The feedforward transconductance module and the first current buffer module are connected in series between the second current source module and the output terminal of the amplifier;

其中,所述输入放大模块包括输入控制端对,所述输入控制端对接入输入信号对;所述前馈跨导模块包括前馈控制端对,所述前馈控制端对与所述第一节点对交错电连接;所述隔离模块包括隔离控制端对,所述隔离控制端对接入第一参考电压;所述第一电流缓冲模块包括第一缓冲控制端对,所述第一缓冲控制端对接入第二参考电压。Wherein, the input amplification module includes a pair of input control terminals, and the pair of input control terminals is connected to an input signal pair; the feedforward transconductance module includes a pair of feedforward control terminals, and the pair of feedforward control terminals is connected to the first A node pair is electrically connected in a staggered manner; the isolation module includes a pair of isolation control terminals, and the pair of isolation control terminals is connected to a first reference voltage; the first current buffer module includes a pair of first buffer control terminals, and the first buffer The control terminal is connected to the second reference voltage.

可选地,所述第一电流缓冲模块包括至少一级电流缓冲器。Optionally, the first current buffer module includes at least one level of current buffer.

可选地,放大器还包括:Optionally, the amplifier also includes:

第二电流缓冲模块,所述第二电流缓冲模块串联于所述隔离模块和所述放大器的输出端之间;所述第二电流缓冲模块包括第二缓冲控制端对,所述第二缓冲控制端对接入第三参考电压;A second current buffer module, the second current buffer module is connected in series between the isolation module and the output terminal of the amplifier; the second current buffer module includes a second buffer control terminal pair, the second buffer control The terminal pair is connected to the third reference voltage;

其中,所述第二电流缓冲模块包括一级电流缓冲器。Wherein, the second current buffer module includes a primary current buffer.

可选地,放大器还包括:Optionally, the amplifier also includes:

第三电流缓冲模块,所述第三电流缓冲模块串联于所述第二电流缓冲模块和所述放大器的输出端之间;定义所述第三电流缓冲模块和所述第二电流缓冲模块的连接点为第二节点对,所述前馈跨导模块和所述第一电流缓冲模块串联于所述第二电流源模块和所述第二节点对之间;所述第三电流缓冲模块包括第三缓冲控制端对,所述第三缓冲控制端对接入第四参考电压;A third current buffer module, the third current buffer module is connected in series between the second current buffer module and the output terminal of the amplifier; defining the connection between the third current buffer module and the second current buffer module The point is the second node pair, the feedforward transconductance module and the first current buffer module are connected in series between the second current source module and the second node pair; the third current buffer module includes the first Three buffer control terminal pairs, the third buffer control terminal pair connected to the fourth reference voltage;

其中,所述第三电流缓冲模块包括一级电流缓冲器。Wherein, the third current buffer module includes a primary current buffer.

可选地,所述电流缓冲器包括:第一晶体管和第二晶体管,所述第一晶体管的控制端和所述第二晶体管的控制端接入相同的参考电压;所述第一晶体管的第一端和所述第二晶体管的第一端作为所述电流缓冲器的输入连接点对;所述第一晶体管的第二端和所述第二晶体管的第二端作为所述电流缓冲器的输出连接点对。Optionally, the current buffer includes: a first transistor and a second transistor, the control terminal of the first transistor and the control terminal of the second transistor are connected to the same reference voltage; the second transistor of the first transistor One terminal and the first terminal of the second transistor are used as the input connection point pair of the current buffer; the second terminal of the first transistor and the second terminal of the second transistor are used as the current buffer Output connection point pairs.

可选地,所述第一晶体管和所述第二晶体管均为三极管;或者,所述第一晶体管和所述第二晶体管均为场效应管。Optionally, both the first transistor and the second transistor are triodes; or, both the first transistor and the second transistor are field effect transistors.

可选地,所述输入放大模块包括与所述第一电流源模块连接的连接点对;所述前馈跨导模块包括与所述第二电流源模块连接的连接点对;Optionally, the input amplification module includes a pair of connection points connected to the first current source module; the feedforward transconductance module includes a pair of connection points connected to the second current source module;

所述第一电流源模块包括:第一电流源,所述第一电流源的电流输入端与所述输入放大模块的连接点对电连接,所述第一电流源的电流输出端与第一电源电压电连接;The first current source module includes: a first current source, the current input terminal of the first current source is electrically connected to the connection point of the input amplification module, and the current output terminal of the first current source is connected to the first supply voltage electrical connection;

和/或,所述第二电流源模块包括:第二电流源,所述第二电流源的电流输入端与所述前馈跨导模块的连接点对电连接,所述第二电流源的电流输出端与第二电源电压电连接。And/or, the second current source module includes: a second current source, the current input terminal of the second current source is electrically connected to the connection point pair of the feedforward transconductance module, and the second current source The current output terminal is electrically connected with the second power supply voltage.

可选地,所述输入放大模块包括与所述第一电流源模块连接的第一连接点和第二连接点;所述前馈跨导模块包括与所述第二电流源模块连接的第三连接点和第四连接点;Optionally, the input amplification module includes a first connection point and a second connection point connected to the first current source module; the feedforward transconductance module includes a third connection point connected to the second current source module a connection point and a fourth connection point;

所述第一电流源模块包括:第一电流源、第一电阻单元和第二电阻单元,所述第一电流源的电流输入端与所述输入放大模块的第一连接点之间串联所述第一电阻单元,所述第一电流源的电流输入端与所述输入放大模块的第二连接点之间串联所述第二电阻单元,所述第一电流源的电流输出端与第一电源电压电连接;The first current source module includes: a first current source, a first resistance unit and a second resistance unit, and the current input terminal of the first current source is connected in series with the first connection point of the input amplification module. The first resistance unit, the second resistance unit is connected in series between the current input end of the first current source and the second connection point of the input amplification module, the current output end of the first current source is connected to the first power supply voltage electrical connection;

和/或,所述第二电流源模块包括:第二电流源、第三电阻单元和第四电阻单元,所述第二电流源的电流输入端与所述前馈跨导模块的第三连接点之间串联所述第三电阻单元,所述第二电流源的电流输入端与所述前馈跨导模块的第四连接点之间串联所述第四电阻单元,所述第二电流源的电流输出端与第二电源电压电连接。And/or, the second current source module includes: a second current source, a third resistance unit and a fourth resistance unit, the current input end of the second current source is connected to the third connection of the feedforward transconductance module The third resistance unit is connected in series between the points, the fourth resistance unit is connected in series between the current input terminal of the second current source and the fourth connection point of the feedforward transconductance module, and the second current source The current output end of the current output terminal is electrically connected with the second power supply voltage.

可选地,所述输入放大模块包括与所述第一电流源模块连接的第一连接点和第二连接点;所述前馈跨导模块包括与所述第二电流源模块连接的第三连接点和第四连接点;Optionally, the input amplification module includes a first connection point and a second connection point connected to the first current source module; the feedforward transconductance module includes a third connection point connected to the second current source module a connection point and a fourth connection point;

所述第一电流源模块包括:第三电流源、第四电流源和第五电阻单元,所述第三电流源的电流输入端与所述第一连接点电连接,所述第四电流源的电流输入端与所述输入放大模块的第二连接点电连接;所述第三电流源的电流输入端和所述第四电流源的电流输入端之间还连接所述第五电阻单元,所述第三电流源的电流输出端与第三电源电压电连接,所述第四电流源的电流输出端与第四电源电压电连接;The first current source module includes: a third current source, a fourth current source and a fifth resistance unit, the current input end of the third current source is electrically connected to the first connection point, and the fourth current source The current input end of the current source is electrically connected to the second connection point of the input amplification module; the fifth resistance unit is also connected between the current input end of the third current source and the current input end of the fourth current source, The current output end of the third current source is electrically connected to the third power supply voltage, and the current output end of the fourth current source is electrically connected to the fourth power supply voltage;

和/或,所述第二电流源模块包括:第五电流源、第六电流源和第六电阻单元,所述第五电流源的电流输入端与所述第三连接点电连接,所述第六电流源的电流输入端与所述输入放大模块的第四连接点电连接;所述第五电流源的电流输入端和所述第六电流源的电流输入端之间还连接所述第六电阻单元,所述第五电流源的电流输出端与第五电源电压电连接,所述第六电流源的电流输出端与第六电源电压电连接。And/or, the second current source module includes: a fifth current source, a sixth current source and a sixth resistance unit, the current input end of the fifth current source is electrically connected to the third connection point, the The current input end of the sixth current source is electrically connected to the fourth connection point of the input amplification module; the current input end of the fifth current source is also connected to the current input end of the sixth current source. In the six-resistor unit, the current output end of the fifth current source is electrically connected to the fifth power supply voltage, and the current output end of the sixth current source is electrically connected to the sixth power supply voltage.

根据本实用新型的另一方面,提供了一种示波器,包括:如本实用新型任意实施例所述的放大器;其中,所述放大器的输入端作为所述示波器的输入端。According to another aspect of the present utility model, an oscilloscope is provided, including: the amplifier according to any embodiment of the present utility model; wherein, the input terminal of the amplifier is used as the input terminal of the oscilloscope.

本实用新型实施例的技术方案,通过在放大器原有输入放大模块A1的基础上,增设隔离模块C1、前馈跨导模块D1和第一电流缓冲模块B1;使得放大器包括产生原始电流的主支路1和主支路2,另外还包括产生补偿电流的补偿支路1和补偿支路2。由于补偿支路1产生的非线性补偿输入到主支路2,补偿支路2产生的非线性补偿输入到主支路1,各支路中的原始电流和补偿电流产生的非线性是反相的。所以,主支路产生的非线性和补偿支路产生的非线性叠加到一起后相互抵消,输出电流具有比较好的非线性,提升了放大器的直流线性度。以及,前馈跨导模块输出的电流经过第一电流缓冲模块,增大了前馈跨导模块的输出阻抗,而且减小了前馈控制端对到放大器的输出端的弥勒效应,从而增加了放大器整体电路的带宽,进一步提了升放大器的直流线性度。In the technical scheme of the embodiment of the utility model, on the basis of the original input amplification module A1 of the amplifier, an isolation module C1, a feed-forward transconductance module D1 and a first current buffer module B1 are added; so that the amplifier includes the main branch that generates the original current Road 1 and main branch 2, and also includes compensation branch 1 and compensation branch 2 that generate compensation current. Since the nonlinear compensation generated by the compensation branch 1 is input to the main branch 2, and the nonlinear compensation generated by the compensation branch 2 is input to the main branch 1, the original current in each branch and the nonlinearity generated by the compensation current are opposite phases of. Therefore, the nonlinearity generated by the main branch and the nonlinearity generated by the compensation branch are superimposed and cancel each other out, and the output current has relatively good nonlinearity, which improves the DC linearity of the amplifier. And, the current output by the feedforward transconductance module passes through the first current buffer module, which increases the output impedance of the feedforward transconductance module, and reduces the Miller effect of the feedforward control terminal to the output terminal of the amplifier, thereby increasing the output of the amplifier. The bandwidth of the overall circuit further improves the DC linearity of the amplifier.

应当理解,本部分所描述的内容并非旨在标识本实用新型的实施例的关键或重要特征,也不用于限制本实用新型的范围。本实用新型的其它特征将通过以下的说明书而变得容易理解。It should be understood that the content described in this section is not intended to identify key or important features of the embodiments of the present invention, nor is it intended to limit the scope of the present invention. Other characteristics of the present invention will be easily understood through the following description.

附图说明Description of drawings

为了更清楚地说明本实用新型实施例中的技术方案,下面将对实施例描述中所需要使用的附图作简单地介绍,显而易见地,下面描述中的附图仅仅是本实用新型的一些实施例,对于本领域普通技术人员来讲,在不付出创造性劳动的前提下,还可以根据这些附图获得其他的附图。In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings that need to be used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings in the following description are only some implementations of the present invention. For example, those of ordinary skill in the art can also obtain other drawings based on these drawings on the premise of not paying creative efforts.

图1为本实用新型实施例提供的一种放大器的电路示意图;Fig. 1 is the schematic circuit diagram of a kind of amplifier that the utility model embodiment provides;

图2为本实用新型实施例提供的一种电流缓冲器的结构示意图;Fig. 2 is a schematic structural diagram of a current buffer provided by an embodiment of the present invention;

图3为本实用新型实施例提供的另一种放大器的电路示意图;Fig. 3 is the schematic circuit diagram of another kind of amplifier that the utility model embodiment provides;

图4为本实用新型实施例提供的又一种放大器的电路示意图;4 is a schematic circuit diagram of another amplifier provided by the embodiment of the present invention;

图5为本实用新型实施例提供的又一种放大器的电路示意图;5 is a schematic circuit diagram of another amplifier provided by the embodiment of the present invention;

图6为本实用新型实施例提供的又一种放大器的电路示意图;6 is a schematic circuit diagram of another amplifier provided by the embodiment of the present invention;

图7为本实用新型实施例提供的又一种放大器的电路示意图;7 is a schematic circuit diagram of another amplifier provided by the embodiment of the present invention;

图8为本实用新型实施例提供的又一种放大器的电路示意图。FIG. 8 is a schematic circuit diagram of another amplifier provided by the embodiment of the present invention.

具体实施方式Detailed ways

为了使本技术领域的人员更好地理解本实用新型方案,下面将结合本实用新型实施例中的附图,对本实用新型实施例中的技术方案进行清楚、完整地描述,显然,所描述的实施例仅仅是本实用新型一部分的实施例,而不是全部的实施例。基于本实用新型中的实施例,本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例,都应当属于本实用新型保护的范围。In order to enable those skilled in the art to better understand the solution of the utility model, the technical solution in the embodiment of the utility model will be clearly and completely described below in conjunction with the accompanying drawings in the embodiment of the utility model. Obviously, the described The embodiments are only some of the embodiments of the present invention, not all of them. Based on the embodiments of the present utility model, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts shall fall within the protection scope of the present utility model.

需要说明的是,本实用新型的说明书和权利要求书及上述附图中的术语“第一”、“第二”等是用于区别类似的对象,而不必用于描述特定的顺序或先后次序。应该理解这样使用的数据在适当情况下可以互换,以便这里描述的本实用新型的实施例能够以除了在这里图示或描述的那些以外的顺序实施。此外,术语“包括”和“具有”以及他们的任何变形,意图在于覆盖不排他的包含,例如,包含了一系列步骤或单元的过程、方法、系统、产品或设备不必限于清楚地列出的那些步骤或单元,而是可包括没有清楚地列出的或对于这些过程、方法、产品或设备固有的其它步骤或单元。It should be noted that the terms "first" and "second" in the specification and claims of the present utility model and the above drawings are used to distinguish similar objects, but not necessarily used to describe a specific order or sequence . It is to be understood that the data so used are interchangeable under appropriate circumstances such that the embodiments of the invention described herein can be practiced in sequences other than those illustrated or described herein. Furthermore, the terms "comprising" and "having", as well as any variations thereof, are intended to cover a non-exclusive inclusion, for example, a process, method, system, product or device comprising a sequence of steps or elements is not necessarily limited to the expressly listed instead, may include other steps or elements not explicitly listed or inherent to the process, method, product or apparatus.

本实用新型实施例提供了一种放大器,该放大器能够改善非线性失真的问题,提升直流线性度,适用于示波器模拟前端放大器、信号源模拟前端放大器、功率音响放大器等直流线性度的要求比较高的场合。图1为本实用新型实施例提供的一种放大器的电路示意图。参见图1,该放大器包括:输入放大模块A1、隔离模块C1、前馈跨导模块D1、第一电流缓冲模块B1、第一电流源模块10和第二电流源模块20;The embodiment of the utility model provides an amplifier, which can improve the problem of nonlinear distortion and improve DC linearity, and is suitable for oscilloscope analog front-end amplifiers, signal source analog front-end amplifiers, power audio amplifiers, etc., which require relatively high DC linearity occasions. FIG. 1 is a schematic circuit diagram of an amplifier provided by an embodiment of the present invention. Referring to FIG. 1, the amplifier includes: an input amplification module A1, an isolation module C1, a feedforward transconductance module D1, a first current buffer module B1, a first current source module 10 and a second current source module 20;

输入放大模块A1和隔离模块C1串联于第一电流源模块10和放大器的输出端之间;其中,定义输入放大模块A1和隔离模块C1的连接点为第一节点对;其中,第一节点对包括节点JD1和节点JD2;放大器的输出端包括节点ION和节点IOP;The input amplification module A1 and the isolation module C1 are connected in series between the output terminal of the first current source module 10 and the amplifier; wherein, the connection point defining the input amplification module A1 and the isolation module C1 is the first node pair; wherein, the first node pair Including node JD1 and node JD2; the output terminal of the amplifier includes node ION and node IOP;

前馈跨导模块D1和第一电流缓冲模块B1串联于第二电流源模块20和放大器的输出端之间;The feed-forward transconductance module D1 and the first current buffer module B1 are connected in series between the second current source module 20 and the output terminal of the amplifier;

输入放大模块A1包括输入控制端对,其中,输入控制端对包括节点VIP和节点VIN;输入控制端对(包括节点VIP和节点VIN)接入输入信号对(包括正相输入信号和反相输入信号);The input amplification module A1 includes an input control terminal pair, wherein the input control terminal pair includes a node VIP and a node VIN; an input control terminal pair (including a node VIP and a node VIN) is connected to an input signal pair (including a positive phase input signal and an inversion input Signal);

前馈跨导模块D1包括前馈控制端对,前馈控制端对与第一节点对(包括节点JD1和节点JD2)交错电连接;隔离模块C1包括隔离控制端对,隔离控制端对接入第一参考电压vb1;第一电流缓冲模块B1包括第一缓冲控制端对,第一缓冲控制端对接入第二参考电压vb2。The feedforward transconductance module D1 includes a feedforward control terminal pair, and the feedforward control terminal pair is electrically connected to the first node pair (including node JD1 and node JD2); the isolation module C1 includes an isolation control terminal pair, and the isolation control terminal pair is connected to The first reference voltage vb1; the first current buffer module B1 includes a first pair of buffer control terminals connected to the second reference voltage vb2.

其中,节点VIP、节点JD1和节点ION之间对应电连接,属于同一条支路,定义为主支路1;节点VIN、节点JD2和节点IOP之间对应电连接,属于同一条支路,定义为主支路2。前馈跨导模块D1和第一电流缓冲模块B1在第一节点对(包括节点JD1和节点JD2)的控制下产生非线性补偿电流,包括补偿支路1和补偿支路2。定义补偿支路1与节点IOP电连接,补偿支路2与节点ION电连接。前馈跨导模块D1的前馈控制端对与第一节点对(包括节点JD1和节点JD2)交错电连接是指,补偿支路1与节点JD1电连接,由节点JD1控制;补偿支路2与节点JD2电连接,由节点JD2控制。Among them, the corresponding electrical connection between the node VIP, the node JD1 and the node ION belongs to the same branch, which is defined as the main branch 1; the corresponding electrical connection between the node VIN, the node JD2 and the node IOP belongs to the same branch, and the definition Main branch 2. The feedforward transconductance module D1 and the first current buffer module B1 generate a nonlinear compensation current under the control of the first node pair (including the node JD1 and the node JD2 ), including the compensation branch 1 and the compensation branch 2 . It is defined that the compensation branch 1 is electrically connected to the node IOP, and the compensation branch 2 is electrically connected to the node ION. The feedforward control terminal pair of the feedforward transconductance module D1 is electrically connected with the first node pair (including the node JD1 and the node JD2) in an interleaved manner, which means that the compensation branch 1 is electrically connected with the node JD1 and is controlled by the node JD1; the compensation branch 2 It is electrically connected with node JD2 and controlled by node JD2.

示例性地,该放大器的工作原理为:输入信号经过输入放大模块A1转换成原始电流;该原始电流经过隔离模块C1输出。但是,由于放大模块A1存在工艺偏差,原始电流存在非线性的问题。前馈跨导模块D1对第一节点对(包括节点JD1和节点JD2)的电压进行放大,相当于对输入放大模块A1的非线性进行采样和放大。前馈跨导模块D1将该非线性转换为补偿电流,该补偿电流经过第一电流缓冲模块B1输出。原始电流和补偿电流在放大器的输出端(包括节点ION和节点IOP)汇合,具体地,主支路1中的原始电流与补偿支路2中的补偿电流汇合;主支路2中的原始电流与补偿支路1中的补偿电流汇合。Exemplarily, the working principle of the amplifier is as follows: the input signal is converted into the original current through the input amplification module A1; the original current is output through the isolation module C1. However, due to the process deviation of the amplification module A1, the original current has a non-linear problem. The feedforward transconductance module D1 amplifies the voltage of the first node pair (including the node JD1 and the node JD2 ), which is equivalent to sampling and amplifying the nonlinearity of the input amplification module A1 . The feed-forward transconductance module D1 converts the nonlinearity into a compensation current, and the compensation current is output through the first current buffer module B1. The original current and the compensation current converge at the output of the amplifier (including the node ION and the node IOP). Specifically, the original current in the main branch 1 and the compensation current in the compensation branch 2 converge; the original current in the main branch 2 Combined with the compensation current in compensation branch 1.

这样,由于补偿支路1产生的非线性补偿输入到主支路2,补偿支路2产生的非线性补偿输入到主支路1,各支路中的原始电流和补偿电流产生的非线性是反相的。所以主支路产生的非线性和补偿支路产生的非线性叠加到一起后相互抵消,输出电流具有比较好的非线性,提升了放大器的直流线性度。以及,前馈跨导模块D1输出的电流经过第一电流缓冲模块B1,增大了前馈跨导模块D1的输出阻抗,而且减小了前馈控制端对(即节点JD1和节点JD2)到放大器的输出端(包括节点ION和节点IOP)的弥勒效应,从而增加了放大器整体电路的带宽,进一步提了升放大器的直流线性度。In this way, since the nonlinear compensation generated by the compensation branch 1 is input to the main branch 2, and the nonlinear compensation generated by the compensation branch 2 is input to the main branch 1, the original current in each branch and the nonlinear compensation generated by the compensation current are reversed. Therefore, the nonlinearity generated by the main branch and the nonlinearity generated by the compensation branch are superimposed and cancel each other out, and the output current has relatively good nonlinearity, which improves the DC linearity of the amplifier. And, the current output by the feedforward transconductance module D1 passes through the first current buffer module B1, which increases the output impedance of the feedforward transconductance module D1, and reduces the feedforward control terminal pair (ie, node JD1 and node JD2) to The Miller effect of the output terminal of the amplifier (including the node ION and the node IOP) increases the bandwidth of the overall circuit of the amplifier and further improves the DC linearity of the amplifier.

在上述各实施例的基础上,可选地,第一电流缓冲模块B1包括至少一级电流缓冲器。图2为本实用新型实施例提供的一种电流缓冲器的结构示意图。参见图2,可选地,电流缓冲器包括:第一晶体管Q10和第二晶体管Q20,第一晶体管Q10的控制端和第二晶体管Q20的控制端接入相同的参考电压vb;第一晶体管Q10的第一端和第二晶体管Q20的第一端作为电流缓冲器的输入连接点对;第一晶体管Q10的第二端和第二晶体管Q20的第二端作为电流缓冲器的输出连接点对。On the basis of the foregoing embodiments, optionally, the first current buffer module B1 includes at least one level of current buffer. FIG. 2 is a schematic structural diagram of a current buffer provided by an embodiment of the present invention. Referring to FIG. 2, optionally, the current buffer includes: a first transistor Q10 and a second transistor Q20, the control terminal of the first transistor Q10 and the control terminal of the second transistor Q20 are connected to the same reference voltage vb; the first transistor Q10 The first terminal of the first transistor Q20 and the first terminal of the second transistor Q20 serve as the input connection point pair of the current buffer; the second terminal of the first transistor Q10 and the second terminal of the second transistor Q20 serve as the output connection point pair of the current buffer.

继续参见图2,可选地,第一晶体管Q10和第二晶体管Q20均为三极管。具体地,第一晶体管Q10的基极和第二晶体管Q20的基极均接入相同的参考电压vb,第一晶体管Q10的集电极与节点IOP电连接,第一晶体管Q10和第二晶体管Q20分别串联于需要进行输出阻抗调整的支路中。Continue referring to FIG. 2 , optionally, both the first transistor Q10 and the second transistor Q20 are triodes. Specifically, the base of the first transistor Q10 and the base of the second transistor Q20 are both connected to the same reference voltage vb, the collector of the first transistor Q10 is electrically connected to the node IOP, and the first transistor Q10 and the second transistor Q20 are respectively Connect in series in the branch circuit that needs to adjust the output impedance.

在其他实施例中,还可以设置第一晶体管Q10和第二晶体管Q20均为场效应管,其实现原理类似,不再赘述。In other embodiments, both the first transistor Q10 and the second transistor Q20 may be set to be field effect transistors, and their implementation principles are similar, so details are not repeated here.

在上述各实施例的基础上,可选地,输入放大模块A1、隔离模块C1、前馈跨导模块D1和第一电流缓冲模块B1均设置有晶体管对,下面进行具体说明。图3为本实用新型实施例提供的另一种放大器的电路示意图。参见图3,在上述各实施例的基础上,可选地,隔离模块C1和第一电流缓冲模块B1均包括一级电流缓冲器。隔离模块C1包括晶体管Q11和晶体管Q21,第一电流缓冲模块B1包括晶体管Q12和晶体管Q22。输入放大模块A1包括晶体管Q31和晶体管Q32,前馈跨导模块D1包括晶体管Q41和晶体管Q42。On the basis of the above embodiments, optionally, the input amplification module A1 , the isolation module C1 , the feedforward transconductance module D1 and the first current buffer module B1 are all provided with transistor pairs, which will be described in detail below. FIG. 3 is a schematic circuit diagram of another amplifier provided by the embodiment of the present invention. Referring to FIG. 3 , on the basis of the foregoing embodiments, optionally, both the isolation module C1 and the first current buffer module B1 include a first-stage current buffer. The isolation module C1 includes a transistor Q11 and a transistor Q21, and the first current buffer module B1 includes a transistor Q12 and a transistor Q22. The input amplification module A1 includes a transistor Q31 and a transistor Q32, and the feedforward transconductance module D1 includes a transistor Q41 and a transistor Q42.

晶体管Q31的基极与节点VIP电连接,晶体管Q31的发射极与第一电流源模块10电连接,晶体管Q31的集电极与节点JD1电连接。晶体管Q32的基极与节点VIN电连接,晶体管Q32的发射极与第一电流源模块10电连接,晶体管Q32的集电极与节点JD2电连接。The base of the transistor Q31 is electrically connected to the node VIP, the emitter of the transistor Q31 is electrically connected to the first current source module 10 , and the collector of the transistor Q31 is electrically connected to the node JD1 . The base of the transistor Q32 is electrically connected to the node VIN, the emitter of the transistor Q32 is electrically connected to the first current source module 10, and the collector of the transistor Q32 is electrically connected to the node JD2.

晶体管Q11的基极与参考电压vb1电连接,晶体管Q11的发射极与节点JD1电连接,晶体管Q11的集电极与节点ION电连接。晶体管Q21的基极与参考电压vb1电连接,晶体管Q21的发射极与节点JD2电连接,晶体管Q21的集电极与节点IOP电连接。The base of the transistor Q11 is electrically connected to the reference voltage vb1, the emitter of the transistor Q11 is electrically connected to the node JD1, and the collector of the transistor Q11 is electrically connected to the node ION. The base of the transistor Q21 is electrically connected to the reference voltage vb1, the emitter of the transistor Q21 is electrically connected to the node JD2, and the collector of the transistor Q21 is electrically connected to the node IOP.

晶体管Q41的基极与节点JD1电连接,晶体管Q41的发射极与第二电流源模块20电连接,晶体管Q41的集电极与晶体管Q12的发射极电连接,晶体管Q12的集电极与节点IOP电连接。晶体管Q42的基极与节点JD2电连接,晶体管Q42的发射极与第二电流源模块20电连接,晶体管Q42的集电极与晶体管Q22的发射极电连接,晶体管Q22的集电极与节点ION电连接。晶体管Q12和晶体管Q22的基极均与参考电压vb2电连接。The base of the transistor Q41 is electrically connected to the node JD1, the emitter of the transistor Q41 is electrically connected to the second current source module 20, the collector of the transistor Q41 is electrically connected to the emitter of the transistor Q12, and the collector of the transistor Q12 is electrically connected to the node IOP . The base of the transistor Q42 is electrically connected to the node JD2, the emitter of the transistor Q42 is electrically connected to the second current source module 20, the collector of the transistor Q42 is electrically connected to the emitter of the transistor Q22, and the collector of the transistor Q22 is electrically connected to the node ION . Both the bases of the transistor Q12 and the transistor Q22 are electrically connected to the reference voltage vb2.

示例性地,该放大器的工作原理为,输入信号经过晶体管Q31和晶体管Q32转换成原始电流,且由于工艺偏差,该原始电流会产生非线性。原始电流经过晶体管Q11和晶体管Q21输出。晶体管Q41和晶体管Q42对晶体管Q11和晶体管Q21的发射极电压进行放大,并采样到晶体管Q31和晶体管Q32的非线性,进而进行放大,产生补偿电流。补偿电流经过晶体管Q12和晶体管Q22构成的一级电流缓冲器,增大晶体管Q41、晶体管Q42支路的输出阻抗,而且该电流缓冲器可以减小晶体管Q41、晶体管Q42的基极到节点IOP、节点ION的弥勒效应,从而增加整体电路的带宽。Exemplarily, the operating principle of the amplifier is that the input signal is converted into an original current through the transistor Q31 and the transistor Q32, and the original current will be non-linear due to process deviation. The original current is output through the transistor Q11 and the transistor Q21. The transistor Q41 and the transistor Q42 amplify the emitter voltage of the transistor Q11 and the transistor Q21, and sample the non-linearity of the transistor Q31 and the transistor Q32, and further amplify to generate a compensation current. The compensation current passes through the primary current buffer formed by the transistor Q12 and the transistor Q22, which increases the output impedance of the branch circuit of the transistor Q41 and the transistor Q42, and the current buffer can reduce the base of the transistor Q41 and the transistor Q42 to the node IOP, node ION's Maitreya effect, thereby increasing the overall circuit bandwidth.

晶体管Q12和晶体管Q22将转换成的补偿电流输入到晶体管Q21和晶体管Q11电流支路。这样,由于晶体管Q41产生的非线性补偿输入到晶体管Q32端,晶体管Q42产生的非线性补偿输入到晶体管Q31端,原始电流和补偿电流产生的非线性是反相的。所以晶体管Q31和晶体管Q32产生的非线性和晶体管Q41和晶体管Q42产生的非线性叠加到一起后相互抵消,输出电流具有比较好的非线性。Transistor Q12 and transistor Q22 input the converted compensation current to transistor Q21 and transistor Q11 current branch. In this way, since the nonlinear compensation generated by the transistor Q41 is input to the terminal of the transistor Q32, and the nonlinear compensation generated by the transistor Q42 is input to the terminal of the transistor Q31, the nonlinear compensation generated by the original current and the compensation current are in opposite phases. Therefore, the non-linearity generated by the transistor Q31 and the transistor Q32 and the non-linearity generated by the transistor Q41 and the transistor Q42 are superimposed and cancel each other out, and the output current has relatively good non-linearity.

图4为本实用新型实施例提供的又一种放大器的电路示意图。参见图4,在上述各实施例的基础上,可选地,放大器还包括:第二电流缓冲模块B2,第二电流缓冲模块B2串联于隔离模块C1和放大器的输出端(包括节点ION和节点IOP)之间;第二电流缓冲模块B2包括第二缓冲控制端对,第二缓冲控制端对接入第三参考电压vb3。其中,第二电流缓冲模块B2包括一级电流缓冲器,其具体结构可以参照前述各实施例设置。示例性地,第二电流缓冲模块B2包括晶体管Q13和晶体管Q23,晶体管Q13和晶体管Q23的基极接入第三参考电压vb3,晶体管Q13串联于晶体管Q11的集电极和节点ION之间,晶体管Q23串联于晶体管Q21的集电极和节点IOP之间。Fig. 4 is a schematic circuit diagram of another amplifier provided by the embodiment of the present invention. Referring to Fig. 4, on the basis of the above-mentioned embodiments, optionally, the amplifier further includes: a second current buffer module B2, the second current buffer module B2 is connected in series with the output terminal of the isolation module C1 and the amplifier (including the node ION and the node between IOP); the second current buffer module B2 includes a second pair of buffer control terminals connected to the third reference voltage vb3. Wherein, the second current buffer module B2 includes a first-level current buffer, and its specific structure can be set with reference to the foregoing embodiments. Exemplarily, the second current buffer module B2 includes a transistor Q13 and a transistor Q23, the bases of the transistor Q13 and the transistor Q23 are connected to the third reference voltage vb3, the transistor Q13 is connected in series between the collector of the transistor Q11 and the node ION, and the transistor Q23 connected in series between the collector of transistor Q21 and node IOP.

本实用新型实施例这样设置,相当于在晶体管Q11和晶体管Q21的输出端接一级或者多级电流缓冲器。由于在该电路结构中,节点ION和节点IOP是两支电流(原始电流和补偿电流)的汇合点,从节点ION和节点IOP看到输出阻抗是两个支路的输出阻抗并联,会影响电路带宽的大小。因此,本实用新型实施例增设第二电流缓冲模块B2,有利于增加电路的输出阻抗,增加电路带宽。The embodiment of the utility model is set in this way, which is equivalent to connecting the output terminals of the transistor Q11 and the transistor Q21 with one-stage or multi-stage current buffers. Since in this circuit structure, the node ION and the node IOP are the confluence points of two currents (the original current and the compensation current), the output impedance seen from the node ION and the node IOP is the parallel connection of the output impedance of the two branches, which will affect the circuit The size of the bandwidth. Therefore, adding the second current buffer module B2 in the embodiment of the present utility model is beneficial to increase the output impedance of the circuit and increase the bandwidth of the circuit.

图5为本实用新型实施例提供的又一种放大器的电路示意图。参见图5,在上述各实施例的基础上,可选地,放大器还包括:第三电流缓冲模块B3,第三电流缓冲模块B3串联于第二电流缓冲模块B2和放大器的输出端之间;定义第三电流缓冲模块B3和第二电流缓冲模块B2的连接点为第二节点对(包括节点J1和节点J2),前馈跨导模块D1和第一电流缓冲模块B1串联于第二电流源模块20和第二节点对之间,即节点J1和节点J2为原始电流和补偿电流的汇合点;第三电流缓冲模块B3包括第三缓冲控制端对,第三缓冲控制端对接入第四参考电压vb4。其中,第三电流缓冲模块B3包括一级电流缓冲器,其具体结构可以参照前述各实施例设置。示例性地,第三电流缓冲模块B3包括晶体管Q14和晶体管Q24,晶体管Q14和晶体管Q24的基极接入第四参考电压vb4,晶体管Q14串联于节点J1和节点ION之间,晶体管Q23串联于节点J2和节点IOP之间。FIG. 5 is a schematic circuit diagram of another amplifier provided by the embodiment of the present invention. Referring to FIG. 5 , on the basis of the above embodiments, optionally, the amplifier further includes: a third current buffer module B3, the third current buffer module B3 is connected in series between the second current buffer module B2 and the output terminal of the amplifier; Define the connection point of the third current buffer module B3 and the second current buffer module B2 as the second node pair (including node J1 and node J2), and the feedforward transconductance module D1 and the first current buffer module B1 are connected in series with the second current source Between the module 20 and the second node pair, that is, the node J1 and the node J2 are the confluence points of the original current and the compensation current; the third current buffer module B3 includes a third buffer control terminal pair, and the third buffer control terminal pair is connected to the fourth Reference voltage vb4. Wherein, the third current buffer module B3 includes a first-stage current buffer, and its specific structure can be set with reference to the foregoing embodiments. Exemplarily, the third current buffer module B3 includes a transistor Q14 and a transistor Q24, the bases of the transistor Q14 and the transistor Q24 are connected to the fourth reference voltage vb4, the transistor Q14 is connected in series between the node J1 and the node ION, and the transistor Q23 is connected in series with the node Between J2 and the node IOP.

本实用新型实施例这样设置,相当于在原始电流和补偿电流的汇合点接一级或者多级电流缓冲器。具体地,晶体管Q12和晶体管Q22构成一级电流缓冲器,增大晶体管Q41、晶体管Q42支路的输出阻抗,而且该电流缓冲器可以减小晶体管Q41、晶体管Q42的基极到节点J1、节点J2的弥勒效应,从而增加整体电路的带宽。从节点J1、节点J2看到两个支路的寄生电容和并联阻抗,会影响带宽的大小,通过第三电流缓冲模块B3输出电流,这样增加输出阻抗的同时,减小输出端(节点ION和节点IOP)的寄生电容,从而增加电路带宽。The embodiment of the utility model is set in this way, which is equivalent to connecting a one-stage or multi-stage current buffer at the confluence point of the original current and the compensation current. Specifically, the transistor Q12 and the transistor Q22 form a first-level current buffer, which increases the output impedance of the transistor Q41 and the transistor Q42 branch, and the current buffer can reduce the voltage from the base of the transistor Q41 and the transistor Q42 to the nodes J1 and J2. The Maitreya effect, thereby increasing the bandwidth of the overall circuit. The parasitic capacitance and parallel impedance of the two branches can be seen from the nodes J1 and J2, which will affect the size of the bandwidth. The current is output through the third current buffer module B3, which increases the output impedance while reducing the output terminal (nodes ION and node IOP) parasitic capacitance, thereby increasing the circuit bandwidth.

图6为本实用新型实施例提供的又一种放大器的电路示意图。参见图6,在上述各实施例的基础上,可选地,输入放大模块A1包括与第一电流源模块10连接的连接点对(包括第一连接点JD3和第二连接点JD4);前馈跨导模块D1包括与第二电流源模块20连接的连接点对(包括第三连接点JD5和第四连接点JD6);第一电流源模块10包括:第一电流源IS1,第一电流源IS1的电流输入端与输入放大模块A1的连接点对(包括第一连接点JD3和第二连接点JD4)电连接,第一电流源IS1的电流输出端与第一电源电压电连接;和/或,第二电流源模块20包括:第二电流源IS2,第二电流源IS2的电流输入端与前馈跨导模块D1的连接点对(包括第三连接点JD5和第四连接点JD6)电连接,第二电流源IS2的电流输出端与第二电源电压电连接。其中,由第一电流源IS1构成的放大器为共源放大器输入。Fig. 6 is a schematic circuit diagram of another amplifier provided by the embodiment of the present invention. Referring to FIG. 6, on the basis of the above-mentioned embodiments, optionally, the input amplification module A1 includes a connection point pair (including the first connection point JD3 and the second connection point JD4) connected to the first current source module 10; The feeding transconductance module D1 includes a connection point pair (including the third connection point JD5 and the fourth connection point JD6) connected with the second current source module 20; the first current source module 10 includes: the first current source IS1, the first current source The current input terminal of the source IS1 is electrically connected to the connection point pair (including the first connection point JD3 and the second connection point JD4) of the input amplification module A1, and the current output terminal of the first current source IS1 is electrically connected to the first power supply voltage; and /Or, the second current source module 20 includes: the second current source IS2, the connection point pair between the current input end of the second current source IS2 and the feedforward transconductance module D1 (including the third connection point JD5 and the fourth connection point JD6 ) is electrically connected, and the current output end of the second current source IS2 is electrically connected to the second power supply voltage. Wherein, the amplifier constituted by the first current source IS1 is a common-source amplifier input.

在前述各实施例的基础上,可以理解的是,只有在晶体管Q31、晶体管Q32产生的非线性和晶体管Q41、晶体管Q42产生的非线性相等时,才会完全的抵消。但是在实际应用中,随着工艺波动,两者产生的直流线性度不能完全的抵消,所以可以设置第二电流源IS2为可调电流源,对第二电流源IS2的电流进行调整,使得晶体管Q41、晶体管Q42的非线性可调,以补偿工艺的波动。On the basis of the foregoing embodiments, it can be understood that only when the non-linearities generated by the transistors Q31 and Q32 are equal to the non-linearities generated by the transistors Q41 and Q42 can they be completely canceled. However, in practical applications, as the process fluctuates, the DC linearity generated by the two cannot be completely offset, so the second current source IS2 can be set as an adjustable current source, and the current of the second current source IS2 can be adjusted so that the transistor The non-linearity of Q41 and transistor Q42 can be adjusted to compensate for process fluctuations.

图7为本实用新型实施例提供的又一种放大器的电路示意图。参见图7,在上述各实施例的基础上,可选地,输入放大模块A1包括与第一电流源模块10连接的第一连接点JD3和第二连接点JD4;前馈跨导模块D1包括与第二电流源模块20连接的第三连接点JD5和第四连接点JD6;第一电流源模块10包括:第一电流源IS1、第一电阻单元R1和第二电阻单元R2,第一电流源IS1的电流输入端与输入放大模块A1的第一连接点JD3之间串联第一电阻单元R1,第一电流源IS1的电流输入端与输入放大模块A1的第二连接点JD4之间串联第二电阻单元R2,第一电流源IS1的电流输出端与第一电源电压电连接;和/或,第二电流源模块20包括:第二电流源IS2、第三电阻单元R3和第四电阻单元R4,第二电流源IS2为可调电流源,第二电流源IS2的电流输入端与前馈跨导模块D1的第三连接点JD5之间串联第三电阻单元R3,第二电流源IS2的电流输入端与前馈跨导模块D1的第四连接点JD6之间串联第四电阻单元R4,第二电流源IS2的电流输出端与第二电源电压电连接。其中,由第一电流源IS1、第一电阻单元R1和第二电阻单元R2构成的放大器为退化电阻放大器输入。本实用新型实施例在电流源模块中增加电阻单元,有利于提升电流源模块的线性度。FIG. 7 is a schematic circuit diagram of another amplifier provided by the embodiment of the present invention. Referring to FIG. 7 , on the basis of the above embodiments, optionally, the input amplification module A1 includes a first connection point JD3 and a second connection point JD4 connected to the first current source module 10; the feedforward transconductance module D1 includes The third connection point JD5 and the fourth connection point JD6 connected with the second current source module 20; the first current source module 10 includes: a first current source IS1, a first resistance unit R1 and a second resistance unit R2, the first current The first resistance unit R1 is connected in series between the current input terminal of the source IS1 and the first connection point JD3 of the input amplification module A1, and the first resistance unit R1 is connected in series between the current input terminal of the first current source IS1 and the second connection point JD4 of the input amplification module A1. Two resistance units R2, the current output terminal of the first current source IS1 is electrically connected to the first power supply voltage; and/or, the second current source module 20 includes: the second current source IS2, the third resistance unit R3 and the fourth resistance unit R4, the second current source IS2 is an adjustable current source, the third resistance unit R3 is connected in series between the current input terminal of the second current source IS2 and the third connection point JD5 of the feedforward transconductance module D1, the second current source IS2 A fourth resistor unit R4 is connected in series between the current input terminal and the fourth connection point JD6 of the feedforward transconductance module D1, and the current output terminal of the second current source IS2 is electrically connected to the second power supply voltage. Wherein, the amplifier composed of the first current source IS1, the first resistance unit R1 and the second resistance unit R2 is an input of a degenerate resistance amplifier. In the embodiment of the utility model, a resistance unit is added in the current source module, which is beneficial to improve the linearity of the current source module.

图8为本实用新型实施例提供的又一种放大器的电路示意图。参见图8,在上述各实施例的基础上,可选地,第一电流源模块10包括:第三电流源IS3、第四电流源IS4和第五电阻单元R5,第三电流源IS3的电流输入端与第一连接点JD3电连接,第四电流源IS4的电流输入端与输入放大模块A1的第二连接点JD4电连接;第三电流源IS3的电流输入端和第四电流源IS4的电流输入端之间还连接第五电阻单元R5,第三电流源IS3的电流输出端与第三电源电压电连接,第四电流源IS4的电流输出端与第四电源电压电连接;和/或,第二电流源模块20包括:第五电流源IS5、第六电流源IS6和第六电阻单元R6,第五电流源IS5的电流输入端与第三连接点JD5电连接,第六电流源IS6的电流输入端与输入放大模块A1的第四连接点JD6电连接;第五电流源IS5的电流输入端和第六电流源IS6的电流输入端之间还连接第六电阻单元R6,第五电流源IS5的电流输出端与第五电源电压电连接,第六电流源IS6的电流输出端与第六电源电压电连接。其中,由第三电流源IS3、第四电流源IS4和第五电阻单元R5构成的放大器为退化电阻放大器输入。本实用新型实施例在电流源模块中增加电阻单元,有利于提升电流源模块的线性度。另外,对于图7所示的结构,每个电流源模块中设置两个电阻,这两个电阻需要进行匹配。而对于图8所示的结构,每个电流源模块中设置一个电阻,不存在匹配问题,所以图8所示的结构的失调电压性能比较好。以及,图8所示的电流源模块中,电阻横跨在输入晶体管的发射极,电阻上不消耗额外的电压,因此,输入范围更大。FIG. 8 is a schematic circuit diagram of another amplifier provided by the embodiment of the present invention. Referring to FIG. 8 , on the basis of the above embodiments, optionally, the first current source module 10 includes: a third current source IS3, a fourth current source IS4 and a fifth resistance unit R5, the current of the third current source IS3 The input end is electrically connected to the first connection point JD3, and the current input end of the fourth current source IS4 is electrically connected to the second connection point JD4 of the input amplification module A1; the current input end of the third current source IS3 and the fourth current source IS4 The fifth resistance unit R5 is also connected between the current input ends, the current output end of the third current source IS3 is electrically connected to the third power supply voltage, and the current output end of the fourth current source IS4 is electrically connected to the fourth power supply voltage; and/or , the second current source module 20 includes: a fifth current source IS5, a sixth current source IS6 and a sixth resistance unit R6, the current input end of the fifth current source IS5 is electrically connected to the third connection point JD5, the sixth current source IS6 The current input end of the current source is electrically connected to the fourth connection point JD6 of the input amplification module A1; the sixth resistance unit R6 is also connected between the current input end of the fifth current source IS5 and the current input end of the sixth current source IS6, and the fifth current The current output terminal of the source IS5 is electrically connected to the fifth power supply voltage, and the current output terminal of the sixth current source IS6 is electrically connected to the sixth power supply voltage. Wherein, the amplifier formed by the third current source IS3, the fourth current source IS4 and the fifth resistance unit R5 is the input of the degenerate resistance amplifier. In the embodiment of the utility model, a resistance unit is added in the current source module, which is beneficial to improve the linearity of the current source module. In addition, for the structure shown in FIG. 7 , two resistors are set in each current source module, and the two resistors need to be matched. For the structure shown in FIG. 8 , a resistor is set in each current source module, and there is no matching problem, so the offset voltage performance of the structure shown in FIG. 8 is better. And, in the current source module shown in FIG. 8 , the resistor is across the emitter of the input transistor, and no extra voltage is consumed on the resistor, so the input range is larger.

本实用新型实施例还提供了一种示波器,该示波器包括:以上任意实施例提供的放大器;其中,放大器的输入端作为示波器的输入端。本实施例提供的示波器,具有以上任意实施例提供的放大器的有益效果,在此不再赘述。The embodiment of the utility model also provides an oscilloscope, which includes: the amplifier provided in any of the above embodiments; wherein, the input end of the amplifier is used as the input end of the oscilloscope. The oscilloscope provided in this embodiment has the beneficial effect of the amplifier provided in any of the above embodiments, which will not be repeated here.

应该理解,可以使用上面所示的各种形式的流程,重新排序、增加或删除步骤。例如,本实用新型中记载的各步骤可以并行地执行也可以顺序地执行也可以不同的次序执行,只要能够实现本实用新型的技术方案所期望的结果,本文在此不进行限制。It should be understood that steps may be reordered, added or deleted using the various forms of flow shown above. For example, each step described in the utility model can be executed in parallel or sequentially or in a different order, as long as the desired result of the technical solution of the utility model can be achieved, there is no limitation herein.

上述具体实施方式,并不构成对本实用新型保护范围的限制。本领域技术人员应该明白的是,根据设计要求和其他因素,可以进行各种修改、组合、子组合和替代。任何在本实用新型的精神和原则之内所作的修改、等同替换和改进等,均应包含在本实用新型保护范围之内。The above specific implementation methods do not constitute a limitation to the protection scope of the present utility model. It should be apparent to those skilled in the art that various modifications, combinations, sub-combinations and substitutions may be made depending on design requirements and other factors. Any modifications, equivalent replacements and improvements made within the spirit and principles of the present utility model shall be included within the protection scope of the present utility model.

Claims (10)

1. An amplifier, comprising: the device comprises an input amplification module, an isolation module, a feedforward transconductance module, a first current buffer module, a first current source module and a second current source module;
the input amplification module and the isolation module are connected in series between the first current source module and the output end of the amplifier; wherein a connection point of the input amplification module and the isolation module is defined as a first node pair;
the feed-forward transconductance module and the first current buffer module are connected in series between the second current source module and the output end of the amplifier;
the input amplification module comprises an input control end pair, and the input control end pair is connected with an input signal pair; the feedforward transconductance module comprises a feedforward control end pair, and the feedforward control end pair is electrically connected with the first node pair in a staggered manner; the isolation module comprises an isolation control end pair, and the isolation control end pair is connected with a first reference voltage; the first current buffer module comprises a first buffer control end pair, and the first buffer control end pair is connected with a second reference voltage.
2. The amplifier of claim 1, wherein the first current buffer module comprises at least one stage of current buffer.
3. The amplifier of claim 1, further comprising:
a second current buffer module connected in series between the isolation module and the output of the amplifier; the second current buffer module comprises a second buffer control end pair, and the second buffer control end pair is connected with a third reference voltage;
wherein the second current buffer module comprises a primary current buffer.
4. The amplifier of claim 3, further comprising:
the third current buffer module is connected between the second current buffer module and the output end of the amplifier in series; defining a connection point of the third current buffer module and the second current buffer module as a second node pair, the feed forward transconductance module and the first current buffer module being connected in series between the second current source module and the second node pair; the third current buffer module comprises a third buffer control end pair, and the third buffer control end pair is connected with a fourth reference voltage;
wherein the third current buffer module comprises a primary current buffer.
5. The amplifier according to any of claims 2-4, wherein the current buffer comprises: the control end of the first transistor and the control end of the second transistor are connected with the same reference voltage; a first end of the first transistor and a first end of the second transistor are used as an input connecting point pair of the current buffer; the second end of the first transistor and the second end of the second transistor serve as an output connecting point pair of the current buffer.
6. The amplifier according to claim 5, wherein the first transistor and the second transistor are both transistors; or, the first transistor and the second transistor are both field effect transistors.
7. The amplifier of claim 1, wherein the input amplification module comprises a pair of connection points connected to the first current source module; the feed-forward transconductance module comprises a connecting point pair connected with the second current source module;
the first current source module includes: the current input end of the first current source is electrically connected with the connecting point pair of the input amplification module, and the current output end of the first current source is electrically connected with a first power supply voltage;
and/or, the second current source module comprises: and the current input end of the second current source is electrically connected with the connecting point pair of the feedforward transconductance module, and the current output end of the second current source is electrically connected with a second power voltage.
8. The amplifier of claim 1, wherein the input amplification module comprises a first connection point and a second connection point connected to the first current source module; the feed-forward transconductance module comprises a third connection point and a fourth connection point which are connected with the second current source module;
the first current source module includes: the current output end of the first current source is electrically connected with a first power voltage;
and/or, the second current source module comprises: the feed-forward transconductance module is connected with the feed-forward transconductance module in series, and the feed-forward transconductance module is connected with the feed-forward transconductance module in series.
9. The amplifier of claim 1, wherein the input amplification module comprises a first connection point and a second connection point connected to the first current source module; the feed-forward transconductance module comprises a third connection point and a fourth connection point which are connected with the second current source module;
the first current source module includes: the current input end of the third current source is electrically connected with the first connection point, and the current input end of the fourth current source is electrically connected with the second connection point of the input amplification module; the fifth resistance unit is further connected between the current input end of the third current source and the current input end of the fourth current source, the current output end of the third current source is electrically connected with a third power supply voltage, and the current output end of the fourth current source is electrically connected with a fourth power supply voltage;
and/or, the second current source module comprises: the current input end of the fifth current source is electrically connected with the third connection point, and the current input end of the sixth current source is electrically connected with the fourth connection point of the input amplification module; and the current output end of the fifth current source is electrically connected with a fifth power supply voltage, and the current output end of the sixth current source is electrically connected with a sixth power supply voltage.
10. An oscilloscope, comprising: an amplifier as claimed in any one of claims 1 to 9; and the input end of the amplifier is used as the input end of the oscilloscope.
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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN117792300A (en) * 2024-02-23 2024-03-29 普源精电科技股份有限公司 An amplifier and oscilloscope
CN117792299A (en) * 2024-02-23 2024-03-29 普源精电科技股份有限公司 Amplifier and oscilloscope

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN117792300A (en) * 2024-02-23 2024-03-29 普源精电科技股份有限公司 An amplifier and oscilloscope
CN117792299A (en) * 2024-02-23 2024-03-29 普源精电科技股份有限公司 Amplifier and oscilloscope
CN117792299B (en) * 2024-02-23 2024-05-14 普源精电科技股份有限公司 Amplifier and oscilloscope
CN117792300B (en) * 2024-02-23 2024-05-14 普源精电科技股份有限公司 Amplifier and oscilloscope

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