CN218276071U - Antenna power supply circuit - Google Patents
Antenna power supply circuit Download PDFInfo
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- CN218276071U CN218276071U CN202222091413.8U CN202222091413U CN218276071U CN 218276071 U CN218276071 U CN 218276071U CN 202222091413 U CN202222091413 U CN 202222091413U CN 218276071 U CN218276071 U CN 218276071U
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Abstract
The utility model provides an antenna supply circuit for the antenna power supply, relate to the electrical engineering field, can take place under the condition of short circuit at active communication antenna, avoid antenna supply circuit's short-circuit current to lead to antenna supply circuit's component to be destroyed, promote antenna supply circuit's life. The antenna power supply circuit includes: a buffer circuit and a power supply circuit; the first input end of the buffer circuit is electrically connected with the power supply, and the output end of the buffer circuit is electrically connected with the antenna through the power supply circuit; the buffer circuit is used for limiting the current of the antenna power supply circuit to a preset value.
Description
Technical Field
The utility model relates to an electrical engineering field especially relates to antenna supply circuit.
Background
The antenna power supply circuit of the vehicle is used for supplying power to the active communication antenna of the vehicle, and when the active communication antenna is in short circuit fault, the control module of the antenna power supply circuit can control the antenna power supply circuit to stop supplying power to the active communication antenna. For example, a vehicle internet system supplies power to a Global Positioning System (GPS) antenna of the vehicle, and when the GPS antenna is short-circuited, the vehicle internet system stops supplying power to the GPS antenna.
In the existing scheme, in order to prevent the antenna power supply circuit from being turned off by mistake, after the control module of the antenna power supply circuit preliminarily determines that the active communication antenna is short-circuited, whether the active communication antenna is actually short-circuited or not is further verified, for example, under the condition that the filtering time meets the requirement, it is determined that the active communication antenna is actually short-circuited.
In the process that the control module of the antenna power supply circuit verifies whether the active communication antenna actually generates the short circuit, for example, whether the filtering time meets the requirement, and in the case that the requirement is met, the active communication antenna is determined to actually generate the short circuit, and the antenna power supply circuit can still normally supply power to the antenna. Therefore, when the active communication antenna is short-circuited, the short-circuit current of the antenna power supply circuit is greatly increased compared with the normal operating current, which may damage the components (e.g., the current limiting resistor) of the antenna power supply circuit, thereby reducing the service life of the antenna power supply circuit.
SUMMERY OF THE UTILITY MODEL
The utility model provides an antenna supply circuit can avoid antenna supply circuit's short-circuit current to lead to antenna supply circuit's component to be destroyed under the condition that active communication antenna takes place the short circuit, promotes antenna supply circuit's life.
The utility model provides an antenna supply circuit for the antenna power supply, antenna supply circuit includes: a buffer circuit and a power supply circuit; the first input end of the buffer circuit is electrically connected with the power supply, and the output end of the buffer circuit is electrically connected with the antenna through the power supply circuit; the buffer circuit is used for limiting the current of the antenna power supply circuit to a preset value.
Based on this scheme, through increase buffer circuit between power and supply circuit, because buffer circuit can be with antenna supply circuit's current restriction for the default, therefore, when the antenna takes place the short circuit, the value of the electric current through antenna supply circuit also can not surpass the default, the problem that antenna supply circuit's short-circuit current normal operating current increases by a wide margin has been avoided to avoid antenna supply circuit's component to be destroyed, and then promote antenna supply circuit's life.
In one possible design, the buffer circuit includes a first resistor, a second resistor, a first capacitor, a second capacitor, a first transient diode, and a buffer chip, where the buffer chip includes an input pin, an output pin, a first ground pin, a fault indication pin, and a current limit pin; the first input end of the buffer circuit is electrically connected with the input pin of the buffer chip; a first input end of the buffer circuit is electrically connected with a fault indication pin of the buffer chip through a first resistor; a first input end of the buffer circuit is grounded through a first capacitor; the output end of the buffer circuit is electrically connected with an output pin of the buffer chip; the output end of the buffer circuit is grounded through a second capacitor; the output end of the buffer circuit is grounded through a first transient diode; and the current limiting pin of the buffer chip is grounded through a second resistor.
Based on the scheme, the circuit structure of the buffer circuit is provided.
In one possible design, the buffer circuit further includes a first detection terminal and a second detection terminal; the first detection end is electrically connected with a fault indication pin of the buffer chip; the second detection end is electrically connected with the output end of the buffer circuit.
Based on the scheme, whether the buffer circuit can work normally can be detected.
In one possible design, the power supply circuit includes a third resistor and a first inductor; the output end of the buffer circuit is electrically connected with the first end of the first inductor through a third resistor; the second end of the first inductor is electrically connected with the antenna.
Based on the scheme, the circuit structure of the power supply circuit is specifically provided.
In one possible design, the power supply circuit further includes a third detection terminal; the output end of the buffer circuit is also electrically connected with the third detection end through a third resistor.
Based on the scheme, whether the power supply circuit can work normally or not can be detected.
In one possible design, the antenna power supply circuit further comprises a detection circuit, wherein the detection circuit is used for detecting whether the antenna is short-circuited or not, and comprises a fourth resistor, a fifth resistor, a sixth resistor, a seventh resistor, a first triode, a second triode, a third capacitor, a fourth capacitor, a second transient diode and a detection chip; the emitter of the first triode is electrically connected with the output end of the buffer circuit through a fourth resistor, the collector of the first triode is grounded through a fifth resistor, the collector of the first triode is also electrically connected with the base of the second triode, and the base of the first triode is electrically connected with the base of the second triode; the emitting electrode of the second triode is electrically connected with the third detection end, the first end of the first inductor is grounded through a third capacitor, a fourth capacitor is connected with the third capacitor in parallel, the collecting electrode of the second triode is grounded through a sixth resistor, the collecting electrode of the second triode is electrically connected with the input end of the detection chip through a seventh resistor, the collecting electrode of the second triode is electrically connected with the first end of the second transient diode through a seventh resistor, and the second end of the second transient diode is grounded.
Based on the scheme, the detection circuit is additionally arranged in the antenna power supply circuit, so that the short-circuit fault of the antenna can be sensed in time when the antenna has the short-circuit fault.
In one possible design, the buffer circuit further includes a second input terminal, an eighth resistor, and a ninth resistor, and the buffer chip further includes an enable pin and a second ground pin; the detection chip also comprises an output end; the detection chip is used for sending a power supply stopping signal to an enabling pin of the buffer chip through the output end under the condition that the antenna is short-circuited; the second input end of the buffer circuit is electrically connected with the output end of the detection chip, the second input end of the buffer circuit is also electrically connected with the first end of the ninth resistor through the eighth resistor, the enabling pin of the buffer chip is electrically connected with the first end of the ninth resistor, the second end of the ninth resistor is grounded, and the second end of the ninth resistor is also electrically connected with the second grounding pin of the buffer chip.
Based on the scheme, the output end of the detection chip of the detection circuit is electrically connected with the enabling pin of the buffer chip through the eighth resistor and the ninth resistor, and the power supply stopping signal can be sent to the enabling pin of the buffer chip under the condition that the detection circuit determines that the antenna has a short-circuit fault, so that the antenna power supply circuit is controlled to stop supplying power to the antenna
Drawings
Fig. 1 is a circuit diagram of an antenna power supply circuit provided by the present invention;
fig. 2 is a circuit diagram of another antenna power supply provided by the present invention;
fig. 3 is a circuit diagram of another antenna power supply provided by the present invention;
fig. 4 is a circuit diagram of another antenna power supply provided by the present invention;
fig. 5 is a circuit diagram of another antenna power supply circuit provided by the present invention;
fig. 6 is a circuit diagram of another antenna power supply provided by the present invention;
fig. 7 is a circuit diagram of another antenna power supply circuit provided by the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be described clearly and completely with reference to the accompanying drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments in the present invention, all other embodiments obtained by a person skilled in the art without creative work belong to the protection scope of the present invention.
In the description of the present invention, it is to be noted that the terms "electrically connected" and "connected" are to be interpreted broadly, and may be, for example, fixedly connected, detachably connected, or integrally connected, unless explicitly stated or limited otherwise. The specific meaning of the above terms in the present invention can be understood in specific cases to those skilled in the art.
The terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or to implicitly indicate the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of the present invention, "a plurality" means two or more unless otherwise specified.
The utility model provides an antenna power supply circuit for the antenna power supply, fig. 1 does the utility model provides a pair of antenna power supply circuit, as shown in fig. 1, antenna power supply circuit 10 includes: a buffer circuit 11 and a power supply circuit 12.
The first input terminal 117 of the buffer circuit 11 is electrically connected to a power supply, and the output terminal 118 of the buffer circuit 11 is electrically connected to an antenna through the power supply circuit 12. The buffer circuit 11 is used to limit the current of the antenna power supply circuit 10 to a preset value.
It should be noted that the antenna may be a GPS antenna of a vehicle, or the antenna may also be an antenna of a base station, which is not limited by the present invention.
The preset value can be 100 milliamperes (mA), and the preset value can also be 110mA, or the preset value can also be 120mA, the utility model discloses do not do the restriction to this.
Based on this scheme, through increase buffer circuit between power and supply circuit, because buffer circuit can be for the default with antenna supply circuit's electric current restriction, therefore, when the antenna takes place the short circuit, the value of the electric current through antenna supply circuit also can not surpass the default, has avoided antenna supply circuit's the more normal operating current of short-circuit current problem that increases by a wide margin to avoid antenna supply circuit's component to be destroyed, and then promote antenna supply circuit's life.
The above is a general description of the embodiments of the present invention, and the following is a further description of the embodiments of the present invention.
IN one design, fig. 2 shows another antenna power supply circuit according to the present invention, as shown IN fig. 2, the buffer circuit 11 includes a first resistor 111, a second resistor 112, a first capacitor 113, a second capacitor 114, a first transient diode 115, and a buffer chip 116, and the buffer chip 116 includes an input pin IN, an output pin Vout, a first ground pin GND1, a fault indication pin nFAULT, and a current limiting pin ILIM.
The first input terminal 117 of the buffer circuit 11 is electrically connected to the input pin IN of the buffer chip 116.
The first input terminal 117 of the buffer circuit 11 is electrically connected to the fault indication pin nFAULT of the buffer chip 116 through the first resistor 111.
The first input 117 of the buffer circuit 11 is connected to ground via the first capacitor 113.
The output terminal 118 of the buffer circuit 11 is electrically connected to the output pin Vout of the buffer chip 116.
The output 118 of the buffer circuit 11 is connected to ground via the second capacitor 114.
The output 118 of the snubber circuit 11 is also connected to ground through the first transient diode 115.
The current limit pin ILIM of the buffer chip 116 is connected to ground through the second resistor 112.
The first ground pin GND1 of the buffer chip 116 is grounded.
Note that the resistance value of the first resistor 111 may be 47000 ohms (Ω).
The resistance value of the second resistor 112 may be 196000 Ω.
The capacitance of the first capacitor 113 may be 0.1 microfarads (μ F), and the nominal voltage of the first capacitor 113 may be 6.3 volts (V).
The capacitance of the second capacitor 114 may be 0.1 muF, and the nominal voltage of the second capacitor 114 may be 6.3V.
The first transient diode 115 may be model TUSD03FBD.
The model of the buffer chip 116 may be SGM2553D/EYTDI6G/TR.
Based on the parameter examples of the above components, the short-circuit current can be limited to 100mA.
Based on the scheme, a circuit schematic diagram of the buffer circuit is specifically provided.
In one design, fig. 3 shows another antenna power supply circuit provided by the present invention, as shown in fig. 3, the buffer circuit 11 further includes a first detecting terminal 119 and a second detecting terminal 1110;
the first detection terminal 119 is electrically connected to a fault indication pin nFAULT of the buffer chip 16.
The second detection terminal 1110 is electrically connected to the output terminal 118 of the buffer circuit 11.
The first detection terminal 119 and the second detection terminal 1110 are ports for detecting whether the buffer circuit 11 can operate normally during the manufacturing process of the buffer circuit 11.
For the specific detection scheme of whether the buffer circuit 11 can normally operate, the existing scheme may be referred to, and this application is not repeated here.
Based on the scheme, whether the buffer circuit can work normally can be detected.
In one design, fig. 4 shows another antenna power supply circuit provided by the present invention, and as shown in fig. 4, the power supply circuit 12 includes a third resistor 121 and a first inductor 122.
The output end 118 of the buffer circuit 11 is electrically connected to the first end of the first inductor 122 through the third resistor 121.
The second terminal of the first inductor 122 is electrically connected to the antenna.
The resistance value of the third resistor 121 may be 10 Ω.
The inductance value of the first inductor 122 may be 56 nanohenries (nH).
Based on the scheme, a circuit schematic diagram of the power supply circuit is specifically provided.
In one design, fig. 5 shows another antenna power supply circuit provided by the present invention, as shown in fig. 5, the power supply circuit 12 further includes a third detection terminal 123.
The output terminal 118 of the buffer circuit 11 is further electrically connected to the third detection terminal 123 through the third resistor 121.
The third detection terminal 123 is a port for detecting whether the power supply circuit 12 can operate normally during the manufacturing process of the power supply circuit 12.
Based on the scheme, whether the power supply circuit can work normally can be detected.
In one design, fig. 6 shows another antenna power supply circuit provided by the present invention, as shown in fig. 6, the antenna power supply circuit 10 further includes a detection circuit 13, the detection circuit 13 is used for detecting whether the antenna is short-circuited, and the detection circuit 13 includes a fourth resistor 131, a fifth resistor 132, a sixth resistor 133, a seventh resistor 134, a first triode 135, a second triode 136, a third capacitor 137, a fourth capacitor 138, a second transient diode 139, and a detection chip 1310.
An emitter E1 of the first triode 135 is electrically connected to the output terminal 118 of the buffer circuit 11 through the fourth resistor 131, a collector C1 of the first triode 135 is grounded through the fifth resistor 132, the collector C1 of the first triode 135 is also electrically connected to a base B2 of the second triode 136, and the base B1 of the first triode 135 is electrically connected to a base B2 of the second triode 136;
an emitter E2 of the second triode 136 is electrically connected to the third detection terminal 123, the first terminal of the first inductor 122 is further grounded through a third capacitor 137, the fourth capacitor 138 is connected in parallel with the third capacitor 137, a collector C2 of the second triode 136 is grounded through a sixth resistor 133, the collector C2 of the second triode 136 is further electrically connected to an input terminal 13101 of the detection chip 1310 through a seventh resistor 134, the collector C2 of the second triode 136 is further electrically connected to a first terminal of a second transient diode 139 through a seventh resistor 134, and a second terminal of the second transient diode 139 is grounded.
Note that the resistance value of the fourth resistor 131 may be 5100 Ω.
The resistance value of the fifth resistor 132 may be 820000 Ω.
The resistance value of the sixth resistor 133 may be 820000 Ω.
The resistance value of the seventh resistor 134 may be 1000000 Ω.
The first transistor 135 and the second transistor 136 may be of the MMBT5401 type.
The capacitance of the third capacitor 137 may be 27 picofarads (pF), and the voltage rating of the third capacitor 137 may be 50V.
The capacitance of the fourth capacitor 138 may be 0.1 μ F, and the nominal voltage of the fourth capacitor 138 may be 50V.
The second transient diode may be model number TUSD03FBD.
The detecting chip 1310 may be a chip having a function of detecting an antenna short circuit in the art, which is not illustrated in the present invention.
Based on the scheme, the detection circuit is added in the antenna power supply circuit, so that the short-circuit fault of the antenna can be sensed in time when the antenna has the short-circuit fault.
In one design, fig. 7 shows another antenna power supply circuit provided by the present invention, as shown in fig. 7, the buffer circuit 11 further includes a second input end 1111, an eighth resistor 1112, and a ninth resistor 1113, and the buffer chip 116 further includes an enable pin EN and a second ground pin GND2; detection chip 1310 also includes an output 13102; the detection chip 1310 is used for sending a power supply stop signal to the enable pin EN of the buffer chip 116 through the output terminal 13102 in the case of short circuit of the antenna;
the second input 1111 of the buffer circuit 11 is electrically connected to the output terminal 13102 of the detection chip 1310, the second input 1111 of the buffer circuit 11 is further electrically connected to a first terminal of a ninth resistor 1113 through an eighth resistor 1112, the enable pin EN of the buffer chip 116 is electrically connected to the first terminal of the ninth resistor 1113, a second terminal of the ninth resistor 1113 is grounded, and a second terminal of the ninth resistor 1113 is further electrically connected to the second ground pin GND2 of the buffer chip 116.
The resistance value of the eighth resistor 1112 may be 47000 Ω.
The ninth resistor 1113 may have a resistance of 1000000 Ω.
Based on the scheme, the output end of the detection chip of the detection circuit is electrically connected with the enabling pin of the buffer chip through the eighth resistor and the ninth resistor, and the power supply stopping signal can be sent to the enabling pin of the buffer chip under the condition that the detection circuit determines that the antenna is in short-circuit fault, so that the antenna power supply circuit is controlled to stop supplying power to the antenna.
In the description herein, particular features, structures, or characteristics may be combined in any suitable manner in any one or more embodiments or examples.
The above embodiments are only specific embodiments of the present invention, but the scope of the present invention is not limited thereto, and any person skilled in the art can easily think of changes or substitutions within the technical scope of the present invention, and all should be covered within the scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the claims.
Claims (7)
1. An antenna supply circuit, wherein the antenna supply circuit is configured to supply power to an antenna, the antenna supply circuit comprising: a buffer circuit and a power supply circuit;
the first input end of the buffer circuit is electrically connected with a power supply, and the output end of the buffer circuit is electrically connected with the antenna through the power supply circuit; the buffer circuit is used for limiting the current of the antenna power supply circuit to a preset value.
2. The antenna supply circuit according to claim 1, wherein the buffer circuit comprises a first resistor, a second resistor, a first capacitor, a second capacitor, a first transient diode, and a buffer chip, the buffer chip comprising an input pin, an output pin, a first ground pin fault indication pin, and a current limit pin;
the first input end of the buffer circuit is electrically connected with the input pin of the buffer chip;
a first input end of the buffer circuit is electrically connected with a fault indication pin of the buffer chip through the first resistor;
a first input end of the buffer circuit is grounded through the first capacitor;
the output end of the buffer circuit is electrically connected with an output pin of the buffer chip;
the output end of the buffer circuit is grounded through the second capacitor;
the output end of the buffer circuit is also grounded through the first transient diode;
the current limiting pin of the buffer chip is grounded through a second resistor;
the first grounding pin of the buffer chip is grounded.
3. The antenna supply circuit according to claim 2, wherein the snubber circuit further comprises a first detection terminal and a second detection terminal;
the first detection end is electrically connected with a fault indication pin of the buffer chip;
the second detection end is electrically connected with the output end of the buffer circuit.
4. The antenna feeding circuit according to claim 2 or 3, wherein the feeding circuit comprises a third resistor and a first inductor;
the output end of the buffer circuit is electrically connected with the first end of the first inductor through the third resistor;
the second end of the first inductor is electrically connected with the antenna.
5. The antenna feeding circuit according to claim 4, wherein the feeding circuit further comprises a third detection terminal;
the output end of the buffer circuit is also electrically connected with the third detection end through the third resistor.
6. The antenna power supply circuit according to claim 5, further comprising a detection circuit, wherein the detection circuit is configured to detect whether the antenna is short-circuited, and the detection circuit comprises a fourth resistor, a fifth resistor, a sixth resistor, a seventh resistor, a first transistor, a second transistor, a third capacitor, a fourth capacitor, a second transient diode, and a detection chip;
an emitting electrode of the first triode is electrically connected with the output end of the buffer circuit through the fourth resistor, a collecting electrode of the first triode is grounded through a fifth resistor, the collecting electrode of the first triode is also electrically connected with a base electrode of the second triode, and the base electrode of the first triode is electrically connected with the base electrode of the second triode;
the emitting electrode of the second triode is electrically connected with the third detection end, the first end of the first inductor is grounded through a third capacitor, the fourth capacitor is connected with the third capacitor in parallel, the collecting electrode of the second triode is grounded through a sixth resistor, the collecting electrode of the second triode is electrically connected with the input end of the detection chip through a seventh resistor, the collecting electrode of the second triode is electrically connected with the first end of the second transient diode through the seventh resistor, and the second end of the second transient diode is grounded.
7. The antenna power supply circuit according to claim 6, wherein the buffer circuit further comprises a second input terminal, an eighth resistor, a ninth resistor, the buffer chip further comprises an enable pin and a second ground pin; the detection chip also comprises an output end; the detection chip is used for sending a power supply stopping signal to an enabling pin of the buffer chip through the output end under the condition that the antenna is short-circuited;
the second input end of the buffer circuit is electrically connected with the output end of the detection chip, the second input end of the buffer circuit is further electrically connected with the first end of the ninth resistor through an eighth resistor, the enabling pin of the buffer chip is electrically connected with the first end of the ninth resistor, the second end of the ninth resistor is grounded, and the second end of the ninth resistor is further electrically connected with the second grounding pin of the buffer chip.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
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CN202222091413.8U CN218276071U (en) | 2022-08-09 | 2022-08-09 | Antenna power supply circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
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CN202222091413.8U CN218276071U (en) | 2022-08-09 | 2022-08-09 | Antenna power supply circuit |
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Publication Number | Publication Date |
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CN218276071U true CN218276071U (en) | 2023-01-10 |
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Application Number | Title | Priority Date | Filing Date |
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CN202222091413.8U Active CN218276071U (en) | 2022-08-09 | 2022-08-09 | Antenna power supply circuit |
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CN (1) | CN218276071U (en) |
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2022
- 2022-08-09 CN CN202222091413.8U patent/CN218276071U/en active Active
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