CN218213283U

CN218213283U - Interface test circuit and test device

Info

Publication number: CN218213283U
Application number: CN202220471399.1U
Authority: CN
Inventors: 吴东; 陈熙; 王雷
Original assignee: Shenzhen Zhenghao Zhizao Technology Co ltd
Current assignee: Shenzhen Zhenghao Zhizao Technology Co ltd
Priority date: 2022-03-03
Filing date: 2022-03-03
Publication date: 2023-01-03
Anticipated expiration: 2032-03-03

Abstract

The application belongs to the technical field of circuits, and provides an interface test circuit and testing arrangement, wherein, interface test circuit for test USB interface circuit, include: the circuit comprises a first voltage output circuit, a second voltage output circuit, a load and a sampling circuit; the first voltage output circuit is used for generating a first test voltage signal according to the first power supply voltage signal and outputting the first test voltage signal; the second voltage output circuit is used for generating a second test voltage signal according to the second power supply voltage signal and outputting the second test voltage signal; the load is used as the load of the USB interface circuit; the sampling circuit is connected with the load and used for sampling and outputting the electrical parameters on the load. Through setting up first voltage output circuit, second voltage output circuit and load, can simulate actual load operating mode and test, solve the problem that present test method can't simulate actual load operating mode and test, and the problem that efficiency of software testing is low.

Description

Interface test circuit and test device

Technical Field

The application belongs to the technical field of circuits, and particularly relates to an interface test circuit and a test device.

Background

At present, a plurality of new-type digital terminal devices such as mobile phones, tablets, notebook computers and the like adopt USB interfaces and support Quick charging functions such as high-pass QC3.0 (Quick Charge is abbreviated as QC), high-pass QC2.0 and PD (USB3.1type-C PD is abbreviated as PD). Therefore, charging equipment such as chargers, car chargers, mobile power supplies and the like compatible with the USB Type-C interface and the quick charging protocol are also produced. After the production of the equipment is completed, various functions of the equipment need to be tested so as to ensure that each functional module can work normally. However, most people still can only simply verify the product by using a real machine and cannot detect the product in mass production. Therefore, most manufacturers need to manually switch the output voltage by using various adapter plates to perform testing, so that the testing is complicated, the production efficiency is low, and the production capacity is greatly limited. Taking the energy storage power supply as an example, after the design of each circuit board is completed, each function of the circuit board needs to be tested to ensure that the circuit board has no fault.

However, the existing testing method directly adopts a corresponding testing instrument to test whether the line is normal, so that the problem that the actual load working condition cannot be simulated for testing exists, and the testing efficiency is low.

SUMMERY OF THE UTILITY MODEL

In order to solve the above technical problem, an embodiment of the present application provides an interface test circuit and a test apparatus, which can solve the problems that the current test method cannot simulate the actual load condition for testing, and the test efficiency is low.

A first aspect of an embodiment of the present application provides an interface test circuit, configured to test a USB interface circuit, where the interface test circuit includes: the circuit comprises a first voltage output circuit, a second voltage output circuit, a load and a sampling circuit;

the input end of the first voltage output circuit is used for receiving a first power supply voltage signal, the output end of the first voltage output circuit is used for being connected with a first data pin of the USB interface circuit, and the first voltage output circuit is used for generating and outputting a first test voltage signal according to the first power supply voltage signal when a control end receives a first control signal;

the input end of the second voltage output circuit is used for receiving a second power supply voltage signal, the output end of the second voltage output circuit is used for being connected with a second data pin of the USB interface circuit, and the second voltage output circuit is used for generating and outputting a second test voltage signal according to the second power supply voltage signal when the control end receives a second control signal;

the load is used for being connected with a voltage output pin of the USB interface circuit and used as the load of the USB interface circuit;

and the sampling circuit is connected with the load and is used for sampling and outputting the electrical parameters on the load.

In one embodiment, the first voltage output circuit includes:

the first voltage division unit is connected with the input end of the first voltage output circuit and used for receiving the first power supply voltage signal and performing voltage division processing on the first power supply voltage signal to generate a first voltage division signal;

the first isolation unit is connected with the first voltage division unit and used for isolating and outputting the first voltage division signal;

and the first switch unit is connected with the first isolation unit and used for receiving the first control signal, switching the first control signal from an open state to a closed state according to the first control signal, and outputting the first test voltage signal to a first data pin of the USB interface circuit according to the isolated first voltage division signal.

In one embodiment, the first voltage output circuit further comprises: and the first filtering unit is arranged between the first isolation unit and the first switch unit and is used for filtering the isolated first partial pressure signal.

In one embodiment, the first voltage division unit includes: the circuit comprises a first resistor, a second resistor, a third resistor and a first capacitor; wherein the content of the first and second substances,

the first end of the first resistor is connected with the input end of the first voltage output circuit, the second end of the first resistor is connected in series with the second resistor and then grounded, the second end of the first resistor is also connected in series with the third resistor and then connected with the first isolation unit, and the first capacitor is connected with the second resistor in parallel.

In one embodiment, the first isolation unit comprises a first voltage follower, a fourth resistor and a second capacitor; wherein the content of the first and second substances,

the positive input end of the first voltage follower is connected with the first voltage division unit, the negative input end of the first voltage follower is connected with the fourth resistor in series and then connected with the output end of the first voltage follower, the grounding end of the first voltage follower is grounded, the power supply end of the first voltage follower is used for receiving the first power supply voltage signal, and the power supply end of the first voltage follower is further connected with the second capacitor in series and then grounded.

In one embodiment, the first switching unit includes: the first switch tube is connected with the first resistor; wherein the content of the first and second substances,

the first end of the first switch tube is connected with the first filtering unit, the control end of the first switch tube is connected with the control end of the first voltage output circuit, the control end of the first switch tube is further connected in series with the sixth resistor and then grounded, the second end of the first switch tube is connected with the second end of the second switch tube, the second end of the first switch tube is connected in series with the seventh resistor and then grounded, the control end of the second switch tube is connected with the control end of the first voltage output circuit, and the first end of the second switch tube is used for being connected with the first data pin of the USB interface circuit.

In one embodiment, the interface test circuit further comprises:

the control circuit is respectively connected with the first voltage output circuit, the second voltage output circuit and the sampling circuit and is used for outputting at least one of the first control signal and the second control signal according to a test signal; the control circuit is further used for receiving the electrical parameters output by the sampling circuit, acquiring target reference electrical parameters according to the test signals, and outputting fault signals when the electrical parameters output by the sampling circuit are not matched with the target reference electrical parameters.

In one embodiment, the interface test circuit further comprises:

the first voltage stabilizing circuit is connected with the output end of the first voltage output circuit and is used for carrying out voltage stabilizing processing on the first test voltage signal;

and the second voltage stabilizing circuit is connected with the output end of the second voltage output circuit and is used for stabilizing the second test voltage signal.

The embodiment of the present application further provides a testing apparatus, including the USB connector, the USB connector is used for being connected with the USB interface circuit that awaits measuring, still includes: at least one of the above-described interface test circuits; the USB connector is provided with connecting pins corresponding to the first data pin, the second data pin and the voltage output pin of the USB interface circuit, so that the interface test circuit is connected with the USB interface circuit to be tested through the USB connector.

In one embodiment, the test apparatus further comprises: the testing device comprises a testing box and a testing platform, wherein the testing platform is fixed above the testing box, an interface testing circuit is arranged in the testing box, and a USB (universal serial bus) connector is arranged on the testing platform.

The embodiment of the application provides an interface test circuit and testing arrangement, wherein, interface test circuit for test USB interface circuit, interface test circuit includes: the circuit comprises a first voltage output circuit, a second voltage output circuit, a load and a sampling circuit; the input end of the first voltage output circuit is used for receiving a first power supply voltage signal, the output end of the first voltage output circuit is used for being connected with a first data pin of the USB interface circuit, and the first voltage output circuit is used for generating and outputting a first test voltage signal according to the first power supply voltage signal when the control end receives a first control signal; the input end of the second voltage output circuit is used for receiving a second power supply voltage signal, the output end of the second voltage output circuit is used for being connected with a second data pin of the USB interface circuit, and the control end of the second voltage output circuit is used for generating and outputting a second test voltage signal according to the second power supply voltage signal when receiving a second control signal; the load is used for being connected with a voltage output pin of the USB interface circuit to serve as the load of the USB interface circuit; the sampling circuit is connected with the load and used for sampling and outputting the electrical parameters on the load. Through setting up first voltage output circuit, second voltage output circuit and load, can simulate actual load operating mode and test, solve the problem that present test method can't simulate actual load operating mode and test, and the problem that efficiency of software testing is low.

Drawings

FIG. 1 is a schematic diagram of an interface test circuit according to an embodiment of the present application;

FIG. 2 is a schematic diagram of an interface test circuit according to another embodiment of the present application;

FIG. 3 is a schematic diagram of an interface structure of a USB interface circuit according to an embodiment of the present application;

FIG. 4 is a schematic diagram illustrating an embodiment of an interface test circuit according to the present disclosure;

FIG. 5 is a schematic diagram of an interface test circuit according to another embodiment of the present application;

fig. 6 is a schematic structural diagram of an interface test circuit according to another embodiment of the present application.

Detailed Description

In order to make the technical problems, technical solutions and advantageous effects to be solved by the present application clearer, the present application is further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the present application and are not intended to limit the present application.

It will be understood that when an element is referred to as being "secured to" or "disposed on" another element, it can be directly on the other element or be indirectly on the other element. When an element is referred to as being "connected to" another element, it can be directly connected to the other element or be indirectly connected to the other element.

It will be understood that the terms "length," "width," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," and the like, refer to an orientation or positional relationship illustrated in the drawings for convenience in describing the present application and to simplify description, and do not indicate or imply that the referenced device or element must have a particular orientation, be constructed and operated in a particular orientation, and thus should not be construed as limiting the present application.

Furthermore, the terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of the present application, "a plurality" means one or more unless specifically limited otherwise.

After the electronic device is produced, various functions of the electronic device need to be tested to ensure that the functional modules can work normally. Taking the energy storage power supply as an example, after the design of each circuit board is completed, each function of the circuit board needs to be tested to ensure that the circuit board has no fault. The traditional test method is to directly adopt a corresponding test instrument to test whether the circuit is normal or not, the actual load working condition cannot be simulated for testing, and the test efficiency is low.

In order to solve the above technical problem, an embodiment of the present invention provides an interface test circuit for testing a USB interface circuit 100, and referring to fig. 1, the interface test circuit includes: a first voltage output circuit 10, a second voltage output circuit 20, a load 30, and a sampling circuit 40.

Specifically, an input end of the first voltage output circuit 10 is configured to receive a first power voltage signal, an output end of the first voltage output circuit 10 is configured to be connected to a first data pin of the USB interface circuit 100, and a control end of the first voltage output circuit 10 is configured to receive a first control signal. The first voltage output circuit 10 is configured to generate and output a first test voltage signal according to the first power voltage signal when the control terminal receives the first control signal. The input terminal of the second voltage output circuit 20 is configured to receive a second power voltage signal, the output terminal of the second voltage output circuit 20 is configured to be connected to the second data pin of the USB interface circuit 100, and the control terminal of the second voltage output circuit 20 is configured to receive a second control signal. The second voltage output circuit 20 is configured to generate and output a second test voltage signal according to the second power voltage signal when the control terminal receives the second control signal. The load 30 is used for connecting with the voltage output pin of the USB interface circuit 100, and the load 30 is used as the load of the USB interface circuit 100. The sampling circuit 40 is connected to the load 30, and the sampling circuit 40 is configured to sample and output an electrical parameter of the load 30.

In this embodiment, a user may determine whether to send the first control signal and the second control signal according to an output state of the to-be-tested USB interface circuit 100, so as to meet testing requirements of different to-be-tested USB interface circuits 100.

In one embodiment, referring to FIG. 3, the first data pin corresponds to the D + pin of the USB interface circuit, and the second data pin corresponds to the D-pin of the USB interface circuit; and a GND pin in the USB interface circuit is grounded, and a VOUT pin in the USB interface circuit is a voltage output pin and is used for outputting the load voltage of the USB interface circuit. In other embodiments, the first data pin may correspond to a D-pin of the USB interface circuit, and the second data pin may correspond to a D + pin of the USB interface circuit.

In the present embodiment, referring to fig. 1, the load 30 is used for connecting to the voltage output pin of the USB interface circuit 100, and the load 30 is used as the load of the USB interface circuit 100. The load 30 can provide the load required by the test, and the first voltage output circuit 10 and the second voltage output circuit 20 can simulate and output the voltage signal generated at the data pin of the USB interface circuit when the load is connected with the USB interface circuit, so that the actual load working condition can be simulated for testing, and the problems that the actual load working condition cannot be simulated for testing and the testing efficiency is low in the conventional testing method are solved.

In the present embodiment, the sampling circuit 40 is connected to the load 30, and the sampling circuit 40 can sample the electrical parameter of the load 30 in real time. Specifically, the sampled electrical parameters include: the input voltage and the input current of the load 30, etc. By comparing the input voltage and the input current of the load 30 with preset reference values, it is possible to detect whether the function of the USB interface circuit to be tested is normal. In this embodiment, the sampling circuit 40 may sample and output the electrical parameter of the load 30 at a certain frequency or timing, and the sampling circuit 40 may be configured to monitor the electrical parameter of the load 30 in real time.

In one embodiment, the first power voltage signal and the second power voltage signal may be the same voltage signal, and both are provided by the same power circuit, for example, both are 3.3V power supply voltage. In other embodiments, the first power supply voltage signal and the second power supply voltage signal may be configured as different voltage signals, provided by different power supply circuits.

The first test voltage signal and the second test voltage signal may be determined according to a voltage required for a data pin of the USB interface circuit. For example, when the USB interface circuit 100 to be tested supports both outputs of 12V and 9V, the first data pin and the second data pin of the USB interface circuit 100 need to have different voltage states corresponding to different output voltages. For example, when the USB interface circuit is to output 12V, the voltage required for the first data pin is 0.6V, and the voltage required for the second data pin is 0.6V, and when the USB interface circuit is to output 9V, the voltage required for the first data pin is 3.3V, and the voltage required for the second data pin is 0.6V. When the voltage required by the first data pin is 3.3V, the first voltage output circuit 10 is not turned on as long as the first data pin is provided with the self-contained 3.3V voltage. In this embodiment, the data pin of the USB interface circuit has a voltage of 3.3V, so both the first test voltage signal and the second test voltage signal can be set to 0.6V.

In an embodiment, the first control signal and the second control signal may be input by a user directly through an input device, such as a keyboard, a touch screen, a mobile terminal, and the like. For example, when the output voltage of the USB interface circuit 100 to be tested is 12V, a user inputs a first control signal and a second control signal to the control end of the first voltage output circuit 10 and the control end of the second voltage output circuit 20 through the input device, so that the first voltage output circuit 10 outputs a first test voltage signal, and the second voltage output circuit 20 outputs a second test voltage signal. When the output voltage of the USB interface circuit 100 to be tested is 9V, the user only inputs the second control signal to the control terminal of the second voltage output circuit 20 through the input device, so that the second voltage output circuit 20 outputs the second test voltage signal to the second data pin of the USB interface circuit 100, and at this time, the first data pin of the USB interface circuit 100 is provided by the voltage of 3.3V provided by the user.

In another embodiment, the first control signal and the second control signal may also be automatically generated by the control circuit according to the output state of the USB interface circuit 100 that needs to be tested currently. When the output voltage of the USB interface circuit 100 to be tested is 12V or 9V, the control circuit may also output at least one of the corresponding first control signal and the second control signal according to the output voltage state of the USB interface circuit 100 to be tested, and output the corresponding control signal to the control end of the corresponding first voltage output circuit 10 and the control end of the corresponding second voltage output circuit 20, so as to control the corresponding circuits to be turned on.

In one embodiment, the interface test circuit further comprises: a control circuit.

The control circuit is connected to the first voltage output circuit 10, the second voltage output circuit and the sampling circuit, respectively, and is configured to output at least one of a first control signal and a second control signal according to the test signal. The control circuit is also used for receiving the electrical parameters output by the sampling circuit, acquiring target reference electrical parameters according to the test signals, and outputting fault signals when the electrical parameters output by the sampling circuit are not matched with the target reference electrical parameters.

In the present embodiment, the test signal is generated according to the output state of the USB interface circuit 100 to be tested. In particular, the user may send the test signal according to the output voltage currently to be tested. For example, when the 12V output of the USB interface circuit 100 needs to be tested is normal, the user may send a test signal for testing the 12V output, and the control circuit outputs a first control signal and a second control signal according to the test signal to control the first voltage output circuit 10 and the second voltage output circuit 20 to be both turned on and correspondingly output a first test voltage signal and a second test voltage signal, such as 0.6V, so that the USB interface circuit 100 outputs a 12V voltage at the voltage output pin after confirming the voltage at the data pin; when the output voltage of the USB interface circuit 100 to be tested is 9V, the user may send a test signal for testing 9V output, the control circuit outputs a second control signal only according to the test signal to control the second voltage output circuit 20 to be turned on, and correspondingly outputs a second test voltage signal, for example, 0.6V, and the first data pin uses a self-contained 3.3V voltage, so that the USB interface circuit 100 outputs a voltage of 9V at the voltage output pin after confirming the voltage of the data pin.

In this embodiment, the control circuit is further connected to the sampling circuit 40, and is configured to receive the electrical parameter output by the sampling circuit 40, obtain a target reference electrical parameter according to the test signal, compare the electrical parameter output by the sampling circuit 40 with the target reference electrical parameter, and output a normal signal when the electrical parameter output by the sampling circuit 40 matches the target reference electrical parameter, which indicates that the function of the USB interface circuit 100 to be tested is normal. When the electrical parameter output by the sampling circuit 40 is not matched with the target reference electrical parameter, which indicates that the USB interface circuit 100 to be tested has a fault, a fault signal is output to remind a user that the USB interface circuit 100 to be tested has a fault. By arranging the control circuit, the application scenes of the interface test circuit are increased, and the test efficiency of the interface test circuit is improved.

In one embodiment, referring to fig. 2, the first voltage output circuit 10 includes: a first voltage division unit 11, a first isolation unit 12, and a first switching unit 14.

Specifically, the first voltage dividing unit 11 is connected to an input end of the first voltage output circuit 10, and the first voltage dividing unit 11 is configured to receive a first power voltage signal, and divide the first power voltage signal to generate a first divided voltage signal. The first isolation unit 12 is connected to the first voltage division unit 11, and the first isolation unit 12 is configured to isolate the first voltage division signal and then output the isolated first voltage division signal. The first switch unit 14 is connected to the first isolation unit 12, and the first switch unit 14 is configured to receive a first control signal, switch from an open state to a closed state according to the first control signal, and output a first test voltage signal to a first data pin of the USB interface circuit 100 according to the isolated first voltage division signal.

In this embodiment, the first switch unit 14 is in the off state when not receiving the first control signal, and the first switch unit 14 is switched from the off state to the on state only after receiving the first control signal, and then starts to operate, and by setting the first switch unit 14, the operating state of the first voltage output circuit 10 can be controlled, so that the first voltage output circuit 10 is in the on state only when operating, and then outputs the first test voltage signal, and is in the off state when not operating, and energy loss is saved.

In one embodiment, referring to fig. 2 and 4, the first voltage output circuit 10 further includes a first filtering unit 13. The first filtering unit 13 is disposed between the first isolating unit 12 and the first switching unit 14, and the first filtering unit 13 is configured to perform filtering processing on the isolated first partial pressure signal and output the filtered first partial pressure signal to the first switching unit 14. Wherein, the first filtering unit 13 includes: a fifth resistor R5 and a third capacitor C3, wherein a first end of the fifth resistor R5 is connected to the first isolation unit 12, a second end of the fifth resistor R5 and a first end of the third capacitor C3 are commonly connected to the first switch unit 14, and a second end of the third capacitor C3 is grounded.

In this embodiment, the first filtering unit 13 is provided to perform filtering processing on the isolated first divided voltage signal, and output the signal to the first switching unit 14. The fifth resistor R5 is used for carrying out current limiting processing on the first voltage division signal, and the third capacitor C3 is used for carrying out filtering processing on the isolated first voltage division signal and filtering noise in the first voltage division signal.

In one embodiment, by providing the fifth resistor R5 and the third capacitor C3, the first divided-voltage signal may be subjected to a filtering process, which serves to smooth a ripple voltage of the first divided-voltage signal.

In one embodiment, as shown with reference to fig. 4, the first voltage division unit 11 includes: the circuit comprises a first resistor R1, a second resistor R2, a third resistor R3 and a first capacitor C1.

Specifically, a first end of the first resistor R1 is connected to an input end of the first voltage output circuit 10, a second end of the first resistor R1 is connected to the ground after being connected to the second resistor R2 in series, a second end of the first resistor R1 is connected to the first isolation unit 12 after being connected to the third resistor R3 in series, and the first capacitor C1 is connected to the second resistor R2 in parallel. In the present embodiment, the input terminal J1 of the first voltage output circuit 10 is used for receiving a first power voltage signal, for example, a 3.3V voltage. The first resistor R1 and the second resistor R2 are connected in series and used for carrying out voltage division processing on a first power supply voltage signal, the size of the first voltage division signal output by the first voltage division unit 11 can be controlled by setting the sizes of the first resistor R1 and the second resistor R2, the third resistor R3 is used for carrying out current limiting processing on the first voltage division signal, and the first capacitor C1 is used for carrying out filtering processing on the first voltage division signal.

In one embodiment, referring to fig. 4, the first isolation unit 12 includes a first voltage follower U1, a fourth resistor R4, and a second capacitor C2.

Specifically, a positive input end of the first voltage follower U1 is connected to the first voltage dividing unit 11, a negative input end of the first voltage follower U1 is connected to a fourth resistor R4 in series and then connected to an output end of the first voltage follower U1, a ground end of the first voltage follower U1 is grounded, a power supply end of the first voltage follower U1 is used for receiving a first power supply voltage signal, and the power supply end of the first voltage follower U1 is further connected to a second capacitor C2 in series and then grounded. In this embodiment, the first power voltage signal is 3.3V, and the first voltage follower U1 is powered by the first power voltage signal without using the previous power supply of the first voltage dividing unit 11, so the first voltage follower U1 can effectively isolate the first voltage dividing unit 11 and the first filtering unit 13, and eliminate the mutual influence therebetween.

In one embodiment, as shown with reference to fig. 4, the first switching unit 14 includes: the circuit comprises a sixth resistor R6, a seventh resistor R7, a first switch tube Q1 and a second switch tube Q2.

Specifically, a first end of the first switch tube Q1 is connected to the first filtering unit 13, a control end of the first switch tube Q1 is connected to a control end of the first voltage output circuit 10, the control end of the first switch tube Q1 is further connected in series to the sixth resistor R6 and then grounded, a second end of the first switch tube Q1 is connected to a second end of the second switch tube Q2, the second end of the first switch tube Q1 is further connected in series to the seventh resistor R7 and then grounded, a control end of the second switch tube Q2 is connected to a control end of the first voltage output circuit 10, and a first end of the second switch tube Q2 is connected to the first data pin of the USB interface circuit 100.

In the present embodiment, the control terminal J2 of the first voltage output circuit 10 is used for receiving the first control signal. The first switch tube Q1 and the second switch tube Q2 are in a closed state after receiving the first control signal at the control end, and the first test voltage signal flows through the first switch tube Q1 and the second switch tube and then outputs the first test voltage signal to the first data pin of the USB interface circuit 100. Meanwhile, the first switch tube Q1 and the second switch tube Q2 are arranged to prevent the voltage of the first data pin from flowing backward to the output end of the first voltage follower U1.

In one embodiment, when the first switch Q1 is an NMOS transistor, a gate of the NMOS transistor serves as a control terminal of the first switch Q1, a drain of the NMOS transistor serves as a first terminal of the first switch Q1, and a source of the NMOS transistor serves as a second terminal of the first switch Q1. When the second switch transistor Q2 is an NMOS transistor, the gate of the NMOS transistor serves as the control terminal of the second switch transistor Q2, the drain of the NMOS transistor serves as the first terminal of the second switch transistor Q2, and the source of the NMOS transistor serves as the second terminal of the second switch transistor Q2.

In one embodiment, as shown with reference to fig. 5, the second voltage output circuit 20 includes: a second voltage division unit 21, a second filtering unit 23, a second isolation unit 22, and a second switching unit 24.

Specifically, the second voltage dividing unit 21 is configured to receive a second power voltage signal, and perform voltage division processing on the second power voltage signal to generate a second voltage dividing signal. The second filtering unit 23 is configured to receive the second divided voltage signal, and the second filtering unit 23 performs filtering processing on the second divided voltage signal to generate a second test voltage signal. The second isolation unit 22 is disposed between the second voltage division unit 21 and the second filtering unit 23, and the second isolation unit 22 is configured to isolate the second voltage division unit 21 from the second filtering unit 23. The second switch unit 24 is connected to the second filtering unit 23, and the second switch unit 24 is configured to receive the second control signal, switch from the open state to the closed state according to the second control signal, and output a second test voltage signal to the second data pin of the USB interface circuit 100.

In the present embodiment, the structure of the second voltage output circuit 20 is the same as that of the first voltage output circuit 10. That is, when the control terminal of the second voltage output circuit 20 receives the second control signal, the second voltage dividing unit 21 divides the second power voltage signal to generate a second divided voltage signal. The second isolation unit 22 is connected to the second voltage dividing unit 22, and the second isolation unit 22 is configured to isolate and output the second voltage dividing signal. The second filtering unit 23 performs filtering processing on the isolated second divided voltage signal, filters a noise signal in the second divided voltage signal, and generates a second test voltage signal. The second switch unit 24 switches from the open state to the closed state after receiving the first control signal, and outputs a second test voltage signal to the second data pin of the USB interface circuit 100. It can be understood that the second switch unit 24 is in the off state when not receiving the second control signal, the second switch unit 24 is switched to the on state to start working only when receiving the second control signal, and the second switch unit 24 is arranged to control the working state of the second voltage output circuit 20, so that the second voltage output circuit 20 is in the on state only when working, and is in the off state when not working, thereby saving energy loss.

In one embodiment, as shown with reference to fig. 6, the interface test circuit further includes: a first stabilizing circuit 50 and a second stabilizing circuit 60.

Specifically, the first voltage stabilizing circuit 50 is connected to an output end of the first voltage output circuit 10, and the first voltage stabilizing circuit 50 is configured to perform voltage stabilization processing on the first test voltage signal. The second voltage stabilizing circuit 60 is connected to the output terminal of the first voltage output circuit 20, and the second voltage stabilizing circuit 60 is configured to perform voltage stabilization processing on the second test voltage signal. In this embodiment, by providing the first voltage stabilizing circuit 50 and the second voltage stabilizing circuit 60, the first test voltage signal and the second test voltage signal can be subjected to voltage stabilization, so that the stability and the test efficiency of the interface test circuit are improved.

In one embodiment, as shown with reference to fig. 4, the first regulator circuit 50 includes a first regulator tube D1. A first end of the first voltage regulator tube D1 is connected to the first data pin of the USB interface circuit 100, and a second end of the first voltage regulator tube D1 is grounded. A first voltage regulator tube D1 is provided for performing voltage stabilization processing on the first test voltage signal output by the first voltage output circuit 10.

In one embodiment, the output voltages supported by the USB interface circuit 100 to be tested are 12V and 9V, respectively. When the voltage output by the USB interface circuit 100 to be tested is 12V, the voltage required by the corresponding first data pin is 0.6V, the voltage required by the second data pin is 0.6V, and when the voltage output by the USB interface circuit 100 to be tested is 9V, the voltage required by the corresponding first data pin is 3.3V, and the voltage required by the second data pin is 0.6V.

In an embodiment, referring to fig. 4, when it is required to test whether the 12V voltage output of the USB interface circuit 100 is normal, a user outputs a first control signal to the control terminal of the first voltage output circuit 10 and outputs a second control signal to the control terminal of the second voltage output circuit 20 according to a requirement, and at this time, the first switch Q1 and the second switch Q2 are both in a conducting state, and output a 0.6V voltage to the first data pin of the USB interface circuit 100. For the same reason, the output terminal of the second voltage output circuit 20 also outputs a voltage of 0.6 to the second data pin of the USB interface circuit 100. The USB interface circuit 100 outputs 12V according to the voltage at the first data pin and the second data pin.

In one embodiment, referring to fig. 4, when it is required to test whether the voltage output of the USB interface circuit 100 is normal or not, the user only needs to output the second control signal to the control terminal of the second voltage output circuit 20, and at this time, the second switch unit 24 outputs the voltage of 0.6V to the second data pin of the USB interface circuit 100. At this time, the first control signal is not output to the control terminal of the first voltage output circuit 10, the first voltage output circuit 10 is in the closed state, and the first data pin of the USB interface circuit 100 is provided by the 3.3V voltage provided by itself. The USB interface circuit 100 outputs 9V according to the voltage at the first data pin.

The embodiment of the present application further provides a testing apparatus, including the USB connector, the USB connector is used for being connected with the USB interface circuit 100 to be tested, and further includes: at least one interface test circuit as claimed in any one of the preceding claims; the USB connector has connection pins corresponding to the first data pin, the second data pin, and the voltage output pin of the USB interface circuit 100, so that the interface test circuit is connected to the USB interface circuit 100 to be tested through the USB connector.

In this embodiment, when the first data pin and the second data pin of the USB interface circuit 100 to be tested are connected to the USB interface, the first control signal and/or the second control signal controls the corresponding first voltage output circuit 10 and/or the second voltage output circuit 20 to output the corresponding first test voltage signal and/or the second test voltage signal, the load 30 serves as a load of the USB interface circuit 100, the sampling circuit 40 samples and outputs an electrical parameter on the load 30, the control circuit receives the electrical parameter output by the sampling circuit 40, obtains a target reference electrical parameter according to the test signal, and outputs a fault signal when the electrical parameter output by the resampling circuit 40 is not matched with the target reference electrical parameter.

In an embodiment, the testing platform may be provided with a plurality of USB connectors of the same type, so that a plurality of USB interface circuits 100 to be tested may be plugged at one time, thereby improving the testing efficiency. The test board can be provided with a plurality of different types of USB connectors so as to meet the test requirements of different USB interface circuits 100 to be tested. The test box is provided with a corresponding load 30 to simulate the load environment required for testing.

In the above embodiments, the descriptions of the respective embodiments have respective emphasis, and reference may be made to the related descriptions of other embodiments for parts that are not described or illustrated in a certain embodiment.

In the embodiments provided in the present application, it should be understood that the disclosed apparatus/terminal device and method may be implemented in other ways. For example, the above-described embodiments of apparatus/terminal device are merely illustrative, and for example, a module or a circuit may be divided into only one logic function, and may be implemented in other ways, for example, a plurality of circuits or components may be combined or integrated into another system, or some features may be omitted or not executed. In addition, the data shown or discussed as coupled or directly coupled or communicatively connected to each other may be in electrical, mechanical or other form through some interface, device or circuit, indirectly coupled or communicatively connected.

Circuits described as separate components may or may not be physically separate, and components displaying data as circuits may or may not be physical circuits, may be located in one place, or may be distributed over a plurality of network circuits. Part or all of the circuits can be selected according to actual needs to achieve the purpose of the scheme of the embodiment.

The above embodiments are only used to illustrate the technical solutions of the present application, and not to limit the same; although the present application has been described in detail with reference to the foregoing embodiments, it should be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; such modifications and substitutions do not substantially depart from the spirit and scope of the embodiments of the present application and are intended to be included within the scope of the present application.

Claims

1. An interface test circuit is used for testing a USB interface circuit, and the USB interface circuit comprises a first data pin, a second data pin and a voltage output pin; wherein the interface test circuit comprises: the circuit comprises a first voltage output circuit, a second voltage output circuit, a load and a sampling circuit;

the input end of the first voltage output circuit is used for receiving a first power supply voltage signal, the output end of the first voltage output circuit is used for being connected with a first data pin of the USB interface circuit, and the first voltage output circuit is used for generating and outputting a first test voltage signal according to the first power supply voltage signal when the control end receives a first control signal;

2. The interface test circuit of claim 1, wherein the first voltage output circuit comprises:

3. The interface test circuit of claim 2, wherein the first voltage output circuit further comprises: and the first filtering unit is arranged between the first isolation unit and the first switch unit and is used for filtering the isolated first partial pressure signal.

4. The interface test circuit of claim 2, wherein the first voltage division unit comprises: the circuit comprises a first resistor, a second resistor, a third resistor and a first capacitor; wherein, the first and the second end of the pipe are connected with each other,

5. The interface test circuit of claim 2, wherein the first isolation unit comprises a first voltage follower, a fourth resistor, and a second capacitor; wherein the content of the first and second substances,

6. The interface test circuit of claim 3, wherein the first switching unit comprises: the first switch tube is connected with the first resistor; wherein the content of the first and second substances,

7. The interface test circuit of claim 1, wherein the interface test circuit further comprises:

8. The interface test circuit of claim 1, wherein the interface test circuit further comprises:

and the second voltage stabilizing circuit is connected with the output end of the second voltage output circuit and is used for carrying out voltage stabilizing processing on the second test voltage signal.

9. The utility model provides a testing arrangement, includes the USB connector, the USB connector is used for with the USB interface circuit connection that awaits measuring, its characterized in that still includes: at least one interface test circuit according to any one of claims 1-8; the USB connector is provided with connecting pins corresponding to the first data pin, the second data pin and the voltage output pin of the USB interface circuit, so that the interface test circuit is connected with the USB interface circuit to be tested through the USB connector.

10. The testing device of claim 9, further comprising: the testing device comprises a testing box and a testing platform, wherein the testing platform is fixed above the testing box, an interface testing circuit is arranged in the testing box, and a USB (universal serial bus) connector is arranged on the testing platform.