CN218181006U - Novel fault recording range finding device - Google Patents

Novel fault recording range finding device Download PDF

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Publication number
CN218181006U
CN218181006U CN202222250015.6U CN202222250015U CN218181006U CN 218181006 U CN218181006 U CN 218181006U CN 202222250015 U CN202222250015 U CN 202222250015U CN 218181006 U CN218181006 U CN 218181006U
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current transformer
secondary current
comparator
protection secondary
limit
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CN202222250015.6U
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赵通汉
苏玉忠
尹宏伟
柳皓
卢刚刚
吴博
付强
赵江伟
陈远
马强
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Guyuan Power Supply Co Of State Grid Ningxia Electric Power Co ltd
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Guyuan Power Supply Co Of State Grid Ningxia Electric Power Co ltd
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Abstract

A novel fault recording and ranging device comprises: the device comprises a protection secondary CT, a metering secondary CT, an analog switch, an analog-to-digital converter, a microcontroller, an out-of-limit comparator, a logic trigger circuit and a timer; the protection secondary CT and the metering secondary CT are respectively connected with the analog switch, and the analog switch is connected with the microcontroller through the analog-to-digital converter; the out-of-limit comparator is respectively connected with the protection secondary CT and the logic trigger circuit; the logic trigger circuit is connected with the timer, and the timer is connected with the analog switch; the out-of-limit comparator detects whether the voltage of the protection secondary CT is out of limit, and switches one of the protection secondary CT and the metering secondary CT to be conducted with the analog-to-digital converter through the analog switch when the voltage is out of limit, and then the protection secondary CT and the metering secondary CT are sent to the microcontroller. The device can realize the switching between the protection secondary CT and the metering secondary CT, so that the fault distance measurement is more accurate.

Description

Novel fault recording range finding device
Technical Field
The utility model belongs to the technical field of electric power, it is special, relate to a novel trouble record ripples range finding device.
Background
The current magnitude is very different in the lines of electricity generation, transformation, transmission, distribution and utilization, from several amperes to tens of thousands of amperes. For the convenience of measurement, protection and control, conversion to a more uniform current is required, and in addition, the voltage on the line is generally higher, which is very dangerous if the direct measurement is carried out. The current transformer plays the roles of current transformation and electric isolation. The current transformer is an instrument for measuring by converting a large primary-side current into a small secondary-side current according to the principle of electromagnetic induction. The current transformer for protection and measurement utilizes the principle to monitor the current transformation of the circuit. The current transformer for metering has high measurement precision but small measurement range, and is generally used for electric quantity metering. The current transformer for protection has low measurement precision but wide measurement range, and provides power grid fault current information for devices such as relay protection and the like to perform fault recording and ranging calculation in a power grid fault state. But this also results in large ranging errors and inaccurate fault location.
SUMMERY OF THE UTILITY MODEL
The utility model provides a novel trouble record ripples range unit to solve foretell problem.
The utility model provides a pair of novel trouble record ripples range unit, it includes: the device comprises a protection secondary current transformer, a metering secondary current transformer, an analog switch, an analog-to-digital converter, a microcontroller, an out-of-limit comparator, a logic trigger circuit and a timer;
the protection secondary current transformer and the metering secondary current transformer are respectively connected with the analog switch, and the analog switch is connected with the microcontroller through the analog-to-digital converter;
the out-of-limit comparator is respectively connected with the protection secondary current transformer and the logic trigger circuit; the logic trigger circuit is connected with the timer, and the timer is connected with the analog switch;
the off-limit comparator detects whether the voltage of the protection secondary current transformer is off-limit or not, controls the logic trigger circuit to generate a trigger pulse signal when the voltage is off-limit, and the timer controls the analog switch to switch the protection secondary current transformer and the metering secondary current transformer to be selected and conducted with the analog-to-digital converter according to the trigger pulse signal to generate a timing control signal, so that the analog-to-digital converter converts the signal of the protection secondary current transformer or the metering secondary current transformer into a digital signal and sends the digital signal to the microcontroller.
Optionally, the protection secondary current transformer comprises an a-phase protection secondary current transformer, a B-phase protection secondary current transformer and a C-phase protection secondary current transformer;
the over-limit comparator comprises a plurality of comparator elements;
the output end of the A-phase protection secondary current transformer is connected with the negative input end of a first comparator element in the plurality of comparator elements and is connected with the positive input end of a second comparator element in the plurality of comparator elements; the positive input end of the first comparator element and the negative input end of the second comparator element are respectively connected with positive and negative reference voltages, and the positive and negative reference voltages are out-of-limit voltages; the first comparator element and the second comparator element are used for outputting a high level when the output voltage of the A-phase protection secondary current transformer does not exceed positive and negative out-of-limit voltages and outputting a low level when the output voltage exceeds the positive and negative out-of-limit voltages;
the B-phase protection secondary current transformer and the C-phase protection secondary current transformer are respectively connected with different comparator elements in the same way as the A-phase protection secondary current transformer.
Optionally, the comparator element is LM211.
Optionally, the logic trigger circuit includes a logic judgment module and a trigger;
the logic judgment module comprises a plurality of NAND gate elements and OR gate elements;
the output ends of two comparator elements corresponding to each of the A-phase protection secondary current transformer, the B-phase protection secondary current transformer and the C-phase protection secondary current transformer are respectively connected with two input ends of a NAND gate element, the output ends of the two NAND gate elements are connected with two input ends of an OR gate element, and the output ends of the two OR gate elements are connected with the input end of another OR gate, so that when any comparator element outputs a low level, the logic judgment module outputs a high level;
the logic judgment module is connected with the trigger and generates a falling edge pulse with a set width as a trigger signal when the logic judgment module outputs a high level; and when the logic judgment module outputs a low level, the trigger outputs a high level.
Optionally, the nand gate element is 74LS00, and the or gate element is 74LS32.
Optionally, the timer is NE555D, and an input end of the timer is connected to an output end of the logic trigger circuit, and is configured to generate a rising edge signal with a set width as the timing control signal when the logic trigger circuit generates the trigger signal.
Optionally, the current transformer further comprises a zero sequence protection secondary current transformer, wherein an output end of the zero sequence protection secondary current transformer is connected with a negative input end of one of the comparator elements, and is connected with a positive input end of another of the comparator elements; the positive input end of one comparator element and the negative input end of the other comparator element are respectively connected with positive and negative reference voltages, and the positive and negative reference voltages are out-of-limit voltages; the comparator element and the other comparator element are used for outputting a high level when the output voltage of the zero sequence protection secondary current transformer does not exceed positive and negative out-of-limit voltages and outputting a low level when the output voltage exceeds the positive and negative out-of-limit voltages.
Optionally, the analog switch is an ADG1334, and is configured to conduct the metering secondary current transformer and the analog-to-digital converter when the timer generates a timing control signal, and switch to conduct the protection secondary current transformer and the analog-to-digital converter when the timing control signal disappears.
Optionally, the system further comprises a display device, and the display device is connected with the microcontroller.
Optionally, the system further comprises a communication device, and the communication device is connected with the microcontroller.
The device of this embodiment is monitored by protection secondary CT under the normality, when transmission line broke down unusually, utilizes the linearity that measures CT overstepped journey within several milliseconds, switches over to the measurement secondary CT monitoring within the timing time for the calculation of trouble record ripples range finding, makes to reduce the range error, improves the fault location degree of accuracy.
Drawings
Fig. 1 is a schematic diagram of an embodiment of the novel fault recording and ranging device of the present invention;
fig. 2 is an example of a specific circuit implementation of functional blocks in the apparatus of fig. 1.
Fig. 3 is a reference circuit diagram for use in the circuit of fig. 2.
Detailed Description
The utility model provides a novel trouble record ripples range unit, the device contain measurement secondary Current Transformer (CT) and protection secondary Current Transformer (CT), in this embodiment, set up the two in the lump to be connected with controller (for example microcontroller) through the selector switch alternative, collect the signal of protection secondary CT through microcontroller under the conventional monitoring condition, under the circuit abnormal conditions, the selector switch selection will measure secondary CT and be connected predetermined time with microcontroller, thereby carry out the accurate calculation of trouble range finding. The following detailed description is made with reference to the accompanying drawings.
As shown in fig. 1, it is a schematic diagram of an embodiment of the novel fault recording and ranging apparatus of the present invention. The novel fault recording and ranging device in the embodiment comprises a protection secondary CT100, a metering secondary CT200, an analog switch 120, an analog-to-digital converter (a/D conversion) 140, a microcontroller 160, an out-of-limit comparator 220, a logic trigger circuit 240 and a timer 260; a display device 280 and a communication device 180 may also be included.
The protection secondary CT100 and the metering secondary CT200 are respectively connected to the analog switch 120, and the analog switch 120 is connected to the microcontroller 160 through the analog-to-digital converter 140.
The out-of-limit comparator 220 is respectively connected with the protection secondary CT100 and the logic trigger circuit 240; the logic trigger circuit 240 is further connected to the timer 260, and the timer 260 is connected to the analog switch 120.
During operation, when there is no abnormal condition of the power line, the protection secondary CT100 is communicated with the analog-to-digital converter 140 through the analog switch 120, and further connected to the microcontroller 160, and the monitoring signal of the protection secondary CT200 is collected through the microcontroller 160.
The protection secondary CT100 is further communicated with the out-of-limit comparator 220, the signal acquired by the protection secondary CT is input to the out-of-limit comparator 220, the out-of-limit comparator 220 detects whether the signal exceeds a set threshold value, i.e. whether the signal is out-of-limit, and if the signal is not out-of-limit, the trigger signal is not sent to the logic trigger circuit 240; upon crossing the limit, the off-limit comparator 220 sends an off-limit signal to the logic flip-flop circuit 240. The logic trigger circuit 240 sends a trigger pulse signal according to the out-of-limit signal, and inputs the trigger pulse signal to the timer 260. The timer 260 outputs a timing control signal according to the trigger pulse signal, the analog switch 120 starts the conductive paths of the metering secondary CT200 and the analog-to-digital converter 140 according to the received timing control signal, that is, the two are communicated, and the signal collected by the metering secondary CT can be transmitted to the microcontroller 160. After the fixed time set by the timing control signal is reached, the connection between the metering secondary CT200 and the analog-to-digital converter 140 is disconnected, and the connection between the protection secondary CT100 and the analog-to-digital converter 140 is switched to be in a normal state.
The device of the embodiment is monitored by the protection secondary CT under the normal condition, and is switched to the measurement of the measurement secondary CT when the power transmission line is abnormal, so that the power consumption of the power transmission line in the abnormal time period can be obtained. So that the electric quantity can be measured more accurately.
The specific circuit implementation of some functional blocks in the apparatus with the functional schematic diagram in the above embodiment is described below with reference to fig. 2.
As shown in FIG. 2, the specific circuit implementation and connection relationship of the out-of-limit comparator 220, the logic trigger circuit 240, the timer 260 and the analog switch are shown in the figure.
Wherein the off-limit comparator 220 comprises a plurality of comparator elements. The comparator element in this embodiment may be LM211.
The protection secondary CT comprises an A-phase protection secondary CT, a B-phase protection secondary CT and a C-phase protection secondary CT. The output of the protective secondary CT of each phase is connected to both comparator elements simultaneously. Taking the a-phase protection secondary CT as an example, an output terminal of the a-phase protection secondary CT is connected to a negative input terminal of a first comparator element 220a of the plurality of comparator elements, and is connected to a positive input terminal of a second comparator element 220b of the plurality of comparator elements; the positive input end of the first comparator element 220a and the negative input end of the second comparator element 220b are respectively connected with positive and negative reference voltages, and the positive and negative reference voltages are out-of-limit voltages; in this embodiment, the positive and negative out-of-limit voltages are respectively positive and negative 0.5v.
The reference voltage may be provided by a reference circuit as shown in fig. 3, the reference voltage is calculated as follows, uref + = U1 × R6/(R5 + R6), uref- = U2 × R8/(R7 + R8), and R5, R6, R7, and R8 are resistors, and by changing the resistance values of R6 and R8, the amplitude of the reference voltage may be adjusted, thereby setting the comparison start value of the over-limit comparator.
With continued reference to fig. 2, the first comparator element 220a and the second comparator element 220b are configured to output a high level when the a-phase protection secondary CT output voltage Ua does not exceed the positive and negative overrun voltages, and output a low level when the voltage Ua exceeds the positive and negative overrun voltages. Specifically, the method comprises the following steps:
when Uref- < Ua < Uref +, ua is not out of limit, and U1 and U2 output high level;
when Ua is more than Uref +, ua is out of limit, U1 outputs low level, and U2 outputs high level;
when Ua is less than Uref-, ua is out of limit negatively, U1 outputs high level, and U2 outputs low level; u1 and U2 are comparator chips LM211.
The phase B protection secondary CT and the phase C protection secondary CT are respectively connected to different comparator elements in the plurality of comparator elements in the same manner as the phase a protection secondary CT, and can implement the same comparison logic as the phase a protection secondary CT, which is not described herein.
In this embodiment, a zero sequence protection secondary CT may be further included, which is respectively connected to different comparator elements in the plurality of comparator elements in the same manner as the a-phase protection secondary CT, and can implement the same comparison logic as the a-phase protection secondary CT, which is not described herein.
Referring to fig. 2, the logic flip-flop circuit includes a logic determination module composed of a plurality of nand gate devices and or gate devices, and a flip-flop. Wherein the nand gate element may be 74LS00, or the or gate element may be 74LS32. The output ends of two comparator elements corresponding to each of the A-phase protection secondary CT, the B-phase protection secondary CT and the C-phase protection secondary CT are respectively connected with two input ends of a NAND gate element, the output ends of the two NAND gate elements are connected with two input ends of an OR gate element, and the output ends of the two OR gate elements are connected with the input end of another OR gate, so that when any comparator element outputs a low level, the logic judgment module outputs a high level.
For example, when the output levels of U1 and U2 are not exceeded by the U5 NAND gate chip 74LS00 and Ua, U5 outputs low level, and when Ua is over-limit positive or Ua is over-limit negative, U5 outputs high level; the outputs of the comparators corresponding to the phase B, the phase C and the zero sequence are connected to a nand gate chip 74LS00 in the same manner.
The U5 output level is through U6 or gate chip 74LS32, the A phase, B phase, C phase, zero sequence protection secondary CT are all not out of limit, U6 outputs low level, any phase is out of limit, U6 outputs high level.
The output of U6 is connected to a flip-flop, such as an RS flip-flop. Through the trigger, the output level of U6 passes through the U7 NAND gate chip 74LS00; when the Ua is not out of limit, the U7 outputs high level, and when the Ua is out of limit, the U7 generates and outputs a falling edge pulse with the width of 10-28ns, so that the Ua is ensured to trigger the timer only once after one rising edge of the U6 is triggered once. The width of the falling edge can be adjusted through specific components and connection relations in the trigger.
The timer 260 may be NE555D, and has an input connected to the output of the logic trigger circuit 240 and an output connected to the analog switch 120. For generating a rising edge signal of a set width as a timing control signal when the logic flip-flop circuit 240 generates a trigger signal.
The analog switch 120 is an ADG1334, and is configured to conduct the metering secondary CT200 and the analog-to-digital converter 140 when the timer 260 generates a timing control signal, and conduct the protection secondary CT100 and the analog-to-digital converter 140 when the timing control signal disappears. Specifically, the U7 output level enters the U9 timer chip NE555D, and the timing time T =1.1 × r9 × c1=1.1 × 27.3 × 10^3 × 0.1 × 10^ -6 ^3 × 10-3 seconds =3ms. Wherein, the timing time can be adjusted by changing the values of R9 and C1. When Ua is not out of limit, U9 outputs low level, and when Ua is out of limit, U9 outputs high level of 3ms. The output level of the U9 enters the U8 analog switch chip ADG1334 for channel switching. When the Ua is not out of limit, the protection secondary CT is connected to the analog-to-digital converter for sampling calculation, and when the Ua is out of limit, the metering secondary CT is connected to the analog-to-digital converter for 3ms for sampling calculation.
In addition, the device of this embodiment further includes a display device 280 and a communication device 180, wherein the display device 280 is connected to the microcontroller and is configured to display the result collected by the microcontroller, and the communication device 180 is connected to the microcontroller and is configured to communicate the microcontroller with other devices.
Although the present invention has been described with reference to the preferred embodiments, it is not intended to be limited thereto, and those skilled in the art can make modifications and variations without departing from the spirit and scope of the present invention.

Claims (10)

1. The utility model provides a novel trouble record ripples range unit which characterized in that includes: the device comprises a protection secondary current transformer, a metering secondary current transformer, an analog switch, an analog-to-digital converter, a microcontroller, an out-of-limit comparator, a logic trigger circuit and a timer;
the protection secondary current transformer and the metering secondary current transformer are respectively connected with the analog switch, and the analog switch is connected with the microcontroller through the analog-to-digital converter;
the out-of-limit comparator is respectively connected with the protection secondary current transformer and the logic trigger circuit; the logic trigger circuit is connected with the timer, and the timer is connected with the analog switch;
the off-limit comparator detects whether the voltage of the protection secondary current transformer is off-limit or not, controls the logic trigger circuit to generate a trigger pulse signal when the voltage is off-limit, and the timer controls the analog switch to switch the protection secondary current transformer and the metering secondary current transformer to be selected and conducted with the analog-to-digital converter according to the trigger pulse signal to generate a timing control signal, so that the analog-to-digital converter converts the signal of the protection secondary current transformer or the metering secondary current transformer into a digital signal and sends the digital signal to the microcontroller.
2. The novel fault recording and ranging device according to claim 1, wherein the protection secondary current transformers comprise an A-phase protection secondary current transformer, a B-phase protection secondary current transformer and a C-phase protection secondary current transformer;
the over-limit comparator comprises a plurality of comparator elements;
the output end of the A-phase protection secondary current transformer is connected with the negative input end of a first comparator element in the plurality of comparator elements and is connected with the positive input end of a second comparator element in the plurality of comparator elements; the positive input end of the first comparator element and the negative input end of the second comparator element are respectively connected with positive and negative reference voltages, and the positive and negative reference voltages are out-of-limit voltages; the first comparator element and the second comparator element are used for outputting a high level when the output voltage of the A-phase protection secondary current transformer does not exceed positive and negative out-of-limit voltages and outputting a low level when the output voltage exceeds the positive and negative out-of-limit voltages;
and the B-phase protection secondary current transformer and the C-phase protection secondary current transformer are respectively connected with different comparator elements in the same way as the A-phase protection secondary current transformer.
3. The fault recording distance measuring device of claim 2, wherein said comparator element is LM211.
4. The novel fault recording and ranging device according to claim 2 or 3, wherein the logic trigger circuit comprises a logic judgment module and a trigger;
the logic judgment module comprises a plurality of NAND gate elements and OR gate elements;
the output ends of two comparator elements corresponding to each of the A-phase protection secondary current transformer, the B-phase protection secondary current transformer and the C-phase protection secondary current transformer are respectively connected with two input ends of an NAND gate element, the output ends of the two NAND gate elements are connected with two input ends of an OR gate element, and the output ends of the two OR gate elements are connected with the input end of the other OR gate element, so that when any comparator element outputs a low level, the logic judgment module outputs a high level;
the logic judgment module is connected with the trigger and generates a falling edge pulse with a set width as a trigger signal when the logic judgment module outputs a high level; and when the logic judgment module outputs a low level, the trigger outputs a high level.
5. The novel fault recording and ranging device as claimed in claim 4, wherein the nand gate element is 74LS00 and the or gate element is 74LS32.
6. The novel fault recording and ranging device according to any one of claims 1 to 5, wherein: the timer is NE555D, the input end of the timer is connected with the output end of the logic trigger circuit, and the timer is used for generating a rising edge signal with a set width as a timing control signal when the logic trigger circuit generates a trigger signal.
7. The fault recording and ranging apparatus of claim 1, further comprising a zero sequence protection secondary current transformer, wherein an output of the zero sequence protection secondary current transformer is connected to a negative input of one of the plurality of comparator elements and to a positive input of another of the plurality of comparator elements; the positive input end of one comparator element and the negative input end of the other comparator element are respectively connected with positive and negative reference voltages, and the positive and negative reference voltages are out-of-limit voltages; the comparator element and the other comparator element are used for outputting a high level when the output voltage of the zero sequence protection secondary current transformer does not exceed positive and negative out-of-limit voltages and outputting a low level when the output voltage exceeds the positive and negative out-of-limit voltages.
8. The novel fault recording and ranging device according to claim 1, wherein the analog switch is an ADG1334, and is configured to conduct the metering secondary current transformer and the analog-to-digital converter when the timer generates a timing control signal, and to switch to conduct the protection secondary current transformer and the analog-to-digital converter when the timing control signal disappears.
9. The fault recording distance measuring device of claim 1, further comprising a display device, wherein the display device is connected to the microcontroller.
10. The fault recording distance measuring device of claim 1, further comprising a communication device, wherein the communication device is connected to the microcontroller.
CN202222250015.6U 2022-08-25 2022-08-25 Novel fault recording range finding device Active CN218181006U (en)

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CN202222250015.6U CN218181006U (en) 2022-08-25 2022-08-25 Novel fault recording range finding device

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Application Number Priority Date Filing Date Title
CN202222250015.6U CN218181006U (en) 2022-08-25 2022-08-25 Novel fault recording range finding device

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CN218181006U true CN218181006U (en) 2022-12-30

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