CN218180961U - Voltage signal frock detection circuitry - Google Patents
Voltage signal frock detection circuitry Download PDFInfo
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- CN218180961U CN218180961U CN202222508645.9U CN202222508645U CN218180961U CN 218180961 U CN218180961 U CN 218180961U CN 202222508645 U CN202222508645 U CN 202222508645U CN 218180961 U CN218180961 U CN 218180961U
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Abstract
The utility model belongs to the technical field of the frock detects, a voltage signal frock detection circuit is disclosed, through setting up trouble indicating circuit, switch circuit and a plurality of signal detection circuit, every signal detection circuit all parallel connection has logic circuit, a plurality of logic circuit parallel connection are in switch circuit's one end, switch circuit's the other end is connected in trouble indicating circuit, when any signal circuit's detected signal is unusual, switch circuit can switch on and make the pilot lamp in the trouble indicating circuit luminous, it has unusually to show output voltage signal, the frock detects not to pass through, the pilot lamp does not give out light only when all detected signals are all unusual, it is normal to show all output voltage signal, the frock detects to pass through; therefore, the tool detection can be realized through the circuit design of pure hardware, a programmable MCU is not needed, the circuit cost is low, the reliability is high, and meanwhile, a plurality of signal detection circuits can be connected in parallel without limiting the number of detected level signals.
Description
Technical Field
The utility model belongs to the technical field of the frock detects, concretely relates to voltage signal frock detection circuitry.
Background
In the production of elevator hardware control system product, for guaranteeing that the function of each shipment product is normal now, can carry out quality testing to the detection frock that the product design corresponds. A signal detection circuit is commonly used in the design of a detection tool circuit, namely, a plurality of voltage signals generated by a board to be detected need to be detected one by one, and products are calculated and qualified after all detection is correct. If there is an abnormal signal, it is necessary to indicate that the test does not pass and to indicate the abnormal point. The signal detection circuit is simple and practical to use, high in reliability and high in detection efficiency, and can save a large amount of labor cost and time cost, so that the signal detection circuit is widely used in the elevator industry.
In the design of a hardware circuit of a detection tool, a mode of combining software and hardware is mostly adopted for the design of a signal detection circuit at present, namely, the hardware circuit is responsible for signal sampling, and an integrated chip (programmable MCU) is responsible for detecting and analyzing the sampled signal and outputting a detection result. The circuit combining software and hardware has the advantages of complex software programming, high device cost and easy chip damage due to the MCU chip. Meanwhile, the number of the voltage signals which can be detected is limited because the IO port of the MCU is limited.
Disclosure of Invention
An object of the utility model is to provide a voltage signal frock detection circuitry can adopt the circuit design of pure hardware to realize, and need not programming MCU, and the circuit is with low costs, reliable, does not restrict the quantity of the level signal who detects simultaneously.
In order to achieve the above object, the present invention provides a voltage signal tool detection circuit, which comprises a fault indication circuit, a first switch circuit and a plurality of first signal detection circuits; each first signal detection circuit is connected with a first logic circuit in parallel, the first logic circuits are connected with one end of the first switch circuit in parallel, the other end of the first switch circuit is connected with the fault indication circuit, and an indicator lamp is arranged in the fault indication circuit.
In some embodiments, the first signal detection circuit includes a first resistor, one end of the first resistor is connected to the first voltage sampling terminal, the other end of the first resistor is connected to the ground terminal, the first input terminal and the output terminal of the first logic circuit are respectively connected to two ends of the first resistor, and the second input terminal of the first logic circuit is connected to the first switch circuit.
In some embodiments, the first logic circuit includes a second resistor, a first diode, and a second diode, an anode of the first diode is connected to the first voltage sampling terminal, a cathode of the first diode is connected to a cathode of the second diode, one end of the second resistor is connected between the first diode and the second diode, another end of the second resistor is connected to a ground terminal, and an anode of the second diode is connected to the first switch circuit.
In some embodiments, the first switch circuit includes a third resistor, a fourth resistor and a PMOS transistor, one end of the third resistor is connected to the first logic circuit, the other end of the third resistor is connected to the gate of the PMOS transistor, the source of the PMOS transistor is connected to a power supply terminal, the drain of the PMOS transistor is connected to the fault indication circuit, one end of the fourth resistor is connected to the first logic circuit, and the other end of the fourth resistor is connected to the power supply terminal.
In some embodiments, the first signal detection circuit further includes a first current-limiting filter circuit and a first optical coupler, an input terminal of the first current-limiting filter circuit is connected to the first voltage sampling terminal, an output terminal of the first current-limiting filter circuit is connected to a primary side of the first optical coupler, and a secondary side of the first optical coupler is connected to the first resistor.
In some embodiments, the first current-limiting filter circuit includes a fifth resistor and a first capacitor, one end of the fifth resistor is connected to the first voltage sampling terminal, the other end of the fifth resistor is connected to the first primary side end of the first optocoupler, the second primary side end of the first optocoupler is connected to a ground terminal, and two ends of the first capacitor are connected to the first primary side end and the second primary side end of the first optocoupler, respectively.
In some embodiments, the fault detection circuit further comprises a second switch circuit and a plurality of second signal detection circuits, each of the second signal detection circuits is connected with a second logic circuit in parallel, the plurality of second logic circuits are connected with one end of the second switch circuit in parallel, and the other end of the second switch circuit is connected with the fault indication circuit.
In some embodiments, the second signal detection circuit includes a sixth resistor, one end of the sixth resistor is connected to the second voltage sampling terminal, the other end of the sixth resistor is connected to a power supply terminal, the first input terminal and the first output terminal of the second logic circuit are respectively connected to two ends of the sixth resistor, and the second output terminal of the second logic circuit is connected to the second switch circuit.
In some embodiments, the second logic circuit includes a seventh resistor, a third diode, and a fourth diode, a cathode of the third diode is connected to the second voltage sampling terminal, an anode of the third diode is connected to an anode of the fourth diode, a cathode of the fourth diode is connected to the second switch circuit, one end of the seventh resistor is connected to a power supply terminal, and the other end of the seventh resistor is connected between the third diode and the fourth diode.
In some embodiments, the second switch circuit comprises an eighth resistor, a ninth resistor and an NMOS transistor, one end of the eighth resistor is connected to the second logic circuit, the other end of the eighth resistor is connected to the gate of the NMOS transistor, the source of the NMOS transistor is connected to the ground, the drain of the NMOS transistor is connected to the fault indication circuit, one end of the ninth resistor is connected to the second logic circuit, and the other end of the ninth resistor is connected to the ground.
The utility model provides a voltage signal frock detection circuitry's beneficial effect lies in, through setting up trouble indicating circuit, first switch circuit and a plurality of first signal detection circuitry, wherein every first signal detection circuitry all parallel connection has first logic circuit, a plurality of first logic circuit parallel connection are connected in first switch circuit's one end, and first switch circuit's the other end is connected in trouble indicating circuit, when the detected signal of any one first signal circuit is unusual, first switch circuit can switch on and make the pilot lamp in the trouble indicating circuit luminous, it has the anomaly to show output voltage signal, the frock detects not to pass through, the pilot lamp is luminous only when all detected signals are all abnormal, it is normal to show all output voltage signal, the frock detects and passes through; therefore, tool detection can be realized through the circuit design of pure hardware, a programmable MCU is not needed, the circuit cost is low and reliable, and meanwhile, the first signal detection circuits can be connected in parallel, and the number of detected level signals is not limited.
Drawings
Fig. 1 is a schematic structural diagram of a voltage signal tool detection circuit.
Description of the reference numerals:
10. a fault indication circuit; 20. a first switching circuit; 30. a first signal detection circuit; 40. a first logic circuit; 50. a second switching circuit; 60. a second signal detection circuit; 70. a second logic circuit; 80. a first current limiting filter circuit; 90. a second current limiting filter circuit;
r1, a first resistor; r2 and a second resistor; r3, a third resistor; r4, a fourth resistor; r5 and a fifth resistor; r6 and a sixth resistor; r7 and a seventh resistor; r8 and an eighth resistor; r9 and a ninth resistor; r10 and a tenth resistor; r11 and an eleventh resistor; c1, a first capacitor; c2, a second capacitor; q1 and a PMOS tube; q2 and an NMOS tube; u1, a first optical coupler; u2, a second optical coupler; d1, a first diode; d2, a second diode; d3, a third diode; d4, a fourth diode; ZD1, a first zener diode; ZD2, a second zener diode.
Detailed Description
To facilitate understanding of the present invention, specific embodiments thereof will be described in more detail below with reference to the accompanying drawings.
As used herein, "first and second" \ 8230 "are used unless otherwise indicated or defined and are used merely to distinguish between names and do not denote any particular quantity or order.
As used herein, the term "and/or" includes any and all combinations of one or more of the associated listed items, unless specified or otherwise defined.
It should be noted that "fixed to" or "connected to" in this document may be directly fixed to or connected to one element or may be indirectly fixed to or connected to one element.
As shown in fig. 1, the embodiment of the present invention discloses a voltage signal tool detection circuit, which comprises a fault indication circuit 10, a first switch circuit 20 and a plurality of first signal detection circuits 30; each first signal detection circuit 30 is connected in parallel with a first logic circuit 40, the plurality of first logic circuits 40 are connected in parallel with one end of the first switch circuit 20, the other end of the first switch circuit 20 is connected to the fault indication circuit 10, and an indicator lamp is arranged in the fault indication circuit 10.
By arranging the fault indicating circuit 10, the first switch circuit 20 and the first signal detecting circuits 30, wherein each first signal detecting circuit 30 is connected with the first logic circuit 40 in parallel, the first logic circuits 40 are connected with one end of the first switch circuit 20 in parallel, the other end of the first switch circuit 20 is connected with the fault indicating circuit 10, when the detection signal of any one first signal circuit is abnormal, the first switch circuit 20 is conducted to enable the indicating lamp in the fault indicating circuit 10 to emit light, which indicates that the output voltage signal is abnormal, the tool detection fails, only when all the detection signals are abnormal, the indicating lamp does not emit light, which indicates that all the output voltage signals are normal, and the tool detection passes; therefore, the tool detection can be realized through the circuit design of pure hardware, a programmable MCU is not needed, the circuit cost is low, the reliability is high, and meanwhile, the first signal detection circuits 30 can be connected in parallel, so that the number of detected level signals is not limited.
The fault indication circuit 10 is connected to the power supply terminal VCC, in this embodiment, the power supply terminal VCC is set to be a 24V voltage source, the fault indication circuit 10 specifically includes a light emitting diode LED and a resistor Rs, after the light emitting diode LED and the resistor Rs are connected in series, one end of the light emitting diode LED is connected to the power supply terminal VCC, and the other end of the light emitting diode LED is connected to the first switch circuit 20.
Specifically, in this embodiment, the first signal detecting circuit 30 includes a first resistor R1, one end of the first resistor R1 is connected to the first voltage sampling terminal, the other end of the first resistor R1 is connected to the ground terminal GND, a first input terminal and an output terminal of the first logic circuit 40 are respectively connected to two ends of the first resistor R1, and a second input terminal of the first logic circuit 40 is connected to the first switch circuit 20.
Specifically, in the present embodiment, the first logic circuit 40 includes a second resistor R2, a first diode D1 and a second diode D2, an anode of the first diode D1 is connected between the first voltage sampling end and the first resistor R1, a cathode of the first diode D1 is connected to a cathode of the second diode D2, one end of the second resistor R2 is connected between the first diode D1 and the second diode D2, the other end of the second resistor R2 is connected to the ground GND, and an anode of the second diode D2 is connected to the first switch circuit 20.
Specifically, in this embodiment, the first switch circuit 20 includes a third resistor R3, a fourth resistor R4 and a PMOS transistor Q1, one end of the third resistor R3 is connected to the anode of the second diode D2 in the first logic circuit 40, the other end of the third resistor R3 is connected to the gate G of the PMOS transistor Q1, the source S of the PMOS transistor Q1 is connected to the power supply terminal VCC, the drain D of the PMOS transistor Q1 is connected to the fault indication circuit 10, one end of the fourth resistor R4 is connected to the anode of the second diode D2 in the first logic circuit 40, and the other end of the fourth resistor R4 is connected to the power supply terminal VCC.
Further preferably, considering that the board to be tested is also tested for outputting GND (i.e. 0V level signal), in this embodiment, the voltage signal tool detection circuit further includes a second switch circuit 50 and a plurality of second signal detection circuits 60, each of the second signal detection circuits 60 is connected in parallel with a second logic circuit 70, the plurality of second logic circuits 70 are connected in parallel with one end of the second switch circuit 50, and the other end of the second switch circuit 50 is connected to the fault indication circuit 10.
Specifically, in this embodiment, the second signal detecting circuit 60 includes a sixth resistor R6, one end of the sixth resistor R6 is connected to the second voltage sampling terminal, the other end of the sixth resistor R6 is connected to the power supply terminal VCC, a first input terminal and a first output terminal of the second logic circuit 70 are respectively connected to two ends of the sixth resistor R6, and a second output terminal of the second logic circuit 70 is connected to the second switch circuit 50.
Specifically, in this embodiment, the second logic circuit 70 includes a seventh resistor R7, a third diode D3 and a fourth diode D4, a cathode of the third diode D3 is connected to the second voltage sampling terminal, an anode of the third diode D3 is connected to an anode of the fourth diode D4, a cathode of the fourth diode D4 is connected to the second switch circuit 50, one end of the seventh resistor R7 is connected to VCC, and the other end is connected between the third diode D3 and the fourth diode D4.
Specifically, in this embodiment, the second switch circuit 50 includes an eighth resistor R8, a ninth resistor R9 and an NMOS transistor Q2, one end of the eighth resistor R8 is connected to the second logic circuit 70, the other end of the eighth resistor R8 is connected to the gate of the NMOS transistor Q2, the source of the NMOS transistor Q2 is connected to the ground GND, the drain of the NMOS transistor Q2 is connected to the fault indication circuit 10, one end of the ninth resistor R9 is connected to the second logic circuit 70, and the other end of the ninth resistor R9 is connected to the ground GND.
In the above embodiment, a plurality of first signal detection circuits 30 and a plurality of second signal detection circuits 60 may be connected in parallel, where each first signal detection circuit 30 corresponds to one first voltage sampling end, and each second signal detection circuit 60 corresponds to one second voltage sampling end; the first sampling end refers to a non-zero level signal output end of the board to be tested, and the second voltage sampling end refers to a zero level signal output end of the board to be tested, so that a plurality of level signals (including zero level signals and non-zero level signals) output by the board to be tested can be simultaneously detected in batches, and the number of the detected level signals is not limited. By arranging the first signal detection circuit 30 and the first logic circuit 40, the detection method is suitable for a detection application scenario in which the normal voltage values of the plurality of non-zero level signals output by the board to be detected are all the same as the voltage value of the power supply terminal VCC, that is, the normal voltage value of the first voltage sampling terminal is the same as the voltage value of the power supply terminal VCC, for example, both the normal voltage value and the voltage value are 24V. In other possible embodiments, it is also possible to set the voltage to 26V, 33V, etc., and this is not limited herein.
However, it is considered that the board under test may output other non-zero level signals having normal voltage values different from the voltage value of the power source terminal VCC, such as other values of 5V, 3.3V, 6V, and the like. Therefore, the first signal detection circuit 30 can be further optimized, and the optimized first signal detection circuit 30 further includes a first current-limiting filter circuit 80 and a first optical coupler U1, wherein an input end of the first current-limiting filter circuit 80 is connected to the first voltage sampling end, an output end of the first current-limiting filter circuit 80 is connected to the primary side of the first optical coupler U1, and a secondary side of the first optical coupler U1 is connected to the first resistor R1.
Specifically, in this embodiment, the first current-limiting filter circuit 80 includes a fifth resistor R5 and a first capacitor C1, one end of the fifth resistor R5 is connected to the first voltage sampling end, the other end of the fifth resistor R5 is connected to the first primary end of the first optocoupler U1, the second primary end of the first optocoupler U1 is connected to the ground GND, and two ends of the first capacitor C1 are connected to the first primary end and the second primary end of the first optocoupler U1, respectively.
Therefore, by adopting the optical coupler isolation circuit design, the resistance parameter of the primary side of the optical coupler can be modified, for example, the resistance value of the fifth resistor R5, the detection application scene that the normal voltage values of a plurality of non-zero level signals output by the board to be detected are different from the voltage value of the power supply end VCC can be suitable, thus, a plurality of non-zero level signals the same as the voltage value of the power supply end VCC and/or a plurality of non-zero level signals different from the voltage value of the power supply end VCC can be detected in batch at the same time, a plurality of zero level signals output by the board to be detected can be detected in batch, multi-voltage signal tool detection is realized, the reliability and the detection efficiency of tool detection are further improved, and the labor cost and the time cost are further saved.
Further preferably, the first switch circuit 20 further includes a second current-limiting filter circuit 90 and a second optical coupler U2, an input end of the second current-limiting filter circuit 90 is connected to the drain D of the PMOS transistor Q1, an output end of the second current-limiting filter circuit 90 is connected to the primary side of the second optical coupler U2, and a secondary side of the second optical coupler U2 is connected to the fault indication circuit 10.
The second current-limiting filter circuit 90 includes a tenth resistor R10, an eleventh resistor R11, and a second capacitor C2, one end of the tenth resistor R10 is connected to the drain D of the PMOS transistor Q1, the other end of the tenth resistor R10 is connected to the first primary end of the second optocoupler U2, one end of the eleventh resistor R11 is connected between the tenth resistor R10 and the first primary end of the second optocoupler U2, the other end of the eleventh resistor R11 is connected to the ground GND, and the second capacitor C2 is connected in parallel to two ends of the eleventh resistor R11.
The first switch circuit 20 and the second switch circuit 50 are connected in parallel to the fault indication circuit 10, wherein any one of the switch circuits, that is, the first switch circuit 20 and/or the second switch circuit 50 is turned on, so that the indicator lamp in the fault indication circuit 10 emits light to indicate that the output voltage signal is abnormal, the tool detection of the board to be detected does not pass, the indicator lamp does not emit light only when all the detection signals are abnormal, all the output voltage signals are normal, and the tool detection of the board to be detected passes.
In the first switch circuit 20 and the second switch circuit 50, the third resistor R3 and the eighth resistor R8 respectively play a role in limiting the current of the gate, and protect the MOS transistor. Further preferably, a zener diode is further disposed in each of the first switch circuit 20 and the second switch circuit 50, and is configured to prevent the MOS transistor from being damaged due to an excessive gate-source voltage, for example, the first switch circuit 20 further includes a first zener diode ZD1, an anode of the first zener diode ZD1 is connected to an anode of the second diode D2, and a cathode of the first zener diode ZD1 is connected to the source S of the PMOS transistor Q1; the second switch circuit 50 further includes a second zener diode ZD2, a cathode of the second zener diode ZD2 is connected to an anode of the second diode D2, and an anode of the second zener diode ZD2 is connected to the source S of the NMOS transistor Q2.
A plurality of the first logic circuits 40 and the second logic circuits 70 may be connected in parallel (more than 40 circuits), so as to detect more level signals. Each of the first signal detection circuit 30 and the second signal detection circuit 60 is provided with a light emitting diode LED connected in series with the first resistor R1 or the sixth resistor R6, so that for each level signal, the corresponding light emitting diode LED indicates whether the output is normal.
The working principle of the voltage signal tool detection circuit provided in the embodiment is as follows:
for one or more 24V level signals with the same normal voltage value as a power supply terminal VCC (for example, 24V) sent by a board to be detected, detection can be completed only by connecting the first signal detection circuit 30 and the first logic circuit 40 in parallel to the first switch circuit 20, for example, when the 24V signal 1 is input normally, current flows to a ground terminal GND through the light emitting diode LED and the current limiting resistor R1, the light emitting diode LED emits light to indicate that the 24V signal 1 is input normally, otherwise, the output of the signal to be detected is abnormal;
aiming at one or more non-zero level signals with the normal voltage value different from that of a power supply end VCC (such as 24V) sent by a board to be detected, such as a 5V level signal and a 3.3V level signal, an optimized level signal which comprises a first current limiting filter circuit 80, a first optical coupler U1, a first signal detection circuit 30 and a first logic circuit 40 is connected in parallel to a first switch circuit 20, so that detection can be completed, in the 5V and 3.3V level signal detection circuit, when the level signal of 5V or 3.3V is input to the first current limiting filter circuit 80, the level signal is input to the primary side of the first optical coupler U1 after being limited by a fifth resistor R5 and filtered by a first capacitor C1, so that the secondary side of the first optical coupler U1 is conducted, the power supply end VCC connected to the secondary side of the first optical coupler U1 enables a light emitting diode LED to emit light, and indicates that the 5V level signal or the 3.3V level signal is input normally, otherwise, the output of the signal to be detected is abnormal;
for one or more 0V level signals, such as 0V signal 1 and 0V signal 2, sent by the board to be tested, the second signal detection circuit 60 and the second logic circuit 70 are connected in parallel to the second switch circuit 50, so as to complete the detection, and similarly, the light emitting diode LED in the second signal detection circuit 60 may indicate whether the 0V signal 1 and the 0V signal 2 are normal or not.
In the first logic circuit 40, if the input of the level signal to be measured (such as the 24V signal 1, the 24V signal 2, the 5V signal or the 3.3V signal) is normal, a current flows through the first diode D1 and the second resistor R2 to the ground GND, and due to the existence of the pull-up resistor R4 in the first switch circuit 20, the second diode D2 in the first logic circuit 40 does not flow through;
if the input of the level signal to be detected is abnormal or no input is available, the power supply terminal VCC generates a current to the first switch circuit 20, and the current flows to the ground terminal GND through the pull-up resistor R4, the second diode D2 and the second resistor R2, and at this time, the current passes through the second diode D2; the function of the first diode D1 at this time is to prevent the current from making the LED lamp illuminate through the branch of the first diode D1, and the function of indicating the abnormality of the 24V signal 1 is lost.
When all input level signals to be tested (24V signal 1, 24V signal 2, 5V signal, 3.3V signal) related to the first switch circuit 20 are normal, that is, when no current flows through the second diode D2 in each first logic circuit 40, no current flows through the pull-up resistor R4, no voltage difference exists between two ends of the resistor R4, the gate-source voltages of the PMOS transistors Q1 in the first switch circuit 20 are the same, and the PMOS transistor Q1 is not conducted;
when 1 or more of all the input level signals to be detected related to the first switch circuit 20 are abnormal, that is, when a current flows through any one or more of the second diodes D2 in the first logic circuit 40, a current flows through the pull-up resistor R4, a voltage difference exists between two ends of the resistor R4, a gate voltage of the PMOS transistor Q1 in the first switch circuit 20 is pulled down to be lower than a starting voltage of the PMOS transistor Q1, and the PMOS transistor Q1 is turned on, which may cause the light emitting diode LED in the fault indication circuit 10 to emit light.
The second switch circuit 50 has a similar function to the first switch circuit 20, and when all input level signals to be measured (0V signal 1 and 0V signal 2) related to the second switch circuit 50 are normal, the gate voltage of the NMOS transistor Q2 in the second switch circuit 50 is 0V, the gate-source voltages are the same, and the NMOS transistor Q2 is not turned on; otherwise, the gate voltage of the NMOS transistor Q2 is pulled up to a voltage higher than the turn-on voltage of the NMOS transistor Q2, and the NMOS transistor Q2 is turned on, which may cause the light emitting diode LED in the fault indication circuit 10 to emit light.
In the second current-limiting filter circuit 90, after the PMOS transistor Q1 in the first switch circuit 20 is turned on, 24V is input to the primary side of the second optocoupler U2 through the current-limiting resistor R10, so that the secondary side of the second optocoupler U2 is turned on, which may also cause the light-emitting diode LED in the fault indication circuit 10 to emit light. The eleventh resistor R11 functions as a shunt, and the capacitor C2 functions as a filter to protect the second optocoupler U2.
In summary, when one or more abnormal signals exist in all detected level signals, the light emitting diode LED in the fault indication circuit 10 is made to emit light, which indicates that the output signal of the board to be detected is abnormal, and the tool fails to detect, and at this time, the unlit LED in the tool fault indication lamp is checked, so that the fault signal is located to process the circuit related to the board to be detected. Only when all detection signals are abnormal, the light emitting diode LED in the fault indication circuit 10 does not emit light, all output signals of the board to be detected are normal, and the tool detection is passed.
In the embodiment, through the parallel connection of a plurality of logic circuits, the function that one LED indicates whether there is an abnormality in all signals to be measured is realized: when the indicator light is not lighted, all signals to be detected are normal, and the on-off of the fault positioning indicator light is not required to be checked; when the indicator light is lighted, the abnormal signal is indicated, and workers can locate the abnormal signal by checking the unlighted LED in the fault locating indicator light, so that the abnormal signal can be indicated, and the specific position of the abnormal signal can be accurately located while the abnormal signal is present in all the signals to be detected. Moreover, no integrated chip is needed, programming is not needed, common and cheap devices are used, tool detection is achieved through pure hardware circuit design, and the circuit is low in cost and reliable. Meanwhile, the detection of signals with different levels can be increased by connecting a plurality of logic circuits in parallel. The circuit improves the reliability and the detection efficiency of tool detection, and achieves the purpose of saving labor cost and time cost.
The specific circuit devices can be different from the circuit devices, such as the type of an optical coupler and the type of an MOS (metal oxide semiconductor) tube; the resistance of the current limiting resistor can be determined according to specific design requirements. The above embodiments are not intended to be exhaustive list of the present invention, and there may be many other embodiments not listed. Any replacement and improvement made on the basis of not violating the conception of the utility model belong to the protection scope of the utility model.
Claims (10)
1. The voltage signal tool detection circuit is characterized by comprising a fault indication circuit, a first switch circuit and a plurality of first signal detection circuits; each first signal detection circuit is connected with a first logic circuit in parallel, the first logic circuits are connected with one end of the first switch circuit in parallel, the other end of the first switch circuit is connected with the fault indication circuit, and an indicator lamp is arranged in the fault indication circuit.
2. The voltage signal tool detection circuit of claim 1, wherein the first signal detection circuit comprises a first resistor, one end of the first resistor is connected to a first voltage sampling terminal, the other end of the first resistor is connected to a ground terminal, a first input terminal and an output terminal of the first logic circuit are respectively connected to two ends of the first resistor, and a second input terminal of the first logic circuit is connected to the first switch circuit.
3. The voltage signal tool detection circuit of claim 2, wherein the first logic circuit comprises a second resistor, a first diode and a second diode, an anode of the first diode is connected to the first voltage sampling terminal, a cathode of the first diode is connected to a cathode of the second diode, one end of the second resistor is connected between the first diode and the second diode, the other end of the second resistor is connected to a ground terminal, and an anode of the second diode is connected to the first switch circuit.
4. The voltage signal tool detection circuit according to claim 2, wherein the first switch circuit comprises a third resistor, a fourth resistor and a PMOS transistor, one end of the third resistor is connected to the first logic circuit, the other end of the third resistor is connected to the gate of the PMOS transistor, the source of the PMOS transistor is connected to a power supply terminal, the drain of the PMOS transistor is connected to the fault indication circuit, one end of the fourth resistor is connected to the first logic circuit, and the other end of the fourth resistor is connected to the power supply terminal.
5. The voltage signal tool detection circuit of any one of claims 2 to 4, wherein the first signal detection circuit further comprises a first current-limiting filter circuit and a first optical coupler, an input end of the first current-limiting filter circuit is connected to the first voltage sampling end, an output end of the first current-limiting filter circuit is connected to a primary side of the first optical coupler, and a secondary side of the first optical coupler is connected to the first resistor.
6. The voltage signal tool detection circuit of claim 5, wherein the first current-limiting filter circuit comprises a fifth resistor and a first capacitor, one end of the fifth resistor is connected to the first voltage sampling end, the other end of the fifth resistor is connected to the first primary side end of the first optical coupler, the second primary side end of the first optical coupler is connected to a ground terminal, and two ends of the first capacitor are connected to the first primary side end and the second primary side end of the first optical coupler respectively.
7. The voltage signal tool detection circuit according to any one of claims 1 to 4, further comprising a second switch circuit and a plurality of second signal detection circuits, wherein each of the second signal detection circuits is connected in parallel with a second logic circuit, the plurality of second logic circuits are connected in parallel with one end of the second switch circuit, and the other end of the second switch circuit is connected to the fault indication circuit.
8. The voltage signal tool detection circuit according to claim 7, wherein the second signal detection circuit comprises a sixth resistor, one end of the sixth resistor is connected to the second voltage sampling terminal, the other end of the sixth resistor is connected to a power supply terminal, the first input terminal and the first output terminal of the second logic circuit are respectively connected to two ends of the sixth resistor, and the second output terminal of the second logic circuit is connected to the second switch circuit.
9. The voltage signal tool detection circuit according to claim 8, wherein the second logic circuit comprises a seventh resistor, a third diode and a fourth diode, a cathode of the third diode is connected to the second voltage sampling terminal, an anode of the third diode is connected to an anode of the fourth diode, a cathode of the fourth diode is connected to the second switch circuit, one end of the seventh resistor is connected to a power supply terminal, and the other end of the seventh resistor is connected between the third diode and the fourth diode.
10. The voltage signal tool detection circuit according to claim 7, wherein the second switch circuit comprises an eighth resistor, a ninth resistor and an NMOS transistor, one end of the eighth resistor is connected to the second logic circuit, the other end of the eighth resistor is connected to the gate of the NMOS transistor, the source of the NMOS transistor is connected to the ground, the drain of the NMOS transistor is connected to the fault indication circuit, one end of the ninth resistor is connected to the second logic circuit, and the other end of the ninth resistor is connected to the ground.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202222508645.9U CN218180961U (en) | 2022-09-21 | 2022-09-21 | Voltage signal frock detection circuitry |
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