CN218124691U - Receiver device for realizing low-intermediate frequency image rejection broadband function based on numerical control phase shift - Google Patents
Receiver device for realizing low-intermediate frequency image rejection broadband function based on numerical control phase shift Download PDFInfo
- Publication number
- CN218124691U CN218124691U CN202221718969.9U CN202221718969U CN218124691U CN 218124691 U CN218124691 U CN 218124691U CN 202221718969 U CN202221718969 U CN 202221718969U CN 218124691 U CN218124691 U CN 218124691U
- Authority
- CN
- China
- Prior art keywords
- unit
- path
- signal
- broadband
- path signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Images
Landscapes
- Digital Transmission Methods That Use Modulated Carrier Waves (AREA)
Abstract
The utility model relates to a realize receiver device of low intermediate frequency image rejection broadband function based on numerical control is shifted phase, including broadband quadrature IQ demodulation unit, first anti-aliasing filter unit, second anti-aliasing filter unit, high-purity frequency synthesis local oscillator unit, first digital gain amplification unit, second digital gain amplification unit, first band-pass filter unit, second band-pass filter unit, first numerical control shift unit, amplitude and phase detection unit, second numerical control shift unit, first high-speed ADC unit, the high-performance DSP unit of shifting phase, the unit link to each other in proper order. The utility model discloses a have better mirror image when broadband signal hangs down the intermediate frequency analysis and restrain, two way signal amplitude of I-Q, phase place have higher stability simultaneously, can realize that the low intermediate frequency mirror image of high performance restraines the broadband receiver.
Description
Technical Field
The utility model relates to a mobile communication field especially relates to the broadband receiver field, specifically indicates a receiver device based on numerical control is moved the looks and is realized low intermediate frequency image suppression broadband function.
Background
The broadband receiver is used as an important component of mobile communication test, is widely applied to various fields such as navigation, radar, communication and the like, has important economic benefit and social benefit, and is a technical difficulty in the field of mobile communication at present. The traditional low-intermediate frequency broadband receiver has no advantage of direct current offset interference, but a demodulation channel usually adopts an analog phase-shifting mode to carry out image rejection, so that poor image rejection indexes and unbalanced amplitude and phase exist, and the analysis index of the receiver is poor, so that the technical requirement of a high-performance broadband receiver cannot be met by the prior technical scheme.
SUMMERY OF THE UTILITY MODEL
The utility model aims at overcoming the shortcoming of above-mentioned prior art, providing a satisfy easy and simple to handle, the high application scope of accuracy comparatively extensive, based on numerical control phase shift realize low intermediate frequency image suppression broadband function's receiver device.
In order to achieve the above object, the utility model discloses a receiver device based on numerical control phase shifts realizes that low intermediate frequency image restraines broadband function as follows:
this receiver device based on numerical control is shifted phase and is realized low intermediate frequency image and restrain broadband function, its key feature is, the device include:
the broadband orthogonal IQ demodulation unit is used for carrying out IQ orthogonal demodulation on a broadband input signal and outputting an I path signal and a Q path signal;
the first anti-aliasing filter unit is connected with the broadband quadrature IQ demodulation unit and is used for carrying out low-pass filtering on the demodulated I-path signal and filtering an interference signal generated by frequency mixing;
the second anti-aliasing filter unit is connected with the broadband orthogonal IQ demodulation unit and is used for performing low-pass filtering on the demodulated Q-path signals and filtering interference signals generated by frequency mixing;
the first digital gain amplification unit is connected with the first anti-aliasing filter unit and is used for carrying out dynamic gain amplification on the I path of signals after low-pass filtering so as to enable the amplitudes of the I path of signals and the Q path of signals to be equal;
the second digital gain amplification unit is connected with the second anti-aliasing filter unit and is used for carrying out dynamic gain amplification on the Q-path signals after low-pass filtering so as to enable the amplitudes of the I-path signals and the Q-path signals to be equal;
the first band-pass filter unit is connected with the first digital gain amplification unit and is used for performing band-pass filtering on the amplified I path signal and filtering an interference signal in a path;
the second band-pass filter unit is connected with the second digital gain amplification unit and is used for performing band-pass filtering on the amplified Q-path signal and filtering an interference signal in a path;
the first numerical control phase shifting unit is connected with the second band-pass filter unit and is used for carrying out numerical control phase shifting on the filtered Q-path signal;
the second numerical control phase shifting unit is connected with the first numerical control phase shifting unit and is used for carrying out 90-degree numerical control phase shifting on the phase-shifted Q-path signals again;
the first high-speed ADC unit is connected with the first band-pass filter unit and is used for carrying out analog-to-digital conversion on an input I path signal;
the second high-speed ADC unit is connected with the second digital control phase-shifting unit and is used for carrying out analog-to-digital conversion on the input Q-path signal;
and the high-performance DSP unit is connected with the first high-speed ADC unit and the second high-speed ADC unit and is used for performing FIR filtering, extraction, summation and FFT change on the converted signals of the I path and the Q path.
Preferably, the apparatus further comprises a high-purity frequency synthesis local oscillator unit connected to the wideband quadrature IQ demodulation unit for providing an ultra-low phase noise local oscillator signal to the wideband quadrature IQ demodulation unit for mixing with the wideband input signal.
Preferably, the first digital control phase shift unit is connected to the first band-pass filter unit, and is configured to compare amplitudes and phases of the I path signal and the Q path signal, and measure an amplitude and phase difference value;
preferably, the wideband quadrature IQ demodulation unit includes a 90 ° phase shifter and a mixer, an output end of the 90 ° phase shifter is connected to the mixer, and the mixer is respectively connected to the first anti-aliasing filter unit and the second anti-aliasing filter unit, and configured to perform phase shifting on the local oscillator signal and then respectively perform frequency mixing to realize I-path and Q-path output.
Preferably, the high performance DSP unit includes an FIR filter, a decimation filter, an adder, and an FFT processor, the FIR filter is respectively connected to the first high speed ADC unit and the second high speed ADC unit, the decimation filter is connected to the FIR filter, the adder is connected to the decimation filter, and the FFT processor is connected to the adder and is configured to perform high speed signal processing on the input I path signal and Q path signal.
Adopted the utility model discloses a receiver device based on numerical control is shifted realization low intermediate frequency image and is restrained broadband function satisfies high image and restrains, amplitude/phase balance, big bandwidth, high analytic index requirement, can the wide application in the low intermediate frequency image of each fields such as navigation, radar, communication and restrain the broadband receiver, to broadband receiver performance requirement, utilize broadband quadrature demodulation, anti-aliasing filtering, dynamic gain to enlarge, the numerical control is shifted the phase, amplitude phase detects etc. and support low intermediate frequency scheme broadband receiver analytic performance.
Drawings
Fig. 1 is the utility model discloses a structural schematic diagram of a receiver device based on numerical control phase shifting realizes low intermediate frequency image rejection broadband function.
Reference numerals:
1 broadband quadrature IQ demodulation unit
2 first anti-aliasing filter unit
3 second anti-aliasing filter unit
4 high-purity frequency synthesis local oscillator unit
5 first digital gain amplifying unit
6 second digital gain amplifying unit
7 first band-pass filter unit
8 second band-pass filter unit
9 first numerical control phase shift unit
10 amplitude phase detection unit
11 second digital control phase shift unit
12 first high-speed ADC unit
13 second high-speed ADC unit
14 high-performance DSP unit
Detailed Description
In order to more clearly describe the technical content of the present invention, the following further description is given with reference to specific embodiments.
The utility model discloses a this receiver device based on numerical control is shifted looks and is realized low intermediate frequency mirror image and restrain broadband function, include wherein: the broadband orthogonal IQ demodulation unit is used for carrying out IQ orthogonal demodulation on a broadband input signal and outputting an I path signal and a Q path signal;
the first anti-aliasing filter unit is connected with the broadband quadrature IQ demodulation unit and is used for carrying out low-pass filtering on the demodulated I-path signal and filtering an interference signal generated by frequency mixing;
the second anti-aliasing filter unit is connected with the broadband quadrature IQ demodulation unit and is used for carrying out low-pass filtering on the demodulated Q-path signal and filtering an interference signal generated by frequency mixing;
the first digital gain amplification unit is connected with the first anti-aliasing filter unit and is used for carrying out dynamic gain amplification on the I-path signal after low-pass filtering so as to enable the I-path signal and the Q-path signal to be equal in amplitude;
the second digital gain amplification unit is connected with the second anti-aliasing filter unit and is used for carrying out dynamic gain amplification on the Q-path signal after low-pass filtering so as to enable the amplitude of the I-path signal to be equal to that of the Q-path signal;
the first band-pass filter unit is connected with the first digital gain amplification unit and is used for performing band-pass filtering on the amplified I-path signal and filtering an interference signal in a path;
the second band-pass filter unit is connected with the second digital gain amplification unit and is used for performing band-pass filtering on the amplified Q-path signal and filtering an interference signal in a path;
the first numerical control phase shifting unit is connected with the second band-pass filter unit and is used for carrying out numerical control phase shifting on the filtered Q-path signal;
the second numerical control phase shifting unit is connected with the first numerical control phase shifting unit and is used for carrying out 90-degree numerical control phase shifting on the phase-shifted Q-path signals again;
the first high-speed ADC unit is connected with the first band-pass filter unit and is used for carrying out analog-to-digital conversion on an input I path signal;
the second high-speed ADC unit is connected with the second digital control phase-shifting unit and is used for carrying out analog-to-digital conversion on the input Q-path signal;
and the high-performance DSP unit is connected with the first high-speed ADC unit and the second high-speed ADC unit and is used for performing FIR filtering, extraction, summation and FFT change on the converted signals of the I path and the Q path.
Preferably, the apparatus further comprises a high-purity frequency synthesis local oscillator unit connected to the wideband quadrature IQ demodulation unit for providing an ultra-low phase noise local oscillator signal to the wideband quadrature IQ demodulation unit for mixing with the wideband input signal.
Preferably, the first digital control phase shift unit is connected to the first band-pass filter unit, and is configured to compare amplitudes and phases of the I path signal and the Q path signal, and measure an amplitude and phase difference value;
as a preferred embodiment of the present invention, the wideband quadrature IQ demodulation unit comprises a 90 ° phase shifter and a frequency mixer, the 90 ° phase shifter has an output connected to the frequency mixer, the frequency mixer respectively connects to the first anti-aliasing filter unit and the second anti-aliasing filter unit for respectively performing phase shift on the local oscillation signal and then performing frequency mixing to realize I-path and Q-path output.
As the utility model discloses a preferred embodiment, high performance DSP unit include FIR filter, extraction filter, adder and FFT treater, FIR filter be connected with first high-speed ADC unit and the high-speed ADC unit of second respectively, extraction filter be connected with FIR filter, adder and extraction filter homogeneous phase be connected, FFT treater be connected with the adder for carry out high-speed signal processing to I way and Q way signal of input.
In a specific embodiment of the present invention, the broadband quadrature IQ demodulation unit is configured to perform IQ quadrature demodulation on a broadband input signal to output an I-path signal and a Q-path signal;
the first anti-aliasing filter unit is connected with the broadband orthogonal IQ demodulation unit and is used for carrying out low-pass filtering on the demodulated I-path signal and filtering an interference signal generated by frequency mixing;
the second anti-aliasing filter unit is connected with the broadband quadrature IQ demodulation unit and is used for carrying out low-pass filtering on the demodulated Q-path signal and filtering an interference signal generated by frequency mixing;
the high-purity frequency synthesis local oscillator unit is connected with the broadband orthogonal IQ demodulation unit and is used for providing an ultralow phase noise local oscillator signal for the broadband orthogonal IQ demodulation unit and mixing the ultralow phase noise local oscillator signal with a broadband input signal;
the first digital gain amplification unit is connected with the first anti-aliasing filter unit and is used for carrying out dynamic gain amplification on the I-path signal after low-pass filtering so as to ensure that the amplitudes of the I-path signal and the Q-path signal are equal;
the second digital gain amplification unit is connected with the second anti-aliasing filter unit and is used for carrying out dynamic gain amplification on the Q-path signal after low-pass filtering so as to ensure that the amplitudes of the I-path signal and the Q-path signal are equal;
the first band-pass filter unit is connected with the first digital gain amplification unit and is used for performing band-pass filtering on the amplified I-path signal and filtering an interference signal in a path;
the second band-pass filter unit is connected with the second digital gain amplification unit and is used for performing band-pass filtering on the amplified Q-path signal and filtering an interference signal in a path;
and the first numerical control phase shifting unit is connected with the second band-pass filter unit and is used for carrying out numerical control phase shifting on the filtered Q-path signal and ensuring that the phase difference between the I-path signal and the Q-path signal is stabilized at 90 degrees.
The amplitude and phase detection unit is connected with the first numerical control phase shifting unit and the first band-pass filter unit and is used for comparing the amplitude and the phase of the signals of the I path and the Q path and measuring the difference value of the amplitude and the phase;
the second numerical control phase shifting unit is connected with the first numerical control phase shifting unit and is used for carrying out 90-degree numerical control phase shifting on the phase-shifted Q-path signal again so as to ensure that the receiver has better image rejection;
the first high-speed ADC unit is connected with the first band-pass filter unit and is used for carrying out analog-to-digital conversion on an input I path signal;
the second high-speed ADC unit is connected with the second digital control phase-shifting unit and is used for carrying out analog-to-digital conversion on the input Q-path signal;
and the high-performance DSP unit is connected with the first high-speed ADC unit and the second high-speed ADC unit and is used for performing FIR filtering, extraction, summation and FFT change on the converted I-path and Q-path signals to realize high-speed digital signal processing.
As the preferred embodiment of the utility model, the broadband quadrature IQ demodulation unit include 90 degrees phase shifters and mixers for the local oscillator signal carries out the mixing respectively after shifting the phase and realizes that I way and Q way export.
As the utility model discloses a preferred embodiment, high performance DSP unit include FIR wave filter, decimation filter, adder and FFT for carry out high-speed signal processing to the I way and the Q way signal of input, satisfy the analytic index of receiver high performance.
The utility model discloses an among the specific embodiment, provide one kind and satisfy high image rejection, range/phase balance, big bandwidth, high analytic index requirement, can wide application in the low intermediate frequency image rejection broadband receiver in each fields such as navigation, radar, communication, to broadband receiver performance requirement, utilize broadband quadrature demodulation, anti-aliasing filtering, dynamic gain to enlarge, numerical control phase shift, amplitude phase detection etc. to support low intermediate frequency scheme broadband receiver analytic performance.
As shown in fig. 1, a receiver apparatus for implementing a low-if image rejection broadband function based on digital control phase shifting includes a broadband quadrature IQ demodulation unit 1, a first anti-aliasing filter unit 2, a second anti-aliasing filter unit 3, a high-purity frequency synthesis local oscillator unit 4, a first digital gain amplification unit 5, a second digital gain amplification unit 6, a first bandpass filter unit 7, a second bandpass filter unit 8, a first digital control phase shifting unit 9, an amplitude-phase detection unit 10, a second digital control phase shifting unit 11, a first high-speed ADC unit 12, a second high-speed ADC unit 13, and a high-performance DSP unit 14, where the modules are connected in sequence.
A broadband quadrature IQ demodulation unit 1 configured to perform IQ quadrature demodulation on a broadband input signal and output I-path and Q-path signals;
the first anti-aliasing filter unit 2 is configured to perform low-pass filtering on the demodulated I-path signal and filter out an interference signal generated by frequency mixing;
the second anti-aliasing filter unit 3 is configured to perform low-pass filtering on the demodulated Q-path signal and filter out an interference signal generated by frequency mixing;
a high-purity frequency synthesis local oscillator unit 4 configured to provide an ultra-low phase noise local oscillator signal to the broadband quadrature IQ demodulation unit for mixing with the broadband input signal;
the first digital gain amplification unit 5 is configured to perform dynamic gain amplification on the I-path signal after the low-pass filtering, so as to ensure that the I-path signal and the Q-path signal have equal amplitudes;
the second digital gain amplification unit 6 is configured to perform dynamic gain amplification on the low-pass filtered Q-path signal, so as to ensure that the amplitudes of the I-path signal and the Q-path signal are equal;
the first band-pass filter unit 7 is configured to perform band-pass filtering on the amplified I-path signal and filter out an interference signal in a path;
the second band-pass filter unit 8 is configured to perform band-pass filtering on the amplified Q-path signal and filter out an interference signal in a path;
the first digital control phase shift unit 9 is configured to perform digital control phase shift on the filtered Q-path signal, and ensure that the phase difference between the I-path signal and the Q-path signal is stabilized at 90 °.
The amplitude and phase detection unit 10 is configured to compare the amplitude and the phase of the signals of the I path and the Q path, and measure the difference value of the amplitude and the phase;
the second numerical control phase shifting unit 11 is configured to perform 90-degree numerical control phase shifting on the phase-shifted Q-path signal again, so as to ensure that the receiver has better image rejection;
a first high-speed ADC unit 12 configured to perform analog-to-digital conversion on the input I-path signal;
a second high-speed ADC unit 13 configured to perform analog-to-digital conversion on the input Q-path signal;
and the high-performance DSP unit 14 is configured to perform FIR filtering, decimation, summation and FFT change on the converted I-path and Q-path signals, so as to realize high-speed digital signal processing.
The technical scheme of the utility model low intermediate frequency scheme of receiver system adopts broadband quadrature IQ demodulator to realize, exports low intermediate frequency broadband signal and utilizes numerical control to move unit, amplitude and phase monitoring unit with the IQ two way signals and carry out the phase place strict control, adds after getting into DSP and carries out the mirror image suppression.
The technical scheme of the utility model utilize the control numerical control to move the unit phase and carry out phase control, guarantee to export two way signal amplitude of IQ, phase requirement, can better restrain the mirror frequency after the stack.
The specific working method of the device is that a broadband signal is input into a broadband orthogonal IQ demodulation unit 1 and is subjected to broadband orthogonal frequency mixing with an ultralow phase noise local oscillation signal generated by a high-purity frequency synthesis local oscillation unit 4 to generate I path and Q path signal output, the I path signal is subjected to low-pass filtering by a first anti-aliasing filter unit 2 to filter an interference signal generated by the frequency mixing, the Q path signal is subjected to low-pass filtering by a second anti-aliasing filter unit 3 to filter an interference signal generated by the frequency mixing, the I path signal after the low-pass filtering enters a first digital gain amplification unit 5 to be subjected to dynamic gain amplification, the Q path signal after the low-pass filtering enters a second digital gain amplification unit 6 to be subjected to dynamic gain amplification, the I path and the Q path ensure that the amplitudes of the two paths of signals are equal through dynamic gain adjustment, the I path signal after the amplification enters a first band-pass filter unit 7 to be subjected to band-pass filtering, filtering interference signals in a channel, enabling amplified Q-path signals to enter a first band-pass filter unit 8 for band-pass filtering, filtering interference signals in the channel, enabling the Q-path signals after band-pass filtering to be subjected to numerical control phase shifting through a first numerical control phase shifting unit 9, then sending the I-path signals and the Q-path signals to an amplitude-phase detection unit 10 for amplitude and phase comparison to ensure that the I-path signals and the Q-path signals are equal in amplitude and stable in phase difference at 90 degrees, enabling the Q-path signals after phase shifting to be subjected to 90-degree numerical control phase shifting again through a second numerical control phase shifting unit 11 to ensure that the receiver has good image rejection, enabling the I-path signals to be subjected to digital-to-analog conversion through a first high-speed ADC unit 12, enabling the Q-path signals to be subjected to digital-to-analog conversion through a second high-speed ADC unit 13, enabling the I-path signals and Q-path signals after conversion to enter a high-performance DSP unit 14 for digital signal processing such as filtering, extraction, summation, FFT change and the like, finally, the receiver system for realizing the function of inhibiting the broadband by the low-intermediate frequency image based on the numerical control phase shift is realized, and the mobile communication test requirement is met.
For a specific implementation of this embodiment, reference may be made to the relevant description in the above embodiments, which is not described herein again.
It is understood that the same or similar parts in the above embodiments may be mutually referred to, and the same or similar parts in other embodiments may be referred to for the content which is not described in detail in some embodiments.
It should be noted that, in the description of the present invention, the terms "first", "second", etc. are used for descriptive purposes only and are not to be construed as indicating or implying relative importance. In addition, in the description of the present invention, "a plurality" means at least two unless otherwise specified.
Any process or method descriptions in flow charts or otherwise described herein may be understood as representing modules, segments, or portions of code which include one or more executable instructions for implementing specific logical functions or steps of the process, and the scope of the preferred embodiments of the present invention includes other implementations in which functions may be executed out of order from that shown or discussed, including substantially concurrently or in reverse order, depending on the functionality involved, as would be understood by those reasonably skilled in the art of the embodiments of the present invention.
It should be understood that portions of the present invention may be implemented in hardware, software, firmware, or a combination thereof. In the above embodiments, the various steps or methods may be implemented in software or firmware stored in a memory and executed by a suitable instruction execution device. For example, if implemented in hardware, as in another embodiment, any one or combination of the following techniques, which are known in the art, may be used: a discrete logic circuit having a logic gate circuit for implementing a logic function on a data signal, an application specific integrated circuit having an appropriate combinational logic gate circuit, a Programmable Gate Array (PGA), a Field Programmable Gate Array (FPGA), or the like.
It will be understood by those skilled in the art that all or part of the steps carried out in the method for implementing the above embodiment may be implemented by hardware related to instructions of a program, and the corresponding program may be stored in a computer readable storage medium, and when executed, the program includes one or a combination of the steps of the method embodiment.
In addition, each functional unit in the embodiments of the present invention may be integrated into one processing module, or each unit may exist alone physically, or two or more units are integrated into one module. The integrated module can be realized in a hardware mode, and can also be realized in a software functional module mode. The integrated module, if implemented in the form of a software functional module and sold or used as a separate product, may also be stored in a computer readable storage medium.
The storage medium mentioned above may be a read-only memory, a magnetic or optical disk, etc.
In the description herein, references to the description of the term "one embodiment," "some embodiments," "an example," "a specific example," or "some examples," etc., mean that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the invention. In this specification, the schematic representations of the terms used above do not necessarily refer to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.
Adopted the utility model discloses a receiver device based on numerical control is shifted realization low intermediate frequency image and is restrained broadband function satisfies high image and restrains, amplitude/phase balance, big bandwidth, high analytic index requirement, can the wide application in the low intermediate frequency image of each fields such as navigation, radar, communication and restrain the broadband receiver, to broadband receiver performance requirement, utilize broadband quadrature demodulation, anti-aliasing filtering, dynamic gain to enlarge, the numerical control is shifted the phase, amplitude phase detects etc. and support low intermediate frequency scheme broadband receiver analytic performance.
In this specification, the invention has been described with reference to specific embodiments thereof. It will, however, be evident that various modifications and changes may be made thereto without departing from the broader spirit and scope of the invention. The specification and drawings are, accordingly, to be regarded in an illustrative rather than a restrictive sense.
Claims (5)
1. A receiver device based on digital control phase shift to realize low intermediate frequency image rejection broadband function is characterized in that the device comprises:
the broadband orthogonal IQ demodulation unit is used for carrying out IQ orthogonal demodulation on a broadband input signal and outputting an I path signal and a Q path signal;
the first anti-aliasing filter unit is connected with the broadband quadrature IQ demodulation unit and is used for carrying out low-pass filtering on the demodulated I-path signal and filtering an interference signal generated by frequency mixing;
the second anti-aliasing filter unit is connected with the broadband quadrature IQ demodulation unit and is used for carrying out low-pass filtering on the demodulated Q-path signal and filtering an interference signal generated by frequency mixing;
the first digital gain amplification unit is connected with the first anti-aliasing filter unit and is used for carrying out dynamic gain amplification on the I-path signal after low-pass filtering so as to enable the I-path signal and the Q-path signal to be equal in amplitude;
the second digital gain amplification unit is connected with the second anti-aliasing filter unit and is used for carrying out dynamic gain amplification on the Q-path signal after low-pass filtering so as to enable the amplitude of the I-path signal to be equal to that of the Q-path signal;
the first band-pass filter unit is connected with the first digital gain amplification unit and is used for performing band-pass filtering on the amplified I-path signal and filtering an interference signal in a path;
the second band-pass filter unit is connected with the second digital gain amplification unit and is used for performing band-pass filtering on the amplified Q-path signal and filtering an interference signal in a path;
the first numerical control phase shifting unit is connected with the second band-pass filter unit and is used for carrying out numerical control phase shifting on the filtered Q-path signal;
the second numerical control phase shifting unit is connected with the first numerical control phase shifting unit and is used for carrying out 90-degree numerical control phase shifting on the phase-shifted Q-path signals again;
the first high-speed ADC unit is connected with the first band-pass filter unit and is used for carrying out analog-to-digital conversion on an input I path signal;
the second high-speed ADC unit is connected with the second digital control phase-shifting unit and is used for carrying out analog-to-digital conversion on the input Q-path signal;
and the high-performance DSP unit is connected with the first high-speed ADC unit and the second high-speed ADC unit and is used for performing FIR filtering, decimation, summation and FFT change on the converted I-path and Q-path signals.
2. The receiver apparatus for implementing a low if image rejection wideband function based on digitally controlled phase shifting as claimed in claim 1, further comprising a high purity frequency synthesis local oscillator unit connected to said wideband quadrature IQ demodulation unit for providing ultra low phase noise local oscillator signals to the wideband quadrature IQ demodulation unit for mixing with the wideband input signal.
3. The receiver device according to claim 1, further comprising an amplitude-phase detection unit connected to the first digitally controlled phase shift unit and the first band-pass filter unit, for comparing the amplitude and phase of the I-path signal and the Q-path signal, and measuring the amplitude and phase difference.
4. The receiver apparatus according to claim 1, wherein the wideband quadrature IQ demodulation unit comprises a 90 ° phase shifter and a mixer, an output of the 90 ° phase shifter is connected to the mixer, and the mixer is respectively connected to the first anti-aliasing filter unit and the second anti-aliasing filter unit, and configured to perform phase shifting on the local oscillator signal and then respectively perform frequency mixing to realize I-path and Q-path outputs.
5. The receiver device according to claim 1, wherein the high performance DSP unit comprises an FIR filter, a decimation filter, an adder, and an FFT processor, the FIR filter is respectively connected to the first high speed ADC unit and the second high speed ADC unit, the decimation filter is connected to the FIR filter, the adder is connected to the decimation filter, and the FFT processor is connected to the adder for performing high speed signal processing on the input I and Q signals.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202221718969.9U CN218124691U (en) | 2022-07-05 | 2022-07-05 | Receiver device for realizing low-intermediate frequency image rejection broadband function based on numerical control phase shift |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202221718969.9U CN218124691U (en) | 2022-07-05 | 2022-07-05 | Receiver device for realizing low-intermediate frequency image rejection broadband function based on numerical control phase shift |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN218124691U true CN218124691U (en) | 2022-12-23 |
Family
ID=84516369
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202221718969.9U Active CN218124691U (en) | 2022-07-05 | 2022-07-05 | Receiver device for realizing low-intermediate frequency image rejection broadband function based on numerical control phase shift |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN218124691U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114978212A (en) * | 2022-07-05 | 2022-08-30 | 创远信科(上海)技术股份有限公司 | Receiver system for realizing low-intermediate frequency image rejection broadband function based on numerical control phase shift |
-
2022
- 2022-07-05 CN CN202221718969.9U patent/CN218124691U/en active Active
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114978212A (en) * | 2022-07-05 | 2022-08-30 | 创远信科(上海)技术股份有限公司 | Receiver system for realizing low-intermediate frequency image rejection broadband function based on numerical control phase shift |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN218124691U (en) | Receiver device for realizing low-intermediate frequency image rejection broadband function based on numerical control phase shift | |
| JPH0797779B2 (en) | 90 degree phase shifter and data receiver | |
| KR20020072986A (en) | Image rejection mixer | |
| US5128966A (en) | System for demodulating frequency- or phase-modulated signals by quadrature-phase | |
| WO2012032936A1 (en) | Signal processing circuit, signal processing method and control program recording medium | |
| CN113055102A (en) | Receiver and method for ultrahigh frequency partial discharge detection | |
| US7046979B2 (en) | Receiver for rejecting image signal | |
| FI87960C (en) | FREKVENSSKILLNADSDETEKTOR (FDD) OCH EN BAERVAOGSMODULERAD MOTTAGARE INNEHAOLLANDE EN DYLIK FDD | |
| JPH08288746A (en) | Frequency modulation signal demodulating circuit and communication terminal equipment | |
| US6356747B1 (en) | Intermediary low-frequency frequency-conversion radiofrequency reception | |
| CN105871336B (en) | System and method for low pass filter mismatch calibration | |
| CN113671447B (en) | Six-port self-injection locking radar | |
| CN110535575B (en) | Method for calculating and compensating I/Q signal linear phase imbalance | |
| US7751303B2 (en) | Demodulation circuit for use in receiver using if directing sampling scheme | |
| CN114978212A (en) | Receiver system for realizing low-intermediate frequency image rejection broadband function based on numerical control phase shift | |
| US5586147A (en) | Demodulation method using quadrature modulation | |
| KR100994581B1 (en) | Direct downconversion receiver | |
| JPH0983595A (en) | Direct conversion receiver | |
| JP2003527795A (en) | Angle modulation signal receiving device | |
| WO2022054398A1 (en) | Receiver | |
| JP6570798B2 (en) | Receiving machine | |
| JPH09168037A (en) | Direct conversion receiver | |
| US7336717B2 (en) | Receiver circuit, in particular for a mobile radio | |
| CN213990681U (en) | Radio frequency test circuit based on zero frequency direct conversion | |
| EP4391395A1 (en) | Method for demodulating a rf signal |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| GR01 | Patent grant | ||
| GR01 | Patent grant |