CN218104929U - Constant power control circuit and electronic atomization device - Google Patents

Constant power control circuit and electronic atomization device Download PDF

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Publication number
CN218104929U
CN218104929U CN202221764468.4U CN202221764468U CN218104929U CN 218104929 U CN218104929 U CN 218104929U CN 202221764468 U CN202221764468 U CN 202221764468U CN 218104929 U CN218104929 U CN 218104929U
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power
electrically connected
current
unit
voltage
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宋朋亮
贺玉婷
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Xi'an Wenxian Semiconductor Technology Co ltd
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Xi'an Wenxian Semiconductor Technology Co ltd
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Abstract

The application provides a constant power control circuit, includes: the power supply end, the power grounding end, the atomization end and the power NMOS tube are connected in series; the voltage sampling unit is used for obtaining a first sampling voltage representing the voltage on the heating element; the current sampling unit is used for obtaining a second sampling voltage representing the current on the power NMOS tube; a multiplier for multiplying the first sampled voltage and the second sampled voltage to obtain a current power value representing the power of a heating element; the input end of the power adjusting unit is electrically connected with the multiplier, the input end of the power adjusting unit also receives a preset power value, the output end of the power adjusting unit is electrically connected with the control end of the power NMOS tube, the power adjusting unit outputs a square wave signal to the power NMOS tube, and the power adjusting unit adjusts the duty ratio of the square wave signal according to the current power value and the preset power value, so that the average power value output by the heating element is constant. The embodiment of the application further provides an electronic atomization device.

Description

Constant power control circuit and electronic atomization device
Technical Field
The application relates to the technical field of electronic atomization, in particular to a constant power control circuit and an electronic atomization device.
Background
The electronic cigarette is an electronic device for simulating cigarettes, and replaces the traditional cigarettes by simulating the taste and smoke of real cigarettes, so that the expenditure of consumers is saved, and the harm caused by 'second-hand smoking' is reduced.
At present, an electronic cigarette comprises a battery, a power NMOS tube and a heating wire, wherein the power NMOS tube and the heating wire are connected in series to form a series circuit, and the series circuit is electrically connected with the battery. Most of common electronic cigarettes in the market are constant-power output, and the principle is as follows: the voltage of the electronic cigarette battery is sampled, the current flowing through the heating wire is sampled and multiplied to obtain the current output power, the current output power is compared with the preset reference power to adjust the size of a square wave signal, the square wave signal is used for controlling whether the power NMOS tube is conducted or not, and the conduction time lengths of the square wave signal different power NMOS tubes are different. As the voltage of the battery is gradually reduced during use, the square wave signal is gradually increased to achieve a constant power output.
The inventor finds that, through long-term research, the constant power control is the collected battery voltage, the voltage on the heating wire is not collected, and the voltage on the heating wire is smaller than the battery voltage, so that the actual output power is smaller than the desired power, the smoke output is smaller, and the user experience is poor.
SUMMERY OF THE UTILITY MODEL
The technical problem to be solved by the embodiments of the present application is to provide a constant power control circuit and an electronic atomization device. Can realize accurate constant power output and has lower cost.
In order to solve the above technical problem, a first aspect of the embodiments of the present application provides a constant power control circuit, including:
the power supply end and the power grounding end are used for being correspondingly and electrically connected with the positive pole and the negative pole of the power supply, and the power supply end is also used for being electrically connected with the first end of the heating element;
the atomizing end is electrically connected with the second end of the heating element;
the drain electrode of the power NMOS tube is electrically connected with the atomization end, and the source electrode of the power NMOS tube is electrically connected with the power grounding end;
the voltage sampling unit is respectively electrically connected with the power supply end and the atomization end and is used for obtaining a first sampling voltage representing the voltage on the heating element;
the current sampling unit is respectively and electrically connected with the atomization end, the power supply grounding end and the control end of the power NMOS tube, and is used for obtaining a second sampling voltage representing the current on the power NMOS tube;
the multiplier is electrically connected with the voltage sampling unit and the current sampling unit and is used for multiplying the first sampling voltage and the second sampling voltage to obtain a current power value representing the power of a heating element;
the input end of the power adjusting unit is electrically connected with the multiplier, the input end of the power adjusting unit also receives a preset power value, the output end of the power adjusting unit is electrically connected with the control end of the power NMOS tube, the power adjusting unit outputs a square wave signal to the power NMOS tube, and the power adjusting unit adjusts the duty ratio of the square wave signal according to the current power value and the preset power value so as to enable the average power value output by the heating element to be constant.
Optionally, the average power value is equal to a product of the current power value and a duty cycle of the square wave signal.
Optionally, the average power value is equal to the preset power value.
Optionally, the voltage sampling unit includes a subtractor, the subtractor is electrically connected to the power supply terminal and the atomization terminal, and the subtractor is configured to subtract the voltage at the power supply terminal from the voltage at the atomization terminal to obtain a first sampling voltage.
Optionally, the current sampling unit includes a first current proportion unit and a second current proportion unit, where a current flowing through the first current proportion unit is proportional to a current flowing through the power NMOS transistor, and a current flowing through the second current proportion unit is proportional to a current flowing through the first current proportion unit.
Optionally, the first current proportioning unit includes a first NMOS transistor, a second NMOS transistor, a first PMOS transistor, and a first operational amplifier, and the second current proportioning unit includes a second PMOS transistor and a first resistor, wherein a source of the first NMOS transistor is electrically connected to a power ground terminal, a drain of the first NMOS transistor is electrically connected to a source of the second NMOS transistor and a reverse terminal of the first operational amplifier, respectively, a control terminal of the first NMOS transistor is electrically connected to a control terminal of the power NMOS transistor, a control terminal of the second NMOS transistor is electrically connected to an output terminal of the first operational amplifier, a drain of the second NMOS transistor is electrically connected to a drain of the first PMOS transistor, a control terminal of the first PMOS transistor is electrically connected to a drain of the first PMOS transistor, a source of the first PMOS transistor is electrically connected to a power supply terminal, a source of the second PMOS transistor is electrically connected to a power supply terminal, a control terminal of the second PMOS transistor is electrically connected to a control terminal of the first PMOS transistor, a drain of the second PMOS transistor is electrically connected to a first terminal of the first resistor, a second terminal of the first resistor is electrically connected to a first ground terminal of the first operational amplifier, and a sampling resistor is electrically connected to a first operational amplifier, and a second operational amplifier; alternatively, the first and second electrodes may be,
the first current proportion unit comprises a first NMOS (N-channel metal oxide semiconductor) tube, a third PMOS (P-channel metal oxide semiconductor) tube, a first PMOS tube and a first operational amplifier, the second current proportion unit comprises a second PMOS tube and a first resistor, wherein a source electrode of the first NMOS tube is electrically connected with a power grounding end, a drain electrode of the first NMOS tube is respectively electrically connected with a drain electrode of the third PMOS tube and a syntropy end of the first operational amplifier, a control end of the first PMOS tube is electrically connected with a control end of the power NMOS tube, a control end of the third PMOS tube is electrically connected with an output end of the first operational amplifier, a source electrode of the third PMOS tube is electrically connected with a drain electrode of the first PMOS tube, a control end of the first PMOS tube is electrically connected with a drain electrode of the first PMOS tube, a source electrode of the first PMOS tube is electrically connected with a power supply end, a source electrode of the second PMOS tube is electrically connected with the power supply end, a control end of the second PMOS tube is electrically connected with a control end of the first PMOS tube, a drain electrode of the second PMOS tube is electrically connected with a first end of the first resistor, a second end of the first PMOS tube is electrically connected with a power supply end of the first operational amplifier, a first operational amplifier is electrically connected with a reverse sampling resistor, and a first operational amplifier is used for atomizing output voltage, and a reverse sampling output end of the first operational amplifier.
Optionally, the first NMOS transistor and the power NMOS transistor are manufactured through the same process, the first PMOS transistor and the second PMOS transistor are manufactured through the same process, a ratio of a current in the first NMOS transistor to a current in the power NMOS transistor is equal to a ratio of a channel width-length ratio of the first NMOS transistor to the channel width-length ratio of the second PMOS transistor, a ratio of a current in the first PMOS transistor to a current in the second PMOS transistor is equal to a ratio of a channel width-length ratio of the first PMOS transistor to the channel width-length ratio of the second PMOS transistor, and a current in the first PMOS transistor is equal to a current in the first NMOS transistor.
Optionally, the constant power control circuit is located on the same chip, the power supply end is a power supply pin, the power ground end is a power ground pin, and the atomization end is an atomization pin; alternatively, the first and second electrodes may be,
the power NMOS tube and the first NMOS tube of the current sampling unit are positioned on the same chip, the circuits of the constant power control circuit except the power NMOS tube and the first NMOS tube of the current sampling unit are positioned on the other chip, the power supply end is a power supply pin, the power grounding end is a power grounding pin, and the atomization end is an atomization pin; alternatively, the first and second electrodes may be,
the power regulating unit outputs a square wave signal through a PWM mode or a PFM mode.
Optionally, the constant power control circuit further includes a suction detection unit, the suction detection unit is used for being electrically connected with the airflow sensor, the suction detection unit is used for controlling whether the power regulation unit, the voltage sampling unit, the current sampling unit and the multiplier work, when the suction detection unit detects that a user sucks the electronic atomization device, the suction detection unit judges that the electronic atomization device is in a suction state, the suction detection unit controls the power regulation unit, the voltage sampling unit, the current sampling unit and the multiplier to work, the power regulation unit outputs the square wave signal to the control end of the power NMOS tube, when the suction detection unit does not detect that the user sucks the electronic atomization device, the suction detection unit judges that the electronic atomization device is in a non-suction state, the suction detection unit controls the power regulation unit, the voltage sampling unit, the current sampling unit and the multiplier to stop working, and the power NMOS tube is normally cut off.
In a second aspect, an electronic atomization device includes
The above-described constant power control circuit;
the positive pole and the negative pole of the power supply are correspondingly and electrically connected with the power supply end and the power grounding end of the constant power control circuit;
and the first end of the heating element is electrically connected with the power supply end of the power supply, and the second end of the heating element is electrically connected with the atomization end.
The system control circuit provided by the embodiment of the application comprises a power NMOS tube, wherein a source electrode of the power NMOS tube is electrically connected with a power supply grounding end, and a drain electrode of the power NMOS tube is electrically connected with an atomization end; in addition, the voltage sampling unit is used for directly collecting the voltage on the heating element, and the voltage on the heating element is not indirectly represented by the voltage of the power supply end, so that the voltage drop when the power NMOS tube is conducted is considered in the sampling, the sampling is more accurate, the current power value obtained through the multiplier is more accurate, the actual power on the heating element can be more accurately expressed, and the user experience is better.
Drawings
In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings used in the embodiments or the prior art descriptions will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present application, and other drawings can be obtained by those skilled in the art without creative efforts.
Fig. 1 is a circuit block diagram of an electronic atomizer according to an embodiment of the present application;
FIG. 2 is a circuit block diagram of a constant power control circuit according to an embodiment of the present application;
FIG. 3 is a circuit block diagram of a constant power control circuit according to another embodiment of the present application;
fig. 4 is a circuit diagram of the output power adjustment unit connected to the multiplier and the power NMOS transistor according to an embodiment of the present application;
reference numerals:
110-a power supply; 130-a heating element; 140-an airflow sensor; 200-a constant power control circuit; 210-a voltage sampling unit; 220-a multiplier; 230-a power conditioning unit; 231-a drive unit;
BAT-power supply terminal/pin; GND-power ground/pin; AT-atomizing terminal/pin; SW-airflow detection pin; NM 0-power NMOS transistor; NM 1-first NMOS transistor; NM 2-second NMOS tube; PM 1-first PMOS tube; PM 2-second PMOS tube; PM 3-third PMOS tube; PM 4-fourth PMOS tube; PM 5-fifth PMOS tube; PM 6-sixth PMOS tube; PM 7-seventh PMOS tube; r1-a first resistance; r2-a second resistor; r3-a third resistor; OP 1-first operational amplifier; OP 2-second operational amplifier; OP 3-third operational amplifier; c1-a first capacitor; c2-a second capacitor; comp 1-first comparator; comp 2-second comparator; a TR-SR flip-flop; vref-reference voltage; k2-a second switch; k3-third switch; k4-a fourth switch; k5-a fifth switch; vvsen — first sample voltage; visen — second sample voltage.
Detailed Description
The technical solutions in the embodiments of the present application will be described clearly and completely with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only some embodiments of the present application, and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
The terms "comprising" and "having," and any variations thereof, as appearing in the specification, claims and drawings of this application, are intended to cover non-exclusive inclusions. For example, a process, method, system, article, or apparatus that comprises a list of steps or modules is not limited to only those steps or elements but may alternatively include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus. Furthermore, the terms "first," "second," and "third," etc. are used to distinguish between different objects and are not used to describe a particular order. The electrical connection includes a direct electrical connection and an indirect electrical connection, and the indirect electrical connection means that other electronic components, pins and the like can exist between two electrically connected components. The terminal XX referred to in this application may or may not be an actual terminal, such as only one terminal of a component or one terminal of a wire. Three cases are mentioned and/or included in the present application, for example, a and/or B, including three cases a, B, a and B.
The embodiment of the application provides an electronic atomization device, for example, the electronic atomization device is an electronic cigarette, and the electronic atomization device can also be used for beauty treatment, medical treatment and the like. Referring to fig. 1, the electronic atomizer includes a power supply 110, a constant power control circuit 200, a heating element 130, an airflow sensor 140, and the like. The constant power control circuit 200 is electrically connected to the power supply 110, the heating element 130, the airflow sensor 140, and the like. In the present embodiment, the power source 110 includes a battery cell, for example, a lithium battery cell, a nickel cadmium battery cell, a nickel hydrogen battery cell, and other rechargeable battery cells, the airflow sensor 140 is, for example, a MEMS sensor or a microphone, and the heating element 130 is, for example, a heating wire, a ceramic seat containing the heating wire or the heating wire, or other conventional heating elements 130.
Referring to fig. 1 and fig. 2, in the present embodiment, the constant power control circuit 200 includes a power supply terminal BAT, a power ground terminal GND, an atomization terminal AT, a power NMOS transistor NM0, a voltage sampling unit 210, a current sampling unit, a multiplier 220, and a power adjusting unit 230.
Specifically, in the present embodiment, the power supply terminal BAT is electrically connected to the positive electrode of the power supply 110 and the first terminal of the heating element 130, respectively, and the power ground terminal GND is electrically connected to the negative electrode of the power supply 110, so that the constant power control circuit 200 can be connected to the power supply 110, and the power supply 110 can supply power to the constant power control circuit 200. The atomization end AT is electrically connected to the second end of the heating element 130.
In this embodiment, the drain of the power NMOS NM0 is also electrically connected to the atomization end AT, the source of the power NMOS NM0 is electrically connected to the power ground GND for electrically connecting to the negative electrode of the power source 110, the control end of the power NMOS NM0 is electrically connected to the power adjustment unit 230, the power adjustment unit 230 controls whether the power NMOS NM0 is turned on, the power NMOS NM0 is connected in series with the heating element 130, and when the power NMOS NM0 is turned on, the current flowing through the power NMOS NM0 is equal to the current flowing through the heating element 130. In this embodiment, when the power adjusting unit 230 controls the power NMOS tube NM0 to be turned on, the power supply 110, the heating element 130, and the power NMOS tube NM0 form a discharge circuit, the heating element 130 heats the liquid in the electronic atomization apparatus, such as smoke, so that the liquid is atomized for the user to suck; when the power adjusting unit 230 controls the power NMOS transistor NM0 to be turned off, the heating element 130 stops heating, and the heating element 130 does not atomize the liquid in the electronic atomizer.
Referring to fig. 2, in the present embodiment, the voltage sampling unit 210 is electrically connected to the power supply terminal BAT and the atomization terminal AT, respectively, and when the power NMOS tube NM0 is turned on, the voltage sampling unit 210 is configured to obtain a first sampling voltage Vvsen representing a voltage across the heating element 130, where the first sampling voltage Vvsen is proportional to the voltage across the heating element 130, that is, the first sampling voltage Vvsen is equal to j times the voltage across the heating element 130, j is a positive number less than or equal to 1, for example, j is 1, 0.9, 0.8, 0.7, and the like, and in the present embodiment, the first sampling voltage Vvsen is the voltage across the heating element 130, and j is 1. Specifically, in this embodiment, the voltage sampling unit 210 includes a subtractor, and the subtractor respectively obtains the voltage of the power supply terminal BAT and the voltage of the atomization terminal AT, and then subtracts the voltage of the atomization terminal AT from the voltage of the power supply terminal BAT, so as to obtain the first sampling voltage Vvsen. However, the present application is not limited to this, and in other embodiments of the present application, the voltage of the atomization terminal AT may be subtracted from the voltage of the power supply terminal BAT, and the obtained result is processed by resistance voltage division to obtain the first sampling voltage Vvsen, where the first sampling voltage Vvsen is smaller than the voltage on the heating element 130, which is beneficial to simplify the selection of the circuit and the subsequent reference voltage Vref. Since the subtracter is a conventional circuit, it is not described herein again.
In this embodiment, the current sampling unit is electrically connected to the atomization terminal AT, the power ground terminal GND, and the control terminal of the power NMOS NM0, and the current sampling unit is configured to obtain a second sampling voltage Visen representing a current flowing through the heating element 130 when the power NMOS NM0 is turned on. In this embodiment, the current sampling unit collects a second sampling voltage Visen representing a current flowing through the power NMOS transistor NM0, and since the power NMOS transistor NM0 is connected in series with the heating element 130, a current flowing through the power NMOS transistor NM0 is equal to a current flowing through the heating element 130, so that the second sampling voltage Visen also represents a current flowing through the heating element 130.
In this embodiment, the current sampling unit includes a first current proportion unit and a second current proportion unit. The current flowing through the first current proportion unit is proportional to the current on the power NMOS tube NM0, the ratio is a fixed value, the current flowing through the second current proportion unit is proportional to the current flowing through the first current proportion unit, and the ratio is also a fixed value.
In this embodiment, the first current proportion unit includes a first NMOS transistor NM1, a second NMOS transistor NM2, a first PMOS transistor PM1, and a first operational amplifier OP1, and the second current proportion unit includes a second PMOS transistor PM2 and a first resistor R1. The source electrode of the first NMOS tube NM1 is electrically connected with a power ground terminal GND, the drain electrode of the first NMOS tube NM1 is respectively electrically connected with the source electrode of the second NMOS tube NM2 and the reverse terminal of the first operational amplifier OP1, the control terminal of the first NMOS tube NM1 is electrically connected with the control terminal of the power NMOS tube NM0, the control terminal of the second NMOS tube NM2 is electrically connected with the output terminal of the first operational amplifier OP1, the drain electrode of the second NMOS tube NM2 is electrically connected with the drain electrode of the first PMOS tube PM1, the control terminal of the first PMOS tube PM1 is electrically connected with the drain electrode of the first PMOS tube PM1, the source electrode of the first PMOS tube PM1 is electrically connected with the power supply terminal BAT, the source electrode of the second PMOS tube PM2 is electrically connected with the power supply terminal BAT, the control terminal of the second PMOS tube PM2 is electrically connected with the control terminal of the first PMOS tube PM1, the drain electrode of the second PMOS tube PM2 is electrically connected with the first terminal of the first resistor R1, the second terminal of the first NMOS resistor NM R1 is electrically connected with the power supply terminal of the power supply terminal OP1, the first operational amplifier OP1, and the drain electrode of the sampling resistor AT 1 is used for atomizing output voltage to be equal to the first operational amplifier AT output voltage. Therefore, the voltages of the source, the drain and the control end of the first NMOS transistor NM1 and the power NMOS transistor NM0 are all equal, so that the current flowing through the first NMOS transistor NM1 is proportional to the current flowing through the power NMOS transistor NM0, and specifically, the ratio of the current flowing through the first NMOS transistor NM1 to the current flowing through the power NMOS transistor NM0 is equal to the ratio of the channel width-length ratio of the first NMOS transistor NM1 to the channel width-length ratio of the power NMOS transistor NM0, and the ratio is generally smaller than 1, and is determined after the first NMOS transistor NM1 and the power NMOS transistor NM0 are manufactured. The first PMOS transistor PM1 is connected in series with the first NMOS transistor NM1, so that the current flowing through the first PMOS transistor PM1 is equal to the current flowing through the first NMOS transistor NM1, and the voltage of the source and the voltage of the control end of the second PMOS transistor PM2 are respectively equal to the voltage of the source and the voltage of the control end of the first PMOS transistor PM1, so that the current flowing through the second PMOS transistor PM2 is proportional to the current flowing through the first PMOS transistor PM1, specifically, the ratio of the current flowing through the second PMOS transistor PM2 to the current flowing through the first PMOS transistor PM1 is equal to the ratio of the channel width-length ratio of the second PMOS transistor PM2 to the channel width-length ratio of the first PMOS transistor PM1, which is generally equal to 1, and the current flowing through the second PMOS transistor PM2 is generally equal to the current flowing through the first PMOS transistor PM1, so that the ratio of the current flowing through the second PMOS transistor PM2 to the current flowing through the power NMOS transistor NM0 can be clearly known. In this embodiment, the first NMOS transistor NM1 and the power NMOS transistor NM0 operate in the variable resistance region, and the first PMOS transistor PM1 and the second PMOS transistor PM2 operate in the saturation region. In this embodiment, since the voltage at the first end of the first resistor R1 is easily obtained, and the voltage at the first end of the first resistor R1 is equal to the product of the resistance of the first resistor R1 and the current flowing through the second PMOS transistor PM2, since the resistance of the first resistor R1 is a fixed value, the voltage at the first end of the first resistor R1 is directly proportional to the current flowing through the second PMOS transistor PM2, and the voltage at the first end of the first resistor R1 can represent the current flowing through the power NMOS transistor NM0, and the voltage at the first end of the first resistor R1 is the second sampling voltage Visen. The current sampling circuit of the power NMOS tube NM0 is simple and accurate in sampling. In addition, in other embodiments of the present application, in order to make the currents of the first PMOS transistor PM1 and the second PMOS transistor PM2 more accurate and proportional and make the current error between the two smaller, the second current proportional unit may further add other elements to improve the accuracy.
In addition, referring to fig. 3 in another embodiment of the present application, in the present embodiment, the first current proportioning unit includes a first NMOS transistor NM1, a third PMOS transistor PM3, a first PMOS transistor PM1, and a first operational amplifier OP1, wherein a source of the first NMOS transistor NM1 is electrically connected to a power ground GND, a drain of the first NMOS transistor NM1 is electrically connected to a drain of the third PMOS transistor PM3 and a same-direction terminal of the first operational amplifier OP1, a control terminal of the first NMOS transistor PM1 is electrically connected to a control terminal of the power NMOS transistor NM0, a control terminal of the third PMOS transistor PM3 is electrically connected to an output terminal of the first operational amplifier OP1, a source of the third PMOS transistor PM3 is electrically connected to a drain of the first PMOS transistor PM1, a control terminal of the first PMOS transistor PM1 is electrically connected to a drain of the first PMOS transistor PM1, a source of the first PMOS transistor PM1 is electrically connected to a power supply terminal BAT, and an opposite terminal of the first operational amplifier OP1 is electrically connected to an atomization terminal AT. The second current ratio unit is the same as that shown in fig. 2, and is not described herein again.
In this embodiment, the first NMOS transistor NM1 and the power NMOS transistor NM0 are manufactured through the same process, the first PMOS transistor PM1 and the second PMOS transistor PM2 are manufactured through the same process, for example, through a low voltage process lower than 6V, a ratio of a width-to-length ratio of a channel of the first NMOS transistor NM1 to a width-to-length ratio of a channel of the power NMOS transistor NM0 is generally smaller than 1, for example, 0.5, 0.3, 0.1, and the like, a ratio of a width-to-length ratio of a channel of the second PMOS transistor PM2 to a width-to-length ratio of a channel of the first PMOS transistor PM1 may be greater than 1, smaller than 1, or equal to 1, and in this embodiment, 1 is taken as an example for description.
In this embodiment, the multiplier 220 is electrically connected to the voltage sampling unit 210 and the current sampling unit, and the multiplier 220 is configured to receive the first sampling voltage Vvsen and the second sampling voltage Visen and multiply the two to obtain a current power value representing the actual power of the heating element 130, where in this embodiment, the current power value may be equal to the actual power of the heating element 130, or may be smaller than or larger than the actual power of the heating element 130.
In this embodiment, the input end of the power adjusting unit 230 is electrically connected to the multiplier 220, the input end of the power adjusting unit 230 further receives a preset power value, which may be the same input end of the power adjusting unit 230, and at this time, the input end is time-shared, or may be two different input ends, the output end of the power adjusting unit 230 is electrically connected to the control end of the power NMOS tube NM0, the power adjusting unit 230 outputs a square wave signal to the power NMOS tube NM0, when the square wave signal is at a high level, the power NMOS tube NM0 is turned on, the heating element 130 is operated to generate heat, when the power NMOS tube NM0 is turned off and turned off at a low level, the heating element 130 does not operate to generate heat, and the on duration of the power NMOS tube NM0 in a period of the square wave signal is adjusted by adjusting the duty ratio of the square wave signal, so as to adjust the average power value of the heating element 130. In this embodiment, the power adjusting unit 230 adjusts the duty ratio of the square wave signal according to the current power value and the preset power value, so that the average power value output by the heating element 130 is constant. For example, when the voltage ratio of the power supply terminal BAT is high, the current power value is high, and the preset power value is a fixed value, in order to achieve constant output of the average power value, for example, the average power value is equal to k times of the preset power value, k may be a positive number greater than 1, or may be a positive number less than or equal to 1, and the duty ratio of the square wave signal is automatically reduced; when the voltage of the power supply terminal BAT is lower, the current power value is lower at this time, and the preset power value is determined, in order to achieve that the average power value is output constantly, for example, the average power value is equal to k times of the preset power value, the duty ratio of the square wave signal is automatically increased, through automatic adjustment, the output average power value is finally achieved constantly and is equal to k times of the preset power value, so that the output power of the electronic atomization device is constant, for example, the smoke output size of the electronic cigarette can be consistent, the smoke output size cannot be changed along with the change of the power supply 110 of the electronic cigarette, and the user experience is improved. In this embodiment, the final output average power value may be equal to the preset power value, or may not be equal to the preset power value, and the two may be proportional, for example, a ratio k of the average power value to the preset power value may be 1, 1: 2. 2, 1.
In this embodiment, the constant power control circuit 200 includes a power NMOS transistor NM0, a source of the power NMOS transistor NM0 is electrically connected to a power ground GND, a drain of the power NMOS transistor NM0 is electrically connected to an atomization terminal AT, and since the cost of the power NMOS transistor NM0 is lower than that of the power PMOS transistor, the cost can be reduced, and the area of the power NMOS transistor NM0 is smaller than that of the power PMOS transistor; in addition, in this embodiment, the voltage sampling unit 210 is configured to directly collect the voltage on the heating element 130, instead of indirectly representing the voltage on the heating element 130 by using the voltage of the power supply terminal BAT, so that the voltage drop when the power NMOS transistor NM0 is turned on is considered in the sampling, the sampling is more accurate, the current power value obtained by the multiplier 220 is more accurate, and the actual power on the heating element 130 can be more expressed, thereby improving the user experience.
In the present embodiment, the constant power control circuit 200 further includes a suction detection unit (not shown in the figure) electrically connected to the airflow sensor 140. The pumping detection unit is also used for controlling whether the power regulation unit 230, the voltage sampling unit 210, the current sampling unit and the multiplier 220 work or not. When the suction detection unit detects that a user sucks the electronic atomization device, the suction detection unit judges that the electronic atomization device is in a suction state, the suction detection unit controls the power regulation unit 230, the voltage sampling unit 210, the current sampling unit, the multiplier 220 and the like to work, and the power regulation unit 230 outputs a square wave signal to the control end of the power NMOS tube NM 0; when the suction detection unit does not detect that the user sucks the electronic atomization device, the suction detection unit judges that the electronic atomization device is in a non-suction state, the suction detection unit controls the power regulation unit 230, the voltage sampling unit 210, the current sampling unit, the multiplier 220 and the like to stop working, and then the power NMOS tube NM0 is normally cut off. In this embodiment, the square wave signal includes a periodic low level and a periodic high level, and when the square wave signal is at the high level, the power NMOS transistor NM0 is turned on, and the heating element 130 generates heat; when the square wave signal is at a low level, the power NMOS transistor NM0 is turned off, and the heating element 130 stops operating and stops heating.
In an embodiment, the power adjusting unit 230 outputs a square wave signal through a PWM (pulse width modulation) mode to control whether the power NMOS transistor NM0 is turned on, where the PWM mode is a mode in which a frequency (period) is constant, an on-time (corresponding to a high-level time of the square wave signal) and an off-time (corresponding to a low-level time of the square wave signal) of the power NMOS transistor NM0 are adjustable, and the on-time and the off-time constitute a signal period, and in this mode, the power NMOS transistor NM0 is turned on during the on-time in a signal period, and the power NMOS transistor NM0 is turned off during the off-time. In addition, in other embodiments of the present application, the system control unit may further output a square wave signal through a PFM (pulse frequency modulation) mode to control whether the power NMOS tube NM0 is turned on, the PFM mode is a mode in which a frequency (period) is adjustable, an on-time (corresponding to a high level time of the square wave signal) or an off-time (corresponding to a low level time of the square wave signal) of the power NMOS tube NM0 is unchanged, and in this mode, the power NMOS tube NM0 is turned on during an on-time of a signal period and turned off during an off-time of the signal period. When the electronic atomization device is in the non-suction state, the power adjustment unit 230 stops driving the power NMOS tube NM0 at this time, the power NMOS tube NM0 is kept normally off, the power NMOS tube NM0 does not work at this time, and the non-suction state is not used for calculating the power on the heating element 130. In the present embodiment, the power adjusting unit 230 continues to output the high level for the on-time, and the power adjusting unit 230 continues to output the low level for the off-time.
In this embodiment, a specific circuit of the power adjusting unit 230 can be seen in fig. 4, the second operational amplifier OP2, the fourth PMOS transistor PM4, the second resistor R2, the fifth PMOS transistor PM5, the second switch K2, the third switch K3, the first capacitor C1, the first comparator Comp1 (one of the input terminals is connected to the reference voltage Vref), and the SR flip-flop TR are used for controlling the on-time of the square wave signal in one period, i.e., controlling the Ton duration of the duty ratio, the third operational amplifier OP3, the sixth PMOS transistor PM6, the third resistor R3, the seventh PMOS transistor PM7, the fourth switch K4, the fifth switch K5, the second capacitor C2, the second comparator Comp2, and the SR flip-flop TR are used for controlling the period of the duty ratio, i.e., controlling the period T duration of the duty ratio (the period T is equal to the sum of the on-time Ton and the off-time Toff, and the duty ratio is equal to Ton/T), and specific electrical connection relationships are not repeated in fig. 4. In this embodiment, the amplification factors of the second operational amplifier OP2 and the third operational amplifier OP3 are equal, the second resistor R2 and the third resistor R3 are equal, the first capacitor C1 and the second capacitor C2 are equal, the ratio of the aspect ratio of the channel of the fourth PMOS transistor PM4 to the aspect ratio of the channel of the fifth PMOS transistor PM5, and the ratio of the aspect ratio of the channel of the sixth PMOS transistor PM6 to the aspect ratio of the channel of the seventh PMOS transistor PM7 are equal, the second switch K2 and the fourth switch K4 are simultaneously turned on and simultaneously turned off, the third switch K3 and the fifth switch K5 are simultaneously turned on and simultaneously turned off, the second switch K2 and the fourth switch K4 are not simultaneously turned on with the third switch K3 and the fifth switch K5, the SR flip-flop TR outputs a square wave signal, and then outputs the square wave signal to the control terminal of the power NMOS transistor NM0 through the driving unit 231. In addition, in other embodiments of the present application, a person skilled in the art may also use other conventional circuits to implement the function of the power adjusting unit 230 to generate the square wave signal, and details thereof are not described herein.
In this embodiment, please refer to fig. 1 and fig. 2 in combination, the constant power control circuit 200 is located on a same chip, which is called a constant power control chip, the power supply terminal BAT is a power supply pin BAT, the power ground terminal GND is a power ground pin GND, and the atomization terminal AT is an atomization pin AT. In this embodiment, the constant power control chip further includes an airflow detection pin SW, the airflow detection pin SW is electrically connected to the airflow sensor 140, the airflow sensor 140 is, for example, a capacitive microphone, a switching microphone, an MEMS sensor, etc., the airflow detection pin SW is further electrically connected to the suction detection unit, and the suction detection unit and the airflow sensor 140 can detect whether the electronic atomization device is in a suction state or a non-suction state. In addition, in other embodiments of the present application, the constant power control chip may further integrate the airflow sensor 140, that is, the airflow sensor 140 and the constant power control circuit 200 are located on the same chip. In addition, in other embodiments of the present application, the power NMOS transistor NM0 and the first NMOS transistor NM1 of the current sampling unit are located on the same chip, and a circuit of the constant power control circuit other than the power NMOS transistor NM0 and the first NMOS transistor NM1 of the current sampling unit is located on another chip.
It should be understood that reference to "a plurality" herein means two or more. Other embodiments of the present application will be apparent to those skilled in the art from consideration of the specification and practice of the application disclosed herein. This application is intended to cover any variations, uses, or adaptations of the invention following, in general, the principles of the application and including such departures from the present disclosure as come within known or customary practice within the art to which the invention pertains. It is intended that the specification and examples be considered as exemplary only, with a true scope and spirit of the application being indicated by the following claims.
It should be noted that, in the present specification, each embodiment is described in a progressive manner, and each embodiment focuses on differences from other embodiments, and portions that are the same and similar between the embodiments may be referred to each other. For the device embodiment, since it is basically similar to the method embodiment, the description is simple, and for the relevant points, refer to the partial description of the method embodiment.
The above disclosure is only for the purpose of illustrating the preferred embodiments of the present application and should not be taken as limiting the scope of the present application, so that the present application will be covered by the appended claims.

Claims (10)

1. A constant power control circuit applied to an electronic atomization device is characterized by comprising:
the power supply end and the power grounding end are used for being electrically connected with the positive pole and the negative pole of the power supply correspondingly, and the power supply end is also used for being electrically connected with the first end of the heating element;
an atomizing end for electrically connecting with the second end of the heating element;
the drain electrode of the power NMOS tube is electrically connected with the atomization end, and the source electrode of the power NMOS tube is electrically connected with the power grounding end;
the voltage sampling unit is respectively electrically connected with the power supply end and the atomization end and is used for obtaining a first sampling voltage representing the voltage on the heating element;
the current sampling unit is respectively and electrically connected with the atomization end, the power supply grounding end and the control end of the power NMOS tube, and is used for obtaining a second sampling voltage representing the current on the power NMOS tube;
the multiplier is electrically connected with the voltage sampling unit and the current sampling unit and is used for multiplying the first sampling voltage and the second sampling voltage to obtain a current power value representing the power of a heating element;
the input end of the power adjusting unit is electrically connected with the multiplier, the input end of the power adjusting unit also receives a preset power value, the output end of the power adjusting unit is electrically connected with the control end of the power NMOS tube, the power adjusting unit outputs a square wave signal to the power NMOS tube, and the power adjusting unit adjusts the duty ratio of the square wave signal according to the current power value and the preset power value so as to enable the average power value output by the heating element to be constant.
2. The constant power control circuit of claim 1, wherein the average power value is equal to a product of the current power value and a duty cycle of the square wave signal.
3. The constant power control circuit of claim 2, wherein the average power value is equal to the preset power value.
4. The constant power control circuit according to any one of claims 1 to 3, wherein the voltage sampling unit comprises a subtractor, the subtractor is electrically connected to the power supply terminal and the atomization terminal, respectively, and the subtractor is configured to subtract the voltage at the atomization terminal from the voltage at the power supply terminal to obtain a first sampled voltage.
5. The constant power control circuit according to any one of claims 1 to 3, wherein the current sampling unit comprises a first current proportion unit and a second current proportion unit, wherein the first current proportion unit flows a current proportional to a current flowing through the power NMOS transistor, and the second current proportion unit flows a current proportional to a current flowing through the first current proportion unit.
6. The constant-power control circuit according to claim 5, wherein the first current proportion unit comprises a first NMOS transistor, a second NMOS transistor, a first PMOS transistor, and a first operational amplifier, the second current proportion unit comprises a second PMOS transistor and a first resistor, wherein a source of the first NMOS transistor is electrically connected to a power ground terminal, a drain of the first NMOS transistor is electrically connected to a source of the second NMOS transistor and a reverse terminal of the first operational amplifier, respectively, a control terminal of the first NMOS transistor is electrically connected to a control terminal of the power NMOS transistor, a control terminal of the second NMOS transistor is electrically connected to an output terminal of the first operational amplifier, a drain of the second NMOS transistor is electrically connected to a drain of the first PMOS transistor, a control terminal of the first PMOS transistor is electrically connected to a drain of the first PMOS transistor, a source of the first PMOS transistor is electrically connected to a power supply terminal, a source of the second PMOS transistor is electrically connected to the power supply terminal, a control terminal of the second PMOS transistor is electrically connected to a control terminal of the first PMOS transistor, a drain of the second PMOS transistor is electrically connected to a first terminal of the first resistor, a first terminal of the second PMOS transistor is electrically connected to a first output terminal of the power supply terminal, and a first resistor is electrically connected to a first output terminal of the first operational amplifier, and the first resistor is electrically connected to a sampling resistor; alternatively, the first and second electrodes may be,
the first current proportion unit comprises a first NMOS (N-channel metal oxide semiconductor) tube, a third PMOS (P-channel metal oxide semiconductor) tube, a first PMOS tube and a first operational amplifier, wherein a source electrode of the first NMOS tube is electrically connected with a power grounding end, a drain electrode of the first NMOS tube is respectively electrically connected with a drain electrode of the third PMOS tube and a same-direction end of the first operational amplifier, a control end of the second NMOS tube is electrically connected with a control end of the power NMOS tube, a control end of the third PMOS tube is electrically connected with an output end of the first operational amplifier, a source electrode of the third PMOS tube is electrically connected with a drain electrode of the first PMOS tube, a control end of the first PMOS tube is electrically connected with a drain electrode of the first PMOS tube, a source electrode of the first PMOS tube is electrically connected with a power supply end, a source electrode of the second PMOS tube is electrically connected with the power supply end, a control end of the second PMOS tube is electrically connected with a control end of the first PMOS tube, a drain electrode of the second PMOS tube is electrically connected with a first end of the first resistor, a second end of the first PMOS tube is electrically connected with a power supply end, a control end of the second PMOS tube is electrically connected with a reverse sampling operational amplifier, and a first operational amplifier is used for atomizing output voltage.
7. The constant power control circuit according to claim 6, wherein the first NMOS transistor and the power NMOS transistor are manufactured by the same process, the first PMOS transistor and the second PMOS transistor are manufactured by the same process, a ratio of a current on the first NMOS transistor to a current on the power NMOS transistor is equal to a ratio of a channel width to a channel length of the first NMOS transistor, a ratio of a current on the first PMOS transistor to a current on the second PMOS transistor is equal to a ratio of a channel width to a channel length of the second PMOS transistor, and a current on the first PMOS transistor is equal to a current on the first NMOS transistor.
8. The constant power control circuit according to any one of claims 1 to 3, wherein the constant power control circuit is located on the same chip, the power supply terminal is a power supply pin, the power ground terminal is a power ground pin, and the atomization terminal is an atomization pin; alternatively, the first and second electrodes may be,
the power NMOS tube and the first NMOS tube of the current sampling unit are positioned on the same chip, the circuits of the constant power control circuit except the power NMOS tube and the first NMOS tube of the current sampling unit are positioned on the other chip, the power supply end is a power supply pin, the power grounding end is a power grounding pin, and the atomization end is an atomization pin; alternatively, the first and second electrodes may be,
the power regulating unit outputs square wave signals in a PWM mode or a PFM mode.
9. The constant power control circuit according to any one of claims 1 to 3, further comprising a suction detection unit, wherein the suction detection unit is configured to be electrically connected to the airflow sensor, and the suction detection unit is configured to control whether the power adjustment unit, the voltage sampling unit, the current sampling unit, and the multiplier operate or not, when the suction detection unit detects that the user sucks the electronic atomization device, the suction detection unit determines that the electronic atomization device is in a suction state, the suction detection unit controls the power adjustment unit, the voltage sampling unit, the current sampling unit, and the multiplier to operate, the power adjustment unit outputs the square wave signal to the control end of the power NMOS transistor, when the suction detection unit does not detect that the user sucks the electronic atomization device, the suction detection unit determines that the electronic atomization device is in a non-suction state, the suction detection unit controls the power adjustment unit, the voltage sampling unit, the current sampling unit, and the multiplier to stop operating, and the power NMOS transistor is normally turned off.
10. An electronic atomization device, comprising:
a constant power control circuit according to any one of claims 1-9;
the positive pole and the negative pole of the power supply are correspondingly and electrically connected with the power supply end and the power grounding end of the constant power control circuit;
and the first end of the heating element is electrically connected with the power supply end of the power supply, and the second end of the heating element is electrically connected with the atomization end.
CN202221764468.4U 2022-07-06 2022-07-06 Constant power control circuit and electronic atomization device Active CN218104929U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202221764468.4U CN218104929U (en) 2022-07-06 2022-07-06 Constant power control circuit and electronic atomization device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202221764468.4U CN218104929U (en) 2022-07-06 2022-07-06 Constant power control circuit and electronic atomization device

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CN218104929U true CN218104929U (en) 2022-12-23

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