CN218037746U - Power supply chronometer - Google Patents
Power supply chronometer Download PDFInfo
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- CN218037746U CN218037746U CN202222071927.7U CN202222071927U CN218037746U CN 218037746 U CN218037746 U CN 218037746U CN 202222071927 U CN202222071927 U CN 202222071927U CN 218037746 U CN218037746 U CN 218037746U
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Abstract
The utility model provides a power chronograph device, power chronograph device includes casing, mounting panel, a plurality of connection port and control, has in the casing and holds the chamber, and the side of casing is located to the mounting panel, and has seted up a plurality of mounting holes on the mounting panel, and each connection port correspondence is installed in a mounting hole, and in the casing was located to the control, the control included control chip and connected the current detection circuit on control chip, and current detection circuit is used for gathering connection port's current data to export to control chip. That is, in the technical scheme provided in this embodiment, a current detection circuit is provided at each connection port to detect the current of the connection port in real time and output the current data detected in real time to the control chip, so that whether the external device is in a normal working state or not can be determined, and the safe use of all the external devices is ensured.
Description
Technical Field
The utility model relates to a chronograph technical field, concretely relates to power chronograph.
Background
The power supply chronograph can start the power supply one by one according to the sequence from the front-stage equipment to the rear-stage equipment, and when the power supply is closed, all kinds of electric equipment are closed in the sequence from the rear stage to the front stage, so that all kinds of electric equipment can be effectively managed and controlled in a unified manner, artificial misoperation is avoided, meanwhile, the impact of the electric equipment on a power supply power grid in the moment of switching can be reduced, the impact of induced current on the equipment is also avoided, and the stability of the whole electric system is ensured.
The existing power supply time sequence device can only provide a switching function of a sequential switch, and cannot detect the current condition of each path of accessed equipment, thereby failing to ensure the safe use of all the accessed equipment
SUMMERY OF THE UTILITY MODEL
In order to overcome the above deficiencies of the prior art, the utility model provides a power chronograph.
In order to achieve the above object, the utility model provides a power chronograph, power chronograph includes:
a housing having a receiving cavity therein;
the mounting plate is arranged at the side end of the shell and is provided with a plurality of mounting holes;
each connecting port is correspondingly arranged in one mounting hole;
a control element disposed within the housing, the control element comprising:
the current detection circuit is used for collecting current data of the connecting port and outputting the current data to the control chip.
In an optional embodiment, the connection port includes a plurality of connection ports, each of the connection ports has two connection ports, and the current detection circuit includes:
the input end of each current transformer is connected with one connecting port and used for collecting current data of the connecting port, and the output end of each current transformer is provided with two output interfaces;
a plurality of electronic switches, each of said electronic switches having eight electronic switch inputs, two output ports of an output of each of said current transformers being connected in common to one of said electronic switch inputs of said electronic switch;
and one of the two output interfaces of the output end of each current transformer is connected with a first protection resistor.
In an optional embodiment, the current detection circuit further includes:
the current transformer comprises a first amplifier, a second protection resistor, a third protection resistor and a 3.3V voltage stabilizing circuit, wherein one of two output interfaces of the output end of each current transformer is connected with the negative input end of the first amplifier in a sharing way, one end of the second protection resistor and one end of the third protection resistor are connected with the positive connecting end of the first amplifier in a sharing way, the other end of the second protection resistor is grounded, and the other end of the third protection resistor is connected with the output end of the 3.3V voltage stabilizing circuit;
the amplifier comprises a fourth protection resistor, a fifth protection resistor, a sixth protection resistor, a first capacitor and a second amplifier, wherein the negative electrode input end of the first amplifier and the output end of the first amplifier are connected to one end of the fourth protection resistor in a shared mode, the other end of the fourth protection resistor is connected with the positive electrode connecting end of the second amplifier, one end of the fifth protection resistor and one end of the sixth protection resistor are connected to the negative electrode connecting end of the second amplifier in a shared mode, the other end of the sixth protection resistor is connected with the first capacitor and then connected with the other end of the fifth protection resistor in a shared mode, and the output end of the second amplifier is connected to the RXD3 pin of the control chip.
In an optional embodiment, the current detection circuit further includes:
a COM pin of the electronic switch is connected with one end of the seventh protection resistor, and the other end of the seventh protection resistor is connected with a negative connection end of the second amplifier;
the second capacitor is connected between a VEE pin and a VDD pin of the electronic switch in parallel, a VSS pin of the electronic switch is connected between the second capacitor and the VEE pin of the electronic switch, and the VSS pin of the electronic switch, the second capacitor and the VEE pin of the electronic switch are all grounded; a +5V power supply is connected between the second capacitor and a VDD pin of the electronic switch;
the pin A, the pin B, the pin C and the pin INH of the electronic switch are respectively connected to the pin PWM5, the pin PWM6, the pin PWM7 and the pin PWM4 of the control chip.
In an alternative embodiment, the electronic switch is of the type CD4051B, the current transformer is of the type ZMCT102, and the first and second amplifiers are of the type NE5532.
In an alternative embodiment, the 3.3V voltage regulator circuit includes:
the input end of the ASM1117 chip is connected with one end of the third capacitor, the output end of the ASM1117 chip is connected with one end of the fourth capacitor, and the other end of the third capacitor and the other end of the fourth capacitor are connected to the grounding end of the ASM1117 chip in common;
and a +5V power supply is connected between the input end of the ASM1117 chip and one end of the third capacitor, and the other end of the third protection resistor is connected between the output end of the ASM1117 chip and one end of the fourth capacitor.
In an optional embodiment, the model of the control chip is STC8A8K64D4.
In an optional embodiment, the power timer further comprises:
the fixing plate is arranged at the side end of the shell and provided with a first fixing hole;
the display piece is arranged on the first fixing hole and connected with the control piece.
In an optional embodiment, the fixing plate has a plurality of second fixing holes, and the power timer further includes:
and each control key is correspondingly arranged on one second fixing hole and is connected with the control part.
In an optional embodiment, the fixing plate is provided with a third fixing hole, and the power supply timer further includes:
and the power key is arranged on the third fixing hole and is connected with the control part.
The utility model provides a power chronograph, power chronograph includes casing, mounting panel, a plurality of connection port and control, it holds the chamber to have in the casing, the mounting panel is located the side of casing, just a plurality of mounting holes have been seted up on the mounting panel, each connection port correspondence is installed in one in the mounting hole, the control is located in the casing. The control piece comprises a control chip and a current detection circuit connected to the control chip, and the current detection circuit is used for collecting current data of the connecting port and outputting the current data to the control chip. That is, in the technical scheme provided in this embodiment, a current detection circuit is provided at each connection port to detect the current of the connection port in real time and output the current data detected in real time to the control chip, so that whether the external device is in a normal working state or not can be determined, and the safe use of all the external devices is ensured.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments or examples of the present invention, the drawings used in the embodiments or examples will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.
Fig. 1 is a schematic structural diagram of a power supply sequencer according to an embodiment of the present invention;
FIG. 2 is a schematic diagram of the explosion of the power supply sequencer according to the embodiment of the present invention
FIG. 3 is a block diagram illustrating a control member according to an embodiment of the present invention;
fig. 4 is a schematic circuit diagram of a current detection circuit according to an embodiment of the present invention;
fig. 5 is another schematic circuit diagram of a current detection circuit according to an embodiment of the present invention;
fig. 6 is a schematic circuit diagram of a 3.3V voltage stabilizing circuit according to an embodiment of the present invention;
fig. 7 is a schematic diagram of a pin of a control chip according to an embodiment of the present invention.
The realization, the functional characteristics and the advantages of the utility model are further explained by combining the embodiment and referring to the attached drawings.
Detailed Description
The technical solutions in the embodiments of the present invention will be described clearly and completely with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments in the present invention, all other embodiments obtained by a person skilled in the art without creative efforts belong to the protection scope of the present invention.
It should be noted that all the directional indicators (such as up, down, left, right, front, back, 8230; \8230;) in the embodiments of the present invention are only used to explain the relative position relationship between the components, the motion situation, etc. in a specific posture (as shown in the attached drawings), and if the specific posture is changed, the directional indicator is changed accordingly.
In addition, the technical solutions in the embodiments may be combined with each other, but it must be based on the realization of those skilled in the art, and when the technical solutions are contradictory or cannot be realized, the combination of the technical solutions should not be considered to exist, and is not within the protection scope of the present invention.
As shown in fig. 1-7, the present invention provides a power source sequencer.
Specifically, as shown in fig. 1 to 3, the power supply timer includes a housing 100, a mounting plate 200, a plurality of connection ports 300, and a control element 400, wherein the housing 100 has an accommodating cavity (not shown) therein, the mounting plate 200 is disposed at a side end of the housing 100, the mounting plate 200 has a plurality of mounting holes 210 formed therein, each connection port 300 is correspondingly disposed in one of the mounting holes 210, and the control element 400 is disposed in the housing 100. The control element 400 includes a control chip 410 and a current detection circuit 420 connected to the control chip 410, wherein the current detection circuit 420 is configured to collect current data of the connection port 300 and output the current data to the control chip 410.
Further, the connection port 300 is a socket. The socket can be a three-jack socket or a two-jack socket, and when the socket is the three-jack socket, one hole in the three-jack socket is a ground wire hole, and no current flows through the ground wire hole, namely, the real-time current of the ground wire hole does not need to be measured.
In the technical solution provided in this embodiment, the power source timing device includes a casing 100, a mounting plate 200, a plurality of connection ports 300, and a control element 400, a containing cavity is provided in the casing 100, the mounting plate 200 is provided at a side end of the casing 100, a plurality of mounting holes 210 are provided on the mounting plate 200, each connection port 300 is correspondingly installed in one of the mounting holes 210, the control element 400 is provided in the casing 100, the control element 400 includes a control chip 410 and a current detection circuit 420 connected to the control chip 410, and the current detection circuit 420 is configured to collect current data of the connection port 300 and output the current data to the control chip 410. That is, the current detection circuit 420 is disposed at each connection port 300 to detect the current of the connection port 300 in real time and output the current data detected in real time to the control chip 410, so as to determine whether the external device is in a normal working state, thereby ensuring the safe use of all external devices.
In addition, the power supply timer in the embodiment has high detection precision, and the minimum precision is 10mA. Moreover, the power supply timer further includes an alarm (not shown) connected to the control chip 410, and when the control chip 410 determines that the detected current data exceeds the set safe current value, the control chip 410 triggers the alarm to issue a prompt, and at this time, the control chip 410 can directly turn off the output of the power supply timer, thereby ensuring the safe use of all the devices externally connected to the connection port 300.
Further, the control chip 410 is further integrated with a bluetooth module or an infrared module, so that the control chip 410 can be wirelessly connected to an external device (for example, a mobile phone, a computer, a remote controller, etc.) through the bluetooth module or the infrared module, and thus, data of the control chip 410 can be transmitted to the external device in real time, so as to perform real-time networking monitoring through the external device, and enable all access devices to be used in a safe range.
Further, the connection port 300 includes a plurality. In this embodiment, the number of the connection ports 300 may be 8, 12 (as shown in fig. 1 and 2) or other values, which is not limited herein.
In this embodiment, as shown in fig. 4 and 5, each of the connection ports 300 has two connection ports (or each of the connection ports 300 has three connection ports, but there is a ground connection port among the three connection ports, and since the ground connection port has no current or zero current, it is only necessary to monitor the other two connection ports), that is, for example, 8 connection ports 300 are provided, and 8 connection ports 300 have sixteen connection ports. The current detection circuit 420 includes a plurality of current transformers 421 (in this embodiment, the number of the current transformers 421 may be set to 16 corresponding to 8 connection ports 300; each additional connection port 300 needs to be added with 2 corresponding current transformers 421), an input end (not shown) of each current transformer 421 is connected to one connection port for collecting current data of the connection port, and an output end of each current transformer 421 has two output interfaces (such as a pin 1 and a pin 2 shown in the drawing); a plurality of electronic switches 422 (in this embodiment, the number of the electronic switches 422 may be set to 2 corresponding to 8 of the connection ports 300, and 1 corresponding electronic switch 422 needs to be added for every 4 of the connection ports 300), each electronic switch 422 has eight electronic switch input terminals CH0 to CH7, and two output interfaces (i.e., pin 1 and pin 2) of the output terminal of each current transformer 421 are connected to one electronic switch input terminal (i.e., any one of CH0 to CH 7) of the electronic switch 422 in common. One of the two output interfaces (pin 2 in fig. 4) of the output end of each current transformer 421 is connected to a first protection resistor (i.e., R1 to R8, R15 to R22).
In this embodiment, each of the electronic switches 422 has only eight electronic switch input terminals CH0 to CH7, so each of the electronic switches 422 can only be connected to eight of the current transformers 421. The current detection circuit 420 is described by taking one electronic switch 422 and eight current transformers 421 as examples:
as shown in fig. 4, the current detection circuit 420 further includes a first amplifier 423, a second protection resistor R9, a third protection resistor R10, a 3.3V regulator circuit 424 (shown in fig. 6), a fourth protection resistor R11, a fifth protection resistor R12, a sixth protection resistor R13, a first capacitor C1, and a second amplifier 425, wherein one of the two output interfaces (pin 2 in fig. 4) of the output terminal of each current transformer 421 is connected to the negative input terminal of the first amplifier 423 in common, one end of the second protection resistor R9 and one end of the third protection resistor R10 are connected to the positive connection terminal of the first amplifier 423 in common, the other end of the second protection resistor R9 is connected to ground, and the other end of the third protection resistor R10 is connected to the output terminal of the 3.3V regulator circuit 424. The negative input terminal of the first amplifier 423 and the output terminal of the first amplifier 423 are commonly connected to one terminal of the fourth protection resistor R11, the other terminal of the fourth protection resistor R11 is connected to the positive connection terminal of the second amplifier 425, one terminal of the fifth protection resistor R12 and one terminal of the sixth protection resistor R13 are commonly connected to the negative connection terminal of the second amplifier 425, the other terminal of the sixth protection resistor R13 is connected to the first capacitor C1, and then the other terminal of the fifth protection resistor R12 is commonly connected to the output terminal of the second amplifier 425, and the output terminal of the second amplifier 425 is connected to the RXD3 pin of the control chip 410 (as shown in fig. 7).
Further, the current detection circuit 420 further includes a seventh protection resistor R14 and a second capacitor C2, the COM pin of the electronic switch 422 is connected to one end of the seventh protection resistor R14, and the other end of the seventh protection resistor R14 is connected to the negative connection end of the second amplifier 425; the second capacitor C2 is connected in parallel between the VEE pin and the VDD pin of the electronic switch 422, the VSS pin of the electronic switch 422 is connected between the second capacitor C2 and the VEE pin of the electronic switch 422, and the VSS pin of the electronic switch 422, the second capacitor C2 and the VEE pin of the electronic switch 422 are all grounded; and a +5V power supply is connected between the second capacitor C2 and the VDD pin of the electronic switch 422. The pin a, the pin B, the pin C, and the pin INH of the electronic switch 422 are respectively connected to the pin PWM5, the pin PWM6, the pin PWM7, and the pin PWM4 of the control chip 410 (as shown in fig. 7).
As shown in fig. 5, in the schematic diagram of the current detection circuit 420 of another electronic switch 422, the current detection circuit 420 further includes a first amplifier 423, a second protection resistor R23, a third protection resistor R24, and a 3.3V regulator 424 (which may be connected to the above 3.3V regulator 424, or may be separately provided with one more 3.3V regulator 424, so that the 3.3V regulators 424 of the two electronic switches 422 are used separately), a fourth protection resistor R25, a fifth protection resistor R26, a sixth protection resistor R27, a first capacitor C3, a second amplifier 425, a seventh resistor R28, and a second capacitor C4. The connection relationship of the above elements is the same as that of the above elements of the electronic switch 422, and specific reference is made to the above description, which is not repeated herein.
In addition, in another current sense circuit 420 of the electronic switch 422, the output terminal of the second amplifier 425 is connected to the TXD3 pin of the control chip 410 (as shown in fig. 7).
Optionally, the resistors R1 to R28 have a resistance of 20k, and the capacitors C1 to C4 have a capacitance of 47pF. Of course, the resistance values of the resistors R1 to R28 and the capacitance values of the capacitors C1 to C4 may be other values, and are not limited herein.
Further, the electronic switch 422 is of a type CD4051B, the current transformer 421 is of a type ZMCT102, and the first amplifier 423 and the second amplifier 425 are of a type NE5532. Of course, in other embodiments, the electronic switch 422, the current transformer 421, the first amplifier 423, and the second amplifier 425 may also be of other models as long as the corresponding functions are implemented, and the present embodiment is not limited thereto.
Further, as shown in fig. 6, the 3.3V voltage stabilizing circuit 424 includes an ASM1117 chip 4241, a third capacitor C5 and a fourth capacitor C6, an input terminal Vin of the ASM1117 chip 4241 is connected to one end of the third capacitor C5, an output terminal Vout of the ASM1117 chip 4241 is connected to one end of the fourth capacitor C6, and the other end of the third capacitor C5 and the other end of the fourth capacitor C6 are connected to a ground terminal GND of the ASM1117 chip 4241. A +5V power supply is connected between an input terminal Vin of the ASM1117 chip 4241 and one end of the third capacitor C5, and the other ends of the third protection resistors R10 and R24 are connected between an output terminal Vout of the ASM1117 chip 4241 and one end of the fourth capacitor C6. That is, an output end of the 3.3V voltage stabilizing circuit 424 is disposed between an output end Vout of the ASM1117 chip 4241 and one end of the fourth capacitor C6, and an output end of the 3.3V voltage stabilizing circuit 424 is connected to the other end of the third protection resistor R10 or R24, and is configured to input a 3.3V voltage to the other end of the third protection resistor R10 or R24.
Optionally, the model of the third capacitor C5 and the fourth capacitor C6 is 104 capacitors.
Based on the above embodiment, the utility model provides an in the embodiment the model of control chip 410 is STC8A8K64D4. Alternatively, the control chip 410 of the present invention is a control chip of another type, and is not limited herein.
Further, as shown in fig. 2, the power source timing sequence device further includes a fixing plate 500 and a display element 600, the fixing plate 500 is disposed at a side end of the casing 100, a first fixing hole 510 is formed on the fixing plate 500, the display element 600 is mounted on the first fixing hole 510, and the display element 600 is connected to the control element 400 (wherein, the display element 600 is connected to the control element 400 through a display screen circuit board 610), and the display element 600 can be used for displaying the circuit data received by the control element 400 or the normal state and the abnormal state of the power source timing sequence device, which is not limited herein.
Alternatively, the display device 600 is a display device such as a display screen, and is not limited thereto.
In addition, a plurality of second fixing holes 520 are formed in the fixing plate 500, the power supply timer further includes a plurality of control buttons 700, each control button 700 is correspondingly mounted on one second fixing hole 520, and the control buttons 700 are connected with the control element 400 (wherein, the control buttons 700 are connected with the control element 400 through button circuit boards 710). The number of the control buttons 700 is equal to the number of the connection ports 300, and each control button 700 is correspondingly connected to one of the connection ports 300 to control the connection port 300, for example, to connect or disconnect the current paths of the connection port 300 and the control element 400.
Further, a third fixing hole 530 is formed in the fixing plate 500, the power timer further includes a power button 800, the power button 800 is mounted on the third fixing hole 530, and the power button 800 is connected to the control member 400 for controlling the power timer to be turned on or turned off.
Optionally, the housing 100 is a 2U cabinet, and the mounting plate 200 and the fixing plate 500 are 2U panels.
It should be noted that the power source sequencer further includes a network interface, a knob, a USB interface, an indicator light, a switch, a connection female connector, a navigation key button, a transformer, a cover plate, a power line fixing member, and the like, which is not described herein in detail.
In addition, a heat radiating hole 110 is provided on the housing 100 to radiate heat from the control member 400.
In the technical solution provided in this embodiment, the power timing sequence apparatus includes a housing 100, a mounting plate 200, a plurality of connection ports 300, and a control element 400, wherein the housing 100 has an accommodating cavity therein, the mounting plate 200 is disposed at a side end of the housing 100, and the mounting plate 200 is provided with a plurality of mounting holes 210, each connection port 300 is correspondingly mounted in one of the mounting holes 210, the control element 400 is disposed in the housing 100, the control element 400 includes a control chip 410 and a current detection circuit 420 connected to the control chip 410, and the current detection circuit 420 is configured to collect current data of the connection port 300 and output the current data to the control chip 410. That is, the current detection circuit 420 is disposed at each connection port 300 to detect the current of the connection port 300 in real time and output the current data detected in real time to the control chip 410, so as to determine whether the external device is in a normal working state, thereby ensuring the safe use of all external devices.
The above is only the optional embodiment of the present invention, and not therefore the limit to the patent scope of the present invention, all the concepts of the present invention utilize the equivalent transformation made by the contents of the specification and the drawings, or the direct/indirect application in other related technical fields are included in the patent protection scope of the present invention.
Claims (10)
1. A power sequencer, the power sequencer comprising:
a housing having an accommodating chamber therein;
the mounting plate is arranged at the side end of the shell and is provided with a plurality of mounting holes;
each connecting port is correspondingly arranged in one mounting hole;
a control element disposed within the housing, the control element comprising:
the current detection circuit is used for collecting current data of the connecting port and outputting the current data to the control chip.
2. The power sequencer of claim 1, wherein the connection ports include a plurality of connection ports, each of the connection ports has two connection ports, and the current detection circuit includes:
the input end of each current transformer is connected with one connecting port and used for collecting current data of the connecting port, and the output end of each current transformer is provided with two output interfaces;
a plurality of electronic switches, each of said electronic switches having eight electronic switch inputs, two output ports of an output of each of said current transformers being connected in common to one of said electronic switch inputs of said electronic switch;
and one of the two output interfaces of the output end of each current transformer is connected with a first protection resistor.
3. The power sequencer of claim 2, wherein the current sensing circuit further comprises:
the current transformer comprises a first amplifier, a second protection resistor, a third protection resistor and a 3.3V voltage stabilizing circuit, wherein one of two output interfaces of the output end of each current transformer is connected with the negative input end of the first amplifier in a sharing way, one end of the second protection resistor and one end of the third protection resistor are connected with the positive connecting end of the first amplifier in a sharing way, the other end of the second protection resistor is grounded, and the other end of the third protection resistor is connected with the output end of the 3.3V voltage stabilizing circuit;
the amplifier comprises a fourth protection resistor, a fifth protection resistor, a sixth protection resistor, a first capacitor and a second amplifier, wherein the negative electrode input end of the first amplifier and the output end of the first amplifier are connected to one end of the fourth protection resistor in a shared mode, the other end of the fourth protection resistor is connected with the positive electrode connecting end of the second amplifier, one end of the fifth protection resistor and one end of the sixth protection resistor are connected to the negative electrode connecting end of the second amplifier in a shared mode, the other end of the sixth protection resistor is connected with the first capacitor and then connected with the other end of the fifth protection resistor in a shared mode, and the output end of the second amplifier is connected to the RXD3 pin of the control chip.
4. The power sequencer of claim 3, wherein the current sensing circuit further comprises:
a COM pin of the electronic switch is connected with one end of the seventh protection resistor, and the other end of the seventh protection resistor is connected with a negative connection end of the second amplifier;
the second capacitor is connected between a VEE pin and a VDD pin of the electronic switch in parallel, a VSS pin of the electronic switch is connected between the second capacitor and the VEE pin of the electronic switch, and the VSS pin of the electronic switch, the second capacitor and the VEE pin of the electronic switch are all grounded; a +5V power supply is connected between the second capacitor and a VDD pin of the electronic switch;
the pin A, the pin B, the pin C and the pin INH of the electronic switch are respectively connected to the pin PWM5, the pin PWM6, the pin PWM7 and the pin PWM4 of the control chip.
5. The power sequencer of claim 4, wherein said electronic switch is of the type CD4051B, said current transformer is of the type ZMCT102, and said first and second amplifiers are of the type NE5532.
6. The power sequencer of claim 3, wherein said 3.3V voltage regulator circuit comprises:
the input end of the ASM1117 chip is connected with one end of the third capacitor, the output end of the ASM1117 chip is connected with one end of the fourth capacitor, and the other end of the third capacitor and the other end of the fourth capacitor are connected with the ground end of the ASM1117 chip in common;
and a +5V power supply is connected between the input end of the ASM1117 chip and one end of the third capacitor, and the other end of the third protection resistor is connected between the output end of the ASM1117 chip and one end of the fourth capacitor.
7. The power sequencer according to any one of claims 1 through 6, wherein the control chip has a model of STC8A8K64D4.
8. The power sequencer of any one of claims 1-6, further comprising:
the fixing plate is arranged at the side end of the shell and provided with a first fixing hole;
the display piece is arranged on the first fixing hole and connected with the control piece.
9. The power supply timer of claim 8, wherein the fixing plate defines a plurality of second fixing holes, and the power supply timer further comprises:
and each control key is correspondingly arranged on one second fixing hole and is connected with the control part.
10. The power timer of claim 9, wherein the fixing plate has a third fixing hole formed therein, and the power timer further comprises:
and the power key is arranged on the third fixing hole and is connected with the control piece.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202222071927.7U CN218037746U (en) | 2022-08-06 | 2022-08-06 | Power supply chronometer |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202222071927.7U CN218037746U (en) | 2022-08-06 | 2022-08-06 | Power supply chronometer |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN218037746U true CN218037746U (en) | 2022-12-13 |
Family
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202222071927.7U Active CN218037746U (en) | 2022-08-06 | 2022-08-06 | Power supply chronometer |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN218037746U (en) |
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2022
- 2022-08-06 CN CN202222071927.7U patent/CN218037746U/en active Active
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