CN218004799U - Full-automatic batch chip testing device - Google Patents

Abstract

The application provides a full-automatic batch testing arrangement of chip includes: the system comprises a transfer module, a test module and a control module, wherein the transfer module and the test module execute operation according to a control command output by the control module; the moving mechanism is used for grabbing the chip to be tested through the guidance of the vision mechanism and then moving the chip to be tested to a testing station so as to finish the operations of automatic deviation correction, probe system registration and automatic needle pressing; the test module is used for testing the photoelectric characteristic parameters of the chip to be tested on the test station. According to the technical scheme, the modules are matched and connected in a high-efficiency manner, so that the high-efficiency full-automatic photoelectric test of the complex bare chip is realized.

Description

Full-automatic batch chip testing device

Technical Field

The application relates to the field of semiconductor manufacturing, in particular to a full-automatic batch chip testing device.

Background

With the widespread use of semiconductor integrated circuits, the degree of integration of chips is increasing, and the complexity of the chip manufacturing process is increasing. Since chips inevitably have defects during the manufacturing process, the chips need to be tested to identify and reject the failed chips. Under the condition of partial specific processes, the chips must be tested after scribing and before packaging, unqualified chips are removed, and the chips are classified in grades, so that the packaging yield is improved, and the cost is reduced.

However, at present, after chip scribing, testing adopts manual chip mounting, and the steps of probe and chip bonding pad alignment, testing, classification and the like are required, so that the testing efficiency is low, and the requirement of large-scale automatic testing cannot be met.

Therefore, the technical problem to be solved is to provide a full-automatic chip batch testing device to improve the testing efficiency of the chips after scribing and realize the high-efficiency full-automatic photoelectric testing of the complex bare chips.

Disclosure of Invention

The technical problem that this application will be solved provides a full-automatic testing arrangement in batches of chip, through full-automatic ground serial continuous test and sorting to improve the efficiency of software testing of chip behind the scribing, realize the full-automatic photoelectricity test of high efficiency to complicated bare chip.

In order to solve the above problem, the present application provides a full-automatic batch testing device for chips, including: the system comprises a transfer module, a test module and a control module, wherein the transfer module and the test module execute operation according to a control command output by the control module; the moving mechanism is used for grabbing the chip to be tested through the guidance of the vision mechanism and then moving the chip to be tested to a testing station so as to finish the operations of automatic deviation correction, probe system registration and automatic needle pressing; the test module is used for testing the photoelectric characteristic parameters of the chip to be tested on the test station.

In some embodiments, the apparatus for full-automatic batch testing of chips further comprises: a load module having encoded information, the load module comprising: the chip detection device comprises a tray or a material box, wherein the tray or the material box is provided with a plurality of chip stations, and the chip stations are used for placing the chips to be detected and placing back the sorted chips.

In some embodiments, the loading module further comprises: the lifting basket is provided with a plurality of clamping grooves, and the clamping grooves are used for fixing the tray or the material box.

In some embodiments, the control module controls the loading module to load a tray or a magazine which is stored in the basket and bears the chip to be tested to a specified position to complete automatic loading, and controls the transferring module to move the sorted chip to the specified position to complete automatic material returning.

In some embodiments, the apparatus for full-automatic batch testing of chips further comprises: and the storage module is connected with the test module and the loading module and is used for performing associated storage on the test result obtained by the test module and the coding information of the loading module to form an associated record of the test condition and the test result.

In some embodiments, the apparatus for full-automatic batch testing of chips further comprises: and the sorting module is connected to the storage module and the transferring module, performs chip grade classification on the chips to be detected according to the association records, and sorts and places the chips to be detected through the transferring module.

In some embodiments, the apparatus for full-automatic batch testing of chips further comprises: the identification module is connected to the loading module, the transferring module and the sorting module to identify the coded information on the loading module, and identify, position and guide when the transferring module moves the chip to be detected and the sorting module sorts the chip to be detected.

In some embodiments, the control module of the chip full-automatic batch testing device is a PLC controller or an industrial personal computer, and the control module communicates with the vision mechanism and the identification module through a TCP/IP protocol or a bus.

In some embodiments, the control module controls the test module to automatically load an electrical signal and/or an optical excitation signal required by a chip to be tested during testing, and controls the test module to acquire an output signal of the chip to be tested, so as to complete a photoelectric parameter test of the chip to be tested.

According to the technical scheme, the control module controls the transfer module and the test module, so that the moving mechanism guides the moving mechanism to grab the chip to be tested through the vision mechanism and then moves the chip to be tested to a test station, and automatic deviation rectification, probe system registration and automatic needle pressing operations are completed; and the test module is used for testing the photoelectric characteristic parameters of the chip to be tested on the test station. Through the high-efficiency matching connection among the modules, the high-efficiency full-automatic photoelectric test of the complex bare chip is realized.

Drawings

In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings needed to be used in the embodiments of the present application will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present application, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.

FIG. 1 is a schematic diagram of components of a full-automatic batch chip testing apparatus according to an embodiment of the present disclosure;

fig. 2 is a schematic diagram of a gripping mechanism and a vision mechanism in a transfer module according to an embodiment of the present application;

FIG. 3 is a diagram illustrating a chip alignment of the transfer module and a probe system of the test module according to an embodiment of the present disclosure;

FIG. 4 is a schematic view of a load module in an embodiment of the present application;

FIG. 5 is a schematic view of a vision mechanism of a transfer module and a testing radiation source of a testing module in an embodiment of the present application;

FIG. 6 is a schematic view of a tray in an embodiment of the present application;

FIG. 7 is a schematic view of a carrier in an embodiment of the present application;

fig. 8 is a general diagram of an apparatus for full-automatic batch testing of chips according to an embodiment of the present application.

Detailed Description

The following describes in detail a specific embodiment of the full-automatic batch testing apparatus for chips provided in the present application with reference to the accompanying drawings. The following description of at least one exemplary embodiment is merely illustrative in nature and is in no way intended to limit the application, its application, or uses. That is, those skilled in the art will appreciate that they are merely illustrative of exemplary ways that may be implemented, and not exhaustive. Furthermore, the relative arrangement of the components and steps set forth in these embodiments does not limit the scope of the present application unless specifically stated otherwise.

Fig. 1 is a schematic diagram of components of a full-automatic batch chip testing apparatus according to an embodiment of the present application. Referring to fig. 1, the full-automatic batch chip testing apparatus includes: the system comprises a transfer module M2, a test module M3 and a control module N, wherein the transfer module M2 and the test module M3 execute operation according to a control command output by the control module; the transfer module M2 includes: the device comprises a vision mechanism 23 (refer to fig. 2) and a moving mechanism (not shown), wherein the vision mechanism 23 is used for acquiring the shape and position information of a chip to be tested and the shape and position information of a test pad on the chip to be tested, and the moving mechanism is used for grabbing the chip to be tested through the guidance of the vision mechanism, then moving the chip to be tested to a test station, and completing the operations of automatic deviation correction, probe system registration and automatic pin pressing; the test module M3 is used for testing the photoelectric characteristic parameters of the chip to be tested on the test station.

In some embodiments, the control module N controls the test module M3 to automatically load an electrical signal and/or an optical excitation signal required by the chip to be tested during the test, and controls the test module to acquire an output signal of the chip, thereby completing the test of the optoelectronic parameters of the chip.

In the present embodiment, the transferring module M2 further includes a grabbing mechanism 2 (please refer to fig. 2). Fig. 2 is a schematic diagram of a gripping mechanism and a vision mechanism in a transfer module according to an embodiment of the present application. The grasping mechanism 2 includes: a four-axis robot 21 and an end effector 22. In this embodiment, the vision mechanism 23 is installed on the end effector 22, the vision mechanism 23 is a vision camera, and the vision camera is configured to photograph the surface of the chip, output the position information of the chip to be tested, and grasp the chip by the grasping mechanism 2. In some embodiments, the end effector 22 has a suction nozzle, and the surface of the suction nozzle has vacuum holes for sucking chips, and the suction nozzle contacts the blank area of the chip to avoid damaging the chip. In order to improve the efficiency, a plurality of suction nozzles can be installed at the same time, and the moving times of the grabbing mechanism are reduced.

Fig. 3 is a schematic diagram of a chip alignment of the transfer module and a probe system of the test module according to an embodiment of the present disclosure. Referring to fig. 3, the test module M3 includes: and the test board card 31 drives the chip to work and collects the output signal of the chip. In this embodiment, the test board 31 includes: the device comprises a direct current source, a time sequence editor and a data acquisition card, wherein direct current voltage and time sequence are loaded on a chip through the direct current source and the time sequence editor, the chip is driven to work, and output signals of the chip are acquired through the data acquisition card so as to test the chip.

In this embodiment, the test module M3 further includes: the probe and the probe in-place detection mechanism are connected to the test board card, when the probe in-place detection mechanism detects that the probe is in contact with the bonding pad of the chip, the probe in-place detection mechanism outputs a signal to the control module N to complete automatic needle pressing of the probe, and then the test board card is controlled to complete automatic testing of the chip.

Continuing to refer to fig. 3, in the present embodiment, the test module further includes: and the adjusting mechanism 3 comprises an X-axis adjusting mechanism 32, a Y-axis adjusting mechanism 33, a Z-axis adjusting mechanism 34 and a rotary adjusting mechanism 35, and the position of the chip to be tested on the test station is adjusted through the mechanisms. The test module further comprises: the vacuum platform 36 is used for fixing the chip to be tested in vacuum adsorption.

In some embodiments, the test module further comprises: and the test module software is carried on the test module M3, and the test module M3 receives the data acquired by the test board card, calculates the performance parameters of the chip through the test module software and generates a report.

In this embodiment, the control module N further includes: and the calculating mechanism is used for outputting a signal to the transferring module when the probe in-place detection mechanism detects that the probe is not in contact with the bonding pad of the chip, so that the vision camera is moved above the chip to photograph the surface of the photoelectric chip, and calculating the position deviation between the bonding pad position on the surface of the photoelectric chip and the probe corresponding to the bonding pad through the calculating mechanism. And outputting a control command through the control module N to enable the X-axis adjusting mechanism 32, the Y-axis adjusting mechanism 33 and the rotation adjusting mechanism 35 to respectively compensate the deviations of the X axis, the Y axis and the angle theta, thereby realizing the automatic alignment of the needle point and the chip bonding pad. For example, the control module N controls the four-axis robot in the transfer module M2 to move to a position right above the first chip station at the upper left of the tray, and after the chip is photographed by a vision camera located at the end of the four-axis robot, the photographed picture is calculated by the calculation mechanism to obtain chip absorption position information; the vision camera transmits chip sucking position information to the control module N, the control module N transmits the chip position information to the four-axis robot after receiving the chip position information, the four-axis robot is controlled to move the suction nozzle to a chip sucking position, at the moment, the suction nozzle is opened to be vacuum, and the chip is sucked to a test station from a tray chip station; after the chip is detected on the test station, the control module N controls the X-axis adjusting mechanism 32 to move, so as to move the test station to the needle point.

In this embodiment, the control module N is a PLC controller or an industrial personal computer, and the control module N communicates with the vision mechanism through a TCP/IP protocol or a bus. In this embodiment, the PLC controller or the industrial personal computer and the four-axis robot also communicate with each other according to a TCP/IP protocol, the PLC controller or the industrial personal computer and the X-axis adjusting mechanism 32, the Y-axis adjusting mechanism 33, the Z-axis adjusting mechanism 34, and the rotation adjusting mechanism 35 communicate with each other according to a serial protocol, the PLC controller or the industrial personal computer and the motor of the radiation source transfer mechanism communicate with each other according to a bus protocol, and the PLC controller or the industrial personal computer and the test module M3 communicate with each other through the bus protocol.

In other embodiments, cross or T-shaped alignment marks on the chip may be used as position references. The chips with needles are photographed in advance and stored as standard template pictures. In the testing and needle aligning process, after a camera photographs a chip, the camera performs calculation processing through machine vision software to obtain position information of a chip bonding pad and compares the position information with position information of the chip bonding pad on a standard template picture, the calculation mechanism calculates the position deviation of the chip bonding pad and the position deviation of the chip bonding pad on an X axis, a Y axis and an angle theta of the standard template picture, and the PLC or the industrial personal computer outputs a control command to enable the X axis adjusting mechanism 32, the Y axis adjusting mechanism 33 and the rotation adjusting mechanism 35 to compensate the deviation of the X axis, the Y axis and the angle theta respectively, so that the automatic alignment of a needle point and the chip bonding pad is realized.

In other embodiments, a test pad may be pre-designed on a chip, the area of the test pad is set to be capable of simultaneously binding two probes, and a dc power supply and a detection loop are connected to signal interfaces of the probe card corresponding to the two probes. For example, when the probe and the chip pad are not in contact, and the loop is open, the controller outputs the control command to control the Z-axis adjusting mechanism 34 to raise the Z-axis, so as to raise the test station; when the testing station rises to a certain height, the chip bonding pad is contacted with the two probes to form a loop, the controller outputs the control command to control the Z-axis adjusting mechanism 34 to stop rising the Z axis, automatic pin pressing of the probe card is realized through the process, and then the controller controls the testing module M3 to automatically test the photoelectric characteristics of the chip.

Referring to fig. 1, in the present embodiment, the apparatus for full-automatic batch testing of chips further includes: and the loading module M1 is connected with the transferring module M2, and the loading module M1 has coding information. In some embodiments, the encoded information is recorded by a tray (shown in fig. 6).

Fig. 4 is a schematic diagram of a loading module in an embodiment of the present application. Referring next to fig. 4, the loading module M1 includes: a horizontal transfer mechanism 41, a guide rail mechanism 42, a vertical lifting mechanism 43, and a stock bin 44. The bin 44 is used for placing the tray. In some embodiments, the tray is grasped by the grasping mechanism 2, and the chip to be tested is moved to the test station by the cooperation of the horizontal transfer mechanism 41, the guide rail mechanism 42 and the vertical lifting mechanism 43 in the loading module M1.

In some embodiments, the transferring module M2 further comprises: radiation source shifting mechanism. Fig. 5 is a schematic view of a vision mechanism of a transfer module and a testing radiation source of a testing module in an embodiment of the present application. The radiation source transfer mechanism 5 includes: a horizontal transfer system 51, a vertical transfer system 53, and a test radiation source 54. The vision mechanism 52 is mounted on the radiation source transfer mechanism 5. The test radiation source 54 is used as an excitation light source for the chip during the optical test, and when the chip needs to be optically tested, the radiation source transferring mechanism 5 moves the test radiation source 54 to the upper side of the chip through the horizontal transferring system 51 and the vertical transferring system 53, and confirms the position of the chip through the vision mechanism 52. In some embodiments, a plurality of test radiation sources may be provided, each as an excitation light source for the chip in different optical conditions, to more fully and quickly detect the optoelectronic properties of the chip.

The full-automatic batch chip testing device also comprises a loading module with coded information, and the loading module comprises: the chip detection device comprises a tray or a material box, wherein the tray or the material box is provided with a plurality of chip stations, and the chip stations are used for placing the chips to be detected and putting back the sorted chips. Fig. 6 is a schematic view of a tray in an embodiment of the present application. Referring to fig. 6, in this embodiment, the tray has a plurality of chip stations 61, and the line spacing and the column spacing of the chip stations 61 are fixed, so that after the moving mechanism moves the first chip to be tested to the testing station, the moving mechanism can rapidly move other chips in the row where the first chip to be tested is located according to the sum of the moving distance of the first chip to be tested and the column spacing between the chips, thereby increasing the moving speed of the chip to be tested and improving the detection efficiency. In this embodiment, the two-dimensional code is provided at the bottom of the tray, and the two-dimensional code of the tray is the encoding information and is used for recording the serial number information of the tray. In other embodiments, the tray number information may be recorded with an icon having an identification function, which is displayed on an area of the tray that is not covered.

In this embodiment, the loading module further includes: the lifting basket is provided with a plurality of clamping grooves, and the clamping grooves are used for fixing the tray or the material box. Fig. 7 is a schematic view of a carrier in an embodiment of the present application. Referring now to fig. 7, the basket has a plurality of slots 72, the slots 72 being used to secure the trays. In this embodiment, a two-dimensional code is arranged on the side surface of the basket, and the two-dimensional code is the coding information and is used for recording the number information of the basket. In this embodiment, the encoded information includes a two-dimensional code of the basket and a two-dimensional code of the tray. A tray can be placed into each clamping groove of the lifting basket, and the distance between the clamping grooves is fixed, so that the moving mechanism can accurately and quickly operate the next tray.

The control module N controls the loading module M1 to load a tray or a material box which is stored in the lifting basket and bears the chips to be tested to a specified position to complete automatic feeding, and controls the transferring module to move the sorted chips to the specified position to complete automatic material returning.

In some embodiments, the transfer module M2 further comprises: the tray clamping mechanism, the tray positioning mechanism and the tray conveying mechanism. The tray clamp is used for taking out the tray clamp in the lifting basket, conveying the tray to a material taking position through the conveying belt, and then controlling the tray clamp to press down the mechanism through the cylinder to fix the tray.

With continuing reference to fig. 1, the apparatus for full-automatic batch testing of chips further comprises: and the storage module M4 is connected with the test module M3 and the loading module M1, and stores the test result obtained by the test module and the coding information of the loading module in a correlation manner to form a correlation record of the test condition and the test result. In this embodiment, the full-automatic batch test device for chips further includes: the sorting module M5 is connected to the storage module M4 and the transferring module M2, the sorting module M5 performs chip grade sorting on the chips to be tested according to the association records, and the chips to be tested are sorted and placed through the transferring module. And the PLC or the industrial personal computer is communicated with the sorting module M5 through a bus protocol.

With continuing reference to fig. 1, the apparatus for full-automatic batch testing of chips further comprises: and the identification module M6 is connected to the loading module M1, the transferring module M2 and the sorting module M5 so as to identify the coding information on the loading module M1, and identify, position and guide when the transferring module moves the chip to be detected and the sorting module sorts the chip to be detected. In this embodiment, the identification module M6 includes a code scanning gun for performing code scanning identification on the coded information on the basket and the tray, and the PLC controller or the industrial personal computer communicates with the identification module M6 through a TCP/IP protocol or a bus. In this embodiment, the code scanning gun 45 of the identification module M6 is connected to the moving mechanism to scan the bottom of the tray to obtain the code information of the tray.

Fig. 8 is a general diagram of an apparatus for full-automatic batch testing of chips according to an embodiment of the present application. Referring to fig. 8, the full-automatic chip batch testing device carries the modules, can realize batch full-automatic continuous bare chip grabbing, automatic placement on a testing station of a probe station system, automatic completion of registration and needle insertion, loading of driving and excitation signals to complete photoelectric testing, and finally completion of chip sorting according to a testing result, and completes the whole processes of loading, testing, sorting and the like of the scribed bare chips.

According to the technical scheme, the loading module M1 and the identification module M6 with the coded information are arranged, so that the chip to be detected is accurately identified, the transferring module M2 with the vision mechanism and the moving mechanism is used for accelerating the transferring speed of the chip to be detected, and the detection efficiency is improved. Through the probe of the test module M3 and the probe in-place detection mechanism, the chip bonding pad and the probe are aligned, and the chip is driven to work and collect the output signal of the chip through the test board card of the test module M3, so that the chip is tested. Through the storage module M4, the test result obtained by the test module and the coding information of the loading module are subjected to associated storage to form an associated record, so that the sorting module M5 can sort the chips to be tested according to the associated record, and the sorting efficiency is improved. The full-automatic chip testing is realized, and the chip testing efficiency is improved.

The foregoing is only a preferred embodiment of the present application and it should be noted that those skilled in the art can make various improvements and modifications without departing from the principle of the present application, and these improvements and modifications should also be considered as the protection scope of the present application.

Claims (9)

1. The utility model provides a full-automatic batch test device of chip which characterized in that includes:

the system comprises a transfer module, a test module and a control module, wherein the transfer module and the test module execute operation according to a control command output by the control module;

the moving mechanism is used for grabbing the chip to be tested through the guidance of the vision mechanism and then moving the chip to be tested to a testing station so as to finish the operations of automatic deviation correction, probe system registration and automatic needle pressing;

the test module is used for testing the photoelectric characteristic parameters of the chip to be tested on the test station.

2. The full-automatic batch chip testing device of claim 1, further comprising:

a load module having encoded information, the load module comprising: the chip detection device comprises a tray or a material box, wherein the tray or the material box is provided with a plurality of chip stations, and the chip stations are used for placing the chips to be detected and putting back the sorted chips.

3. The apparatus of claim 2, wherein the loading module further comprises:

the lifting basket is provided with a plurality of clamping grooves, and the clamping grooves are used for fixing the tray or the material box.

4. The full-automatic batch chip testing device according to claim 3, wherein the control module controls the loading module to load a tray or a magazine, which is stored in the basket and bears the chips to be tested, to a designated position to complete automatic loading, and controls the transferring module to move the sorted chips to the designated position to complete automatic material returning.

5. The full-automatic batch chip testing device of claim 2, further comprising:

and the storage module is connected with the test module and the loading module and is used for performing associated storage on the test result obtained by the test module and the coding information of the loading module to form an associated record of the test condition and the test result.

6. The full-automatic batch chip testing device of claim 5, further comprising:

and the sorting module is connected to the storage module and the transferring module, performs chip grade classification on the chips to be detected according to the association records, and sorts and places the chips to be detected through the transferring module.

7. The full-automatic batch chip testing device of claim 6, further comprising:

the identification module is connected to the loading module, the transferring module and the sorting module to identify the coded information on the loading module, and identify, position and guide when the transferring module moves the chip to be detected and the sorting module sorts the chip to be detected.

8. The full-automatic batch chip testing device of claim 7, wherein the control module is a PLC (programmable logic controller) or an industrial personal computer, and the control module communicates with the vision mechanism and the identification module through a TCP/IP (transmission control protocol/Internet protocol) or a bus.

9. The full-automatic batch chip testing device according to claim 1, wherein the control module controls the test module to automatically load an electrical signal and/or an optical excitation signal required by a chip to be tested during testing, and controls the test module to collect an output signal of the chip to be tested, thereby completing the test of the photoelectric parameters of the chip to be tested.

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