CN218003999U - Voltage stabilizing circuit and device - Google Patents
Voltage stabilizing circuit and device Download PDFInfo
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- CN218003999U CN218003999U CN202220723754.XU CN202220723754U CN218003999U CN 218003999 U CN218003999 U CN 218003999U CN 202220723754 U CN202220723754 U CN 202220723754U CN 218003999 U CN218003999 U CN 218003999U
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- 230000006641 stabilisation Effects 0.000 claims abstract description 31
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- 230000005669 field effect Effects 0.000 claims description 73
- 239000003990 capacitor Substances 0.000 claims description 64
- 238000005070 sampling Methods 0.000 claims description 25
- 230000033228 biological regulation Effects 0.000 claims 4
- 238000010586 diagram Methods 0.000 description 14
- WHXSMMKQMYFTQS-UHFFFAOYSA-N Lithium Chemical compound [Li] WHXSMMKQMYFTQS-UHFFFAOYSA-N 0.000 description 11
- 229910052744 lithium Inorganic materials 0.000 description 11
- 239000000243 solution Substances 0.000 description 5
- 238000000034 method Methods 0.000 description 4
- 230000005611 electricity Effects 0.000 description 3
- 238000001914 filtration Methods 0.000 description 2
- 238000006467 substitution reaction Methods 0.000 description 2
- 230000015556 catabolic process Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 239000008151 electrolyte solution Substances 0.000 description 1
- 238000004146 energy storage Methods 0.000 description 1
- 230000007257 malfunction Effects 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
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- 230000004048 modification Effects 0.000 description 1
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Abstract
The utility model provides a voltage stabilizing circuit and device for be connected with the power, include: a voltage-reducing and voltage-stabilizing circuit and a low-resistance bypass circuit; the voltage reduction and stabilization circuit is connected with the power supply, is conducted when the power supply voltage is higher than the threshold voltage, and is used for reducing the power supply voltage to a preset voltage range so as to enable the power supply voltage in the preset voltage range to supply power to the load system; the low-resistance bypass circuit is connected with the power supply and the voltage reduction and stabilization circuit, is conducted when the power supply voltage is lower than the threshold voltage, and is used for adjusting the power supply voltage to a preset voltage range so as to enable the power supply voltage in the preset voltage range to supply power for the load system. The circuit effectively widens the power supply range of the power supply, improves the power supply utilization rate of the power supply, ensures the working stability of a subsequent load system, and solves the technical problems that the working stability of the load system is influenced and the power supply utilization rate of the power supply is reduced because the equivalent direct current resistance of the conventional voltage stabilizing circuit is large and the output voltage is lower than the preset voltage.
Description
Technical Field
The utility model belongs to the technical field of the technique of power and specifically relates to a voltage stabilizing circuit and device are related to.
Background
The conventional dc voltage-stabilizing power supply generally achieves the purpose of voltage reduction by using a PWM (Pulse Width Modulation) dynamic driving MOS (Metal Oxide Semiconductor) transistor and an external inductor built in a voltage-stabilizing IC (Integrated Circuit), but the method is only applicable to the voltage reduction by using the MOS transistor and the external inductorInput voltage V in And setting the output voltage V out When the phase difference is large, reliable control and stable output can be obtained. When the input voltage V in And setting the output voltage V out When the voltage is close to or equal to the set voltage, the voltage of the voltage stabilizing IC is reduced on the actual output voltage due to the equivalent direct current impedance between the MOS tube arranged in the voltage stabilizing IC and the external inductor when the load system needs current, so that the actual output voltage is lower than the set output voltage V out Therefore, the voltage exceeds the set range of the load voltage, the working stability of a follow-up load system is influenced, electricity is abandoned, and the power supply utilization rate of a power supply is reduced. At present, a voltage stabilizing IC with a buck-boost two-in-one function is adopted in some circuits to solve the above problems, but the introduction of the voltage stabilizing IC greatly increases the development cost of the voltage stabilizing circuit.
In conclusion, the conventional voltage stabilizing circuit has the technical problems that the equivalent direct current resistance is large, the output voltage is lower than the preset voltage, the working stability of a load system is influenced, and the power supply utilization rate of a power supply is reduced.
SUMMERY OF THE UTILITY MODEL
In view of this, an object of the utility model is to provide a voltage stabilizing circuit and device to alleviate current voltage stabilizing circuit and have the equivalent effect direct current resistance big, lead to output voltage to be less than preset voltage, influence the stability of load system work, reduce the technical problem of the power supply rate of utilization of power.
In a first aspect, the utility model provides a voltage stabilizing circuit for be connected with the power, include: a voltage-reducing and voltage-stabilizing circuit and a low-resistance bypass circuit;
the voltage reduction and stabilization circuit is connected with the power supply, is conducted when the power supply voltage is higher than a threshold voltage, and is used for reducing the power supply voltage to a preset voltage range so as to enable the power supply voltage in the preset voltage range to supply power to a load system;
the low-resistance bypass circuit is connected with the power supply and the voltage reduction and voltage stabilization circuit, is conducted when the power supply voltage is lower than the threshold voltage, and is used for adjusting the power supply voltage to the preset voltage range so as to enable the power supply voltage in the preset voltage range to supply power to the load system.
Further, the voltage reduction and stabilization circuit comprises: BUCK voltage reduction chip and inductor;
a first pin of the BUCK voltage reduction chip is connected with the power supply, a second pin of the BUCK voltage reduction chip is connected with a first end of the inductor, a third pin of the BUCK voltage reduction chip is connected with the first pin of the BUCK voltage reduction chip, a fourth pin of the BUCK voltage reduction chip is grounded, and a fifth pin of the BUCK voltage reduction chip is connected with the fourth pin of the BUCK voltage reduction chip;
and the second end of the inductor is connected with the low-resistance bypass circuit.
Further, the low resistance bypass circuit includes: the device comprises a first field effect tube, a second field effect tube and a first resistor;
the first end of the first field effect transistor is connected with the power supply, the second end of the first field effect transistor is connected with the second end of the inductor of the voltage reduction and stabilizing circuit, and the third end of the first field effect transistor is connected with the first end of the second field effect transistor;
the second end of the second field effect transistor is connected with the load system, and the third end of the second field effect transistor is grounded;
the first end of the first resistor is connected with the first end of the first field effect transistor, and the second end of the first resistor is connected with the third end of the first field effect transistor.
Further, the voltage reduction and stabilization circuit further comprises: the circuit comprises a first capacitor, a second capacitor, a third capacitor, a fourth capacitor, a second resistor and a third resistor;
the first end of the first capacitor is connected with a first pin of the BUCK voltage reduction chip, and the second end of the first capacitor is grounded;
a first end of the second capacitor is connected with a second end of the inductor, and a second end of the second capacitor is connected with a sixth pin of the BUCK voltage reduction chip;
the first end of the third capacitor is connected with the second end of the inductor, and the second end of the third capacitor is grounded;
the first end of the fourth capacitor is connected with the second end of the inductor, and the second end of the fourth capacitor is grounded;
a first end of the second resistor is connected with a second end of the inductor, and a second end of the second resistor is connected with a sixth pin of the BUCK voltage reduction chip;
the first end of the third resistor is connected with the second end of the second resistor, and the second end of the third resistor is grounded.
Furthermore, the first field effect transistor is a P-channel field effect transistor, a source electrode of the P-channel field effect transistor is connected with the power supply, a drain electrode of the P-channel field effect transistor is connected with a second end of an inductor of the voltage reduction and voltage stabilization circuit, and a grid electrode of the P-channel field effect transistor is connected with a first end of the second field effect transistor.
Further, the second field effect transistor is an N-channel field effect transistor, a drain electrode of the N-channel field effect transistor is connected with a gate electrode of the P-channel field effect transistor, the gate electrode of the N-channel field effect transistor is connected with the load system, and a source electrode of the N-channel field effect transistor is grounded.
Further, the circuit further comprises: a power supply voltage sampling circuit and a load system;
the power supply voltage sampling circuit is connected with the power supply and is used for collecting the power supply voltage and judging whether the power supply voltage is higher than the threshold voltage or not;
and the load system is connected with the power supply voltage sampling circuit, the voltage reduction and stabilizing circuit and the low-resistance bypass circuit.
Further, the power supply voltage sampling circuit includes: a fifth capacitor, a fourth resistor and a fifth resistor;
a first end of the fifth capacitor is connected with the load system, and a second end of the fifth capacitor is grounded;
a first end of the fourth resistor is connected with the power supply, and a second end of the fourth resistor is connected with a first end of the fifth capacitor;
and the first end of the fifth resistor is connected with the second end of the fourth resistor, and the second end of the fifth resistor is grounded.
Further, the load system works in the preset voltage range.
In a second aspect, the present invention further provides a voltage stabilizer, including any one of the voltage stabilizing circuits of the first aspect.
In an embodiment of the present invention, a voltage stabilizing circuit is provided for being connected to a power supply, including: a voltage reduction and stabilization circuit and a low-resistance bypass circuit; the voltage reduction and stabilization circuit is connected with the power supply, is conducted when the power supply voltage is higher than the threshold voltage, and is used for reducing the power supply voltage to a preset voltage range so as to enable the power supply voltage in the preset voltage range to supply power to the load system; the low-resistance bypass circuit is connected with the power supply and the voltage reduction and stabilization circuit, is conducted when the power supply voltage is lower than the threshold voltage, and is used for adjusting the power supply voltage to a preset voltage range so as to enable the power supply voltage in the preset voltage range to supply power for the load system. According to the above description, the voltage stabilizing circuit of the present invention utilizes the voltage reducing and stabilizing circuit to reduce the power voltage to the predetermined voltage range when the power voltage is higher than the threshold voltage; when the power supply voltage is lower than the threshold voltage, the low-resistance bypass circuit is utilized to adjust the power supply voltage to the preset voltage range, so that the power supply range of the power supply is effectively widened, the power supply utilization rate of the power supply is improved, the working stability of a subsequent load system is ensured, and the technical problems that the existing voltage stabilizing circuit has equivalent direct current resistance, the output voltage is lower than the preset voltage, the working stability of the load system is influenced, and the power supply utilization rate of the power supply is reduced are solved.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the embodiments or the prior art descriptions will be briefly described below, it is obvious that the drawings in the following descriptions are some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.
Fig. 1 is a first block diagram of a voltage stabilizing circuit according to an embodiment of the present invention;
fig. 2 is a schematic diagram of a first circuit structure of a voltage reduction and stabilization circuit according to an embodiment of the present invention;
fig. 3 is a schematic circuit diagram of a low resistance bypass circuit according to an embodiment of the present invention;
fig. 4 is a second block diagram of a voltage stabilizing circuit according to an embodiment of the present invention;
fig. 5 is a schematic diagram of a second circuit structure of a voltage reducing and stabilizing circuit according to an embodiment of the present invention;
fig. 6 is a schematic circuit diagram of a power supply voltage sampling circuit according to an embodiment of the present invention;
fig. 7 is a schematic diagram of a circuit structure of a voltage regulator circuit according to an embodiment of the present invention.
Icon: 11-voltage reduction and voltage stabilization circuit; 12-a low resistance bypass circuit; 13-a supply voltage sampling circuit; 14-load system.
Detailed Description
To make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions of the present invention will be described clearly and completely with reference to the accompanying drawings, and obviously, the described embodiments are some embodiments of the present invention, not all embodiments. Based on the embodiments in the present invention, all other embodiments obtained by a person skilled in the art without creative efforts all belong to the protection scope of the present invention.
In the prior art, the voltage reduction function of the dc voltage regulator power supply is generally realized by a built-in PWM dynamic driving MOS transistor and an external inductor of the voltage regulator IC, but this way is implemented at the input voltage V in And setting the output voltage V out Under the condition that is close or equal, the MOS pipe that voltage stabilizing IC is built-in is great with the equivalent direct current impedance on the external inductance, leads to load system when demand current, produces the pressure drop on actual output voltage for actual output voltage is less than and sets for output voltage Vout, influences the stability of follow-up load system work, and then leads to abandoning the electricity extravagant, has reduced the power supply rate of utilization of power.
Based on this, the utility model discloses a voltage stabilizing circuit selects step-down voltage stabilizing circuit or low resistance bypass circuit adjustment mains voltage to predetermineeing the voltage range according to mains voltage and threshold voltage's relation, thereby effectively widen the power supply scope of power, the power utilization ratio of power has been improved, and the stability of follow-up load system work has been guaranteed, it is big to have alleviated current voltage stabilizing circuit and have the equivalent direct current resistance, lead to output voltage to be less than predetermined voltage, influence the stability of load system work, the technical problem of the power supply rate of utilization of power is reduced.
In order to facilitate understanding of the present embodiment, a voltage stabilizing circuit disclosed in an embodiment of the present invention will be described in detail first.
The first embodiment is as follows:
a voltage stabilizing circuit, referring to fig. 1, for connection to a power supply, comprising: a voltage reduction and stabilization circuit 11 and a low-resistance bypass circuit 12;
the voltage reduction and stabilization circuit 11 is connected to a power supply, and is turned on when the power supply voltage is higher than a threshold voltage, so as to reduce the power supply voltage to a preset voltage range, so that the power supply voltage in the preset voltage range supplies power to the load system 14;
the low-resistance bypass circuit 12 is connected to the power supply and voltage-reducing stabilizing circuit 11, and is turned on when the power supply voltage is lower than the threshold voltage, so as to adjust the power supply voltage to a preset voltage range, so that the power supply voltage in the preset voltage range supplies power to the load system 14.
In the embodiment of the present invention, if there is no special description, for the device connected to the left and right ends, the first end refers to the left end of the device, the second end refers to the right end of the device, and for the device connected to the upper and lower ends, the first end refers to the upper end of the device, and the second end refers to the lower end of the device.
In specific implementation, the voltage stabilizing circuit of this embodiment is connected to a power supply, and the voltage output by the power supply is adjusted, so that the power supply voltage is within a voltage range when the load system 14 normally operates, and the stability of the subsequent operation of the load system 14 is ensured. When the circuit works normally, if the power supply voltage is detected to be higher than the threshold voltage, the voltage reduction and stabilization circuit 11 is conducted, and the power supply voltage is reduced to a preset voltage range by using the voltage reduction and stabilization circuit 11; if the power supply voltage is detected to be lower than the threshold voltage, the low-resistance bypass circuit 12 is conducted, and the power supply voltage is adjusted to the preset voltage range by using the low-resistance bypass circuit 12. This process will be described in detail below and will not be described in detail here.
In an embodiment of the present invention, the voltage stabilizing circuit is used for being connected to a power supply, including: a voltage reduction and stabilizing circuit 11 and a low-resistance bypass circuit 12; the voltage reduction and stabilization circuit 11 is connected with a power supply, is turned on when the power supply voltage is higher than a threshold voltage, and is used for reducing the power supply voltage to a preset voltage range so as to supply power to the load system 14 by the power supply voltage in the preset voltage range; the low-resistance bypass circuit 12 is connected to the power supply and voltage-reducing stabilizing circuit 11, and is turned on when the power supply voltage is lower than the threshold voltage, so as to adjust the power supply voltage to a preset voltage range, so that the power supply voltage in the preset voltage range supplies power to the load system 14. As can be seen from the above description, the voltage stabilizing circuit of the present invention utilizes the voltage reducing and stabilizing circuit 11 to reduce the power voltage to a predetermined voltage range when the power voltage is higher than the threshold voltage; when the power supply voltage is lower than the threshold voltage, the low-resistance bypass circuit 12 is used for adjusting the power supply voltage to a preset voltage range, so that the power supply range of the power supply is effectively widened, the power supply utilization rate of the power supply is improved, the working stability of a subsequent load system is ensured, and the technical problems that the conventional voltage stabilizing circuit has equivalent direct current resistance, the output voltage is lower than the preset voltage, the working stability of the load system is influenced, and the power supply utilization rate of the power supply is reduced are solved.
The above description generally describes the block diagram of the voltage regulator circuit, and the following description details the circuit structure and the operation principle of the voltage regulator circuit.
In an optional embodiment of the present invention, the voltage-reducing and stabilizing circuit 11 includes: the BUCK voltage reduction chip U and the inductor L;
a first pin of the BUCK voltage reducing chip U is connected with a power supply, a second pin of the BUCK voltage reducing chip U is connected with a first end of the inductor L, a third pin of the BUCK voltage reducing chip U is connected with the first pin of the BUCK voltage reducing chip U, a fourth pin of the BUCK voltage reducing chip U is grounded, and a fifth pin of the BUCK voltage reducing chip U is connected with the fourth pin of the BUCK voltage reducing chip U;
the second terminal of the inductance L is connected to a low resistance bypass circuit 12.
Specifically, fig. 2 is a schematic diagram of a first circuit structure of the voltage-reducing and stabilizing circuit 11 provided in this embodiment, as shown in fig. 2, the circuit mainly includes a BUCK voltage-reducing chip U and an inductor L, in terms of connection mode, a first pin of the BUCK voltage-reducing chip U is connected to a power supply and a third pin respectively, a second pin is connected to a first end of the inductor L, and a fourth pin is connected to a fifth pin and then grounded. The second end of the inductor L is connected to the subsequent low-resistance bypass circuit 12 as the output end of the voltage-reducing and stabilizing circuit 11.
For a better understanding of the circuit structure of the present invention, the circuit will be described in detail below by way of a specific example. In this embodiment, a lithium battery with a working interval of 3V-4.2V is used as a power supply of the voltage stabilizing circuit, and in order to meet the voltage reduction requirement in the working interval of the lithium battery, an ETA3425 voltage reduction chip with high efficiency and low power consumption is used as the BUCK chip U, wherein the equivalent dc impedance R of the MOS transistor in the voltage reduction chip is equivalent to that of the BUCK chip U DC1 And is 0.3 omega. The inductor L adopts equivalent direct current impedance R DC2 The power inductor is a power inductor of 0.2 omega, and the increase of the inductor L realizes the filtering of pulsating components in the output current of the chopping switch, reduces current ripples and plays a role of follow current. At this time, the equivalent DC impedance R of the merged path of the voltage-reducing and stabilizing circuit 11 DC3 Is 0.5 omega.
In an optional embodiment of the present invention, the low resistance bypass circuit 12 includes: the device comprises a first field effect tube Q1, a second field effect tube Q2 and a first resistor R1;
the first end of the first field effect transistor Q1 is connected with a power supply, the second end of the first field effect transistor Q1 is connected with the second end of an inductor L of the voltage reduction and stabilization circuit 11, and the third end of the first field effect transistor Q1 is connected with the first end of the second field effect transistor Q2;
a second end of the second field effect transistor Q2 is connected with the load system 14, and a third end of the second field effect transistor Q2 is grounded;
the first end of the first resistor R1 is connected with the first end of the first field effect transistor Q1, and the second end of the first resistor R1 is connected with the third end of the first field effect transistor Q1.
In addition, the circuit further comprises: a power supply voltage sampling circuit 13 and a load system 14;
the power supply voltage sampling circuit 13 is connected with a power supply and is used for collecting power supply voltage and judging whether the power supply voltage is higher than threshold voltage;
the load system 14 is connected with the power supply voltage sampling circuit 13, the voltage reduction and stabilization circuit 11 and the low-resistance bypass circuit 12.
In addition, the load system 14 operates within the preset voltage range.
Specifically, fig. 3 is a schematic circuit structure diagram of the low-resistance bypass circuit 12 provided in this embodiment, as shown in fig. 3, the circuit mainly includes a first field-effect transistor Q1, a second field-effect transistor Q2, and a first resistor R1, where the first resistor R1 is used as a pull-up resistor, and when the second field-effect transistor Q2 is turned off, the level of the third terminal of the first field-effect transistor Q1 is pulled up, so that the first field-effect transistor Q1 is locked in an off state, and meanwhile, the resistor prevents breakdown caused by malfunction of the field-effect transistor due to static electricity. Fig. 4 is a second structural block diagram of the voltage regulator circuit provided in this embodiment, and as shown in fig. 4, the power supply voltage sampling circuit 13 is connected to a power supply, and the load system 14 is connected to the power supply voltage sampling circuit 13, the step-down voltage regulator circuit 11, and the low-resistance bypass circuit 12.
The operation of the circuit in this case is described below with reference to the preceding example:
in this embodiment, the voltage range required by the load system 14 during normal operation is 3.3V to 3.6V, and the output voltage range of the lithium battery as the power supply is 3V to 4.2V, which requires the voltage regulator circuit to adjust the output voltage of the lithium battery so that the output voltage is within the power supply range required by the load. In addition, the maximum current I of the load system 14 during normal operation max 1A, it can be deduced that when the load system 14 is operated at the maximum current, the equivalent DC impedance R of the merged path of the voltage-reducing and voltage-stabilizing circuit 11 DC3 The resulting pressure drop was 0.5V (U) drop1 ＝I*R DC3 =1a × 0.5 Ω = 0.5V). At this time, power is supplied by the lithium batteryIn the process, the internal reactants are gradually reduced along with the use of the battery, the concentration is reduced, the conductivity of the electrolyte solution is reduced, and therefore the output voltage of the lithium battery is reduced. When the output voltage of the lithium battery is higher when the lithium battery starts to work, the current directly supplies power to the load system 14 through the BUCK voltage reduction chip U and the inductor L of the voltage reduction and stabilization circuit 11, and the output voltage is adjusted to be within a voltage range required by the normal work of the load system 14. However, when the voltage value output by the lithium battery is gradually reduced to be lower than 3.6V, if the current continues to flow through the voltage-reducing and stabilizing circuit 11 to supply power to the load system 14, the voltage reduced by the voltage-reducing and stabilizing circuit 11 will be lower than 3.3V, that is, in this case, the voltage output by the voltage-reducing and stabilizing circuit 11 is lower than the lowest value of the voltage range required by the load system 14 for normal operation, and at this time, the load system 14 will not work normally.
Therefore, as shown in fig. 4, in the present embodiment, the power supply voltage sampling circuit 13 is connected to the power supply, and when the power supply voltage sampling circuit 13 detects that the voltage value output by the lithium battery as the power supply is lower than 3.6V, the power supply voltage sampling circuit 13 outputs a signal to the load system 14, so that the driving end EN of the load system 14 outputs a high level to the second field-effect transistor Q2 of the low-resistance bypass circuit 12 and turns on the second field-effect transistor Q2. At this time, since the first end of the second field effect transistor Q2 is connected to the third end of the first field effect transistor Q1, the level of the third end of the first field effect transistor Q1 is pulled down while the second field effect transistor Q2 is turned on, so that the first field effect transistor Q1 is turned on together. The equivalent direct current impedance R of the first field effect transistor Q1 of the low-resistance bypass circuit 12 after being conducted DC4 Is 0.01 omega and is much smaller than the equivalent direct current impedance value of the voltage reduction and stabilization circuit 11, so that the current output by the lithium battery is directly transmitted to the load system 14 through the first field effect transistor Q1. At this time, if the load system 14 still operates at the maximum current, the maximum dc voltage drop generated by the first fet Q1 is 0.01V (U) drop2 ＝I*R DC4 =1a × 0.01 Ω = 0.01V), the voltage dropped by the first fet Q1 is still within the required power supply range of the load system 14. That is, the voltage delivered to the load system 14 via the low resistance bypass circuit 12 may be such that the supply voltage in the voltage range of 3.3V-3.6V continues to be the load system14, the circuit ensures the normal operation of the load system 14 without additionally replacing batteries or using a high-cost buck-boost two-in-one voltage stabilization IC power supply for power supply.
In an optional embodiment of the present invention, the first field effect transistor Q1 is a P-channel field effect transistor, the source S1 of the P-channel field effect transistor is connected to the power supply, the drain D1 of the P-channel field effect transistor is connected to the second end of the inductor L of the voltage reduction and stabilization circuit 11, and the gate G1 of the P-channel field effect transistor is connected to the first end of the second field effect transistor Q2.
In addition, the second field effect transistor Q2 is an N-channel field effect transistor, a drain D2 of the N-channel field effect transistor is connected to a gate G1 of the P-channel field effect transistor, a gate G2 of the N-channel field effect transistor is connected to the load system 14, and a source S2 of the N-channel field effect transistor is grounded.
Specifically, as shown in fig. 3, the first field effect transistor Q1 of the low-resistance bypass circuit 12 is a P-channel field effect transistor, i.e., a P-MOS transistor, and the second field effect transistor Q2 is an N-channel field effect transistor, i.e., an N-MOS transistor. When the power voltage sampling circuit 13 detects that the voltage value output by the power supply is lower than 3.6V, the power voltage sampling circuit 13 outputs a signal to the load system 14, so that the driving end EN of the load system 14 outputs a high level to the gate G2 of the N-MOS transistor, thereby turning on the N-MOS transistor. The drain D2 of the N-MOS tube is connected with the grid G1 of the P-MOS tube, and the grid G1 level of the P-MOS tube is pulled down after the N-MOS tube is conducted, so that the P-MOS tube is conducted. Because the on-resistance of the MOS transistor is small, after the P-MOS transistor is turned on, the current output by the power supply is directly transmitted to the subsequent load system 14 through the P-MOS transistor, so that the output voltage caused by the direct-current voltage drop generated by the voltage-reducing and voltage-stabilizing circuit 11 does not meet the power supply range required by the normal operation of the load system 14.
In an optional embodiment of the present invention, the voltage-reducing and stabilizing circuit 11 further includes: a first capacitor C1, a second capacitor C2, a third capacitor C3, a fourth capacitor C4, a second resistor R2 and a third resistor R3;
a first end of the first capacitor C1 is connected with a first pin of the BUCK voltage reduction chip U2, and a second end of the first capacitor C1 is grounded;
a first end of the second capacitor C2 is connected with a second end of the inductor L, and a second end of the second capacitor C2 is connected with a sixth pin of the BUCK voltage reduction chip U2;
the first end of the third capacitor C3 is connected with the second end of the inductor L, and the second end of the third capacitor C2 is grounded;
a first end of the fourth capacitor C4 is connected with a second end of the inductor L, and a second end of the fourth capacitor C4 is grounded;
a first end of the second resistor R2 is connected with a second end of the inductor L, and a second end of the second resistor R2 is connected with a sixth pin of the BUCK voltage reduction chip U2;
the first end of the third resistor R3 is connected with the second end of the second resistor R2, and the second end of the third resistor R3 is grounded.
Specifically, fig. 5 is a schematic diagram of a second circuit structure of the voltage reduction and voltage stabilization circuit provided in the embodiment of the present invention, as shown in fig. 5, the voltage reduction and voltage stabilization circuit 11 further includes: the capacitor comprises a first capacitor C1, a second capacitor C2, a third capacitor C3, a fourth capacitor C4, a second resistor R2 and a third resistor R3. The first capacitor C1, the third capacitor C3 and the fourth capacitor C4 are used as filter capacitors in the voltage reduction and stabilizing circuit 11 to play a role of energy storage and filtering; the second capacitor C2 is used as a feedback capacitor in the voltage reduction and stabilization circuit 11; the second resistor R2 and the third resistor R3 are both used as voltage dividing resistors in the voltage reduction and stabilization circuit 11 to protect the normal operation of the circuit.
In an optional embodiment of the present invention, the power supply voltage sampling circuit 13 includes: a fifth capacitor C5, a fourth resistor R4 and a fifth resistor R5;
a first end of the fifth capacitor C5 is connected with the load system, and a second end of the fifth capacitor C5 is grounded;
a first end of the fourth resistor R4 is connected with the power supply, and a second end of the fourth resistor R4 is connected with a first end of the fifth capacitor C5;
a first end of the fifth resistor R5 is connected to a second end of the fourth resistor R4, and a second end of the fifth resistor R5 is grounded.
Specifically, fig. 6 is a schematic circuit diagram of a power supply voltage sampling circuit provided by the embodiment of the present invention, as shown in fig. 6, this power supply voltage sampling circuit 13 includes: the circuit mainly comprises a fifth capacitor C5, a fourth resistor R4 and a fifth resistor R5, and is used for collecting power supply voltage and judging whether the power supply voltage is higher than threshold voltage. When the power supply voltage is higher than the threshold voltage, the current output by the power supply supplies power to the subsequent load system 14 through the BUCK voltage reduction chip U and the inductor L; when the supply voltage is below the threshold voltage, a signal is sent to the load system 14 and enables the EN terminal to output a high level, thereby turning on the low resistance bypass circuit 12. One end of a fifth capacitor C5 in the circuit is connected with the load system 14, the other end of the fifth capacitor C is grounded, the fifth capacitor C is used as a filter capacitor in the circuit, and the fourth resistor R4 and the fifth resistor R5 are both used as voltage dividing resistors in the power supply voltage sampling circuit 13, so that the normal operation of the power supply voltage sampling circuit 13 is protected.
Finally, in combination with the above description of each sub-circuit module of the voltage regulator circuit, the schematic diagram of the complete circuit structure of the voltage regulator circuit according to the embodiment of the present invention is shown in fig. 7.
To sum up, the utility model provides a voltage stabilizing circuit compares the advantage that exists with prior art as follows:
1. the power supply utilization rate of the power supply is improved;
2. the power supply stability of the power supply is improved, and the stable work of a subsequent load system is ensured;
3. the cruising ability of the power supply is improved;
4. the cost is reduced.
Example two:
a voltage regulator device, which includes the voltage regulator circuit in the first embodiment.
In addition, in the description of the embodiments of the present invention, unless otherwise explicitly specified or limited, the terms "mounted," "connected," and "connected" are to be construed broadly, e.g., as meaning either a fixed connection, a removable connection, or an integral connection; can be mechanically or electrically connected; they may be connected directly or indirectly through intervening media, or they may be interconnected between two elements. The specific meaning of the above terms in the present invention can be understood in specific cases to those skilled in the art.
In the description of the present invention, it should be noted that the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", and the like indicate orientations or positional relationships based on the orientations or positional relationships shown in the drawings, and are only for convenience of description and simplification of description, but do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and thus, should not be construed as limiting the present invention. Furthermore, the terms "first," "second," and "third" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance.
Finally, it should be noted that: the above-mentioned embodiments are only specific embodiments of the present invention, and are not intended to limit the technical solution of the present invention, and the protection scope of the present invention is not limited thereto, although the present invention is described in detail with reference to the foregoing embodiments, those skilled in the art should understand that: those skilled in the art can still modify or easily conceive of the technical solutions described in the foregoing embodiments, or make equivalent substitutions for some or all of the technical features, within the technical scope of the present disclosure; such modifications, changes or substitutions do not substantially depart from the spirit and scope of the embodiments of the present invention, and are intended to be included within the scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the claims.
Claims (10)
1. A voltage stabilizing circuit for connection to a power supply, comprising: a voltage reduction and stabilization circuit and a low-resistance bypass circuit;
the voltage reduction and stabilization circuit is connected with the power supply, is conducted when the power supply voltage is higher than a threshold voltage, and is used for reducing the power supply voltage to a preset voltage range so as to enable the power supply voltage in the preset voltage range to supply power to a load system;
the low-resistance bypass circuit is connected with the power supply and the voltage reduction and voltage stabilization circuit, is conducted when the power supply voltage is lower than the threshold voltage, and is used for adjusting the power supply voltage to the preset voltage range so as to enable the power supply voltage in the preset voltage range to supply power to the load system.
2. The voltage regulation circuit of claim 1, wherein the buck regulation circuit comprises: BUCK voltage reduction chip and inductor;
a first pin of the BUCK voltage reduction chip is connected with the power supply, a second pin of the BUCK voltage reduction chip is connected with a first end of the inductor, a third pin of the BUCK voltage reduction chip is connected with the first pin of the BUCK voltage reduction chip, a fourth pin of the BUCK voltage reduction chip is grounded, and a fifth pin of the BUCK voltage reduction chip is connected with the fourth pin of the BUCK voltage reduction chip;
and the second end of the inductor is connected with the low-resistance bypass circuit.
3. The voltage regulator circuit of claim 2, wherein the low resistance bypass circuit comprises: the device comprises a first field effect transistor, a second field effect transistor and a first resistor;
the first end of the first field effect transistor is connected with the power supply, the second end of the first field effect transistor is connected with the second end of the inductor of the voltage reduction and stabilization circuit, and the third end of the first field effect transistor is connected with the first end of the second field effect transistor;
the second end of the second field effect transistor is connected with the load system, and the third end of the second field effect transistor is grounded;
the first end of the first resistor is connected with the first end of the first field effect transistor, and the second end of the first resistor is connected with the third end of the first field effect transistor.
4. The voltage regulator circuit of claim 2, wherein the buck regulator circuit further comprises: the circuit comprises a first capacitor, a second capacitor, a third capacitor, a fourth capacitor, a second resistor and a third resistor;
the first end of the first capacitor is connected with a first pin of the BUCK voltage reduction chip, and the second end of the first capacitor is grounded;
a first end of the second capacitor is connected with a second end of the inductor, and a second end of the second capacitor is connected with a sixth pin of the BUCK voltage reduction chip;
the first end of the third capacitor is connected with the second end of the inductor, and the second end of the third capacitor is grounded;
the first end of the fourth capacitor is connected with the second end of the inductor, and the second end of the fourth capacitor is grounded;
a first end of the second resistor is connected with a second end of the inductor, and a second end of the second resistor is connected with a sixth pin of the BUCK voltage reduction chip;
and the first end of the third resistor is connected with the second end of the second resistor, and the second end of the third resistor is grounded.
5. The voltage regulator circuit of claim 3, wherein the first FET is a P-channel FET, a source of the P-channel FET is connected to the power supply, a drain of the P-channel FET is connected to a second terminal of an inductor of the buck voltage regulator circuit, and a gate of the P-channel FET is connected to a first terminal of the second FET.
6. The voltage regulator circuit according to claim 5, wherein the second FET is an N-channel FET, a drain of the N-channel FET is connected to a gate of the P-channel FET, a gate of the N-channel FET is connected to the load system, and a source of the N-channel FET is grounded.
7. The voltage regulator circuit of claim 1, further comprising: a power supply voltage sampling circuit and a load system;
the power supply voltage sampling circuit is connected with the power supply and is used for collecting the power supply voltage and judging whether the power supply voltage is higher than the threshold voltage or not;
and the load system is connected with the power supply voltage sampling circuit, the voltage reduction and stabilizing circuit and the low-resistance bypass circuit.
8. The voltage regulator circuit of claim 7, wherein the supply voltage sampling circuit comprises: a fifth capacitor, a fourth resistor and a fifth resistor;
a first end of the fifth capacitor is connected with the load system, and a second end of the fifth capacitor is grounded;
a first end of the fourth resistor is connected with the power supply, and a second end of the fourth resistor is connected with a first end of the fifth capacitor;
and the first end of the fifth resistor is connected with the second end of the fourth resistor, and the second end of the fifth resistor is grounded.
9. The voltage regulator circuit of claim 7, wherein the load system operates within the predetermined voltage range.
10. A voltage regulation device comprising a voltage regulation circuit according to any one of claims 1 to 9.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202220723754.XU CN218003999U (en) | 2022-03-29 | 2022-03-29 | Voltage stabilizing circuit and device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202220723754.XU CN218003999U (en) | 2022-03-29 | 2022-03-29 | Voltage stabilizing circuit and device |
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| CN218003999U true CN218003999U (en) | 2022-12-09 |
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| CN202220723754.XU Active CN218003999U (en) | 2022-03-29 | 2022-03-29 | Voltage stabilizing circuit and device |
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| CN (1) | CN218003999U (en) |
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