CN217956691U - Anti-surge protection circuit - Google Patents
Anti-surge protection circuit Download PDFInfo
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- CN217956691U CN217956691U CN202221272219.3U CN202221272219U CN217956691U CN 217956691 U CN217956691 U CN 217956691U CN 202221272219 U CN202221272219 U CN 202221272219U CN 217956691 U CN217956691 U CN 217956691U
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Abstract
The utility model provides a prevent surge protection circuit for the prevent surge circuit who solves among the prior art is poor to load protection effect, and unable effective separation surge disturbs, arouses the problem of equipment damage easily. Prevent surge protection circuit and connect between AC input end and rear end by protection circuit, it includes: the one-level surge protection module that the order is connected, differential mode filtering module and second grade common mode surge protection module, one-level surge protection module is including the self-resuming fuse of series connection on the live wire and parallelly connected at the live wire and the first piezo-resistor between the null line, second grade common mode surge protection module includes common mode inductance, second piezo-resistor and third piezo-resistor, second piezo-resistor connects in parallel at the both ends of the first coil of common mode inductance, third piezo-resistor connects in parallel at the both ends of common mode inductance second coil, common mode inductance's output is as the output of second grade common mode surge protection module. The surge protection circuit has the beneficial effect that the anti-interference capability of a back-end circuit (a microcomputer protection device and the like) to surge is improved.
Description
The technical field is as follows:
the utility model relates to an electronic information technical field, in particular to anti-surge protection circuit.
Background art:
at present, lightning rods on common buildings can only prevent lightning, and induced lightning stroke and impulse voltage generated by a strong electromagnetic field can cause damage to electronic equipment. The general damage occurs mainly during lightning strikes, caused by induced surge currents on the power and communication lines. However, surge impact not only comes from lightning strike, but also generates surge impact current when a power grid has short circuit fault and large load is switched, and other equipment is frequently turned on and turned off.
The electromagnetic environment of a substation is extremely complex. With the voltage rise and the capacity increase of the primary system, the electromagnetic disturbance generated by the transformer substation can be more serious, and the secondary loop can be influenced more strongly. Electromagnetic disturbance phenomena occur in most transformer substations, including low-frequency, high-frequency and conductive electromagnetic disturbance, or radiation, continuous and transient electromagnetic disturbance and electrostatic discharge.
At present, the most common surge protection device is a piezoresistor, but only the piezoresistor is used as a surge protection measure, the protection effect on the load is poor, and the interference of thunder and surge wave peaks on the load cannot be effectively blocked.
The utility model has the following contents:
the utility model provides a prevent surge protection circuit for the prevent surge circuit who solves among the prior art is poor to load protection effect, and unable effective separation surge disturbs, arouses the problem of equipment damage easily.
The utility model provides a prevent surge protection circuit, prevent surge protection circuit connects between AC input end and rear end by protection circuit, and it includes: the one-level surge protection module that the order is connected, differential mode filtering module and second grade common mode surge protection module, one-level surge protection module is including establishing ties the self-resuming fuse on the live wire and parallelly connected the first piezo-resistor between live wire and null line, second grade common mode surge protection module includes common mode inductance, second piezo-resistor and third piezo-resistor, second piezo-resistor connects in parallel at the both ends of the first coil of common mode inductance, third piezo-resistor connects in parallel at the both ends of common mode inductance second coil, common mode inductance's output is as the output of second grade common mode surge protection module.
Preferably, the differential mode filtering module includes a first inductor, a first capacitor and a second inductor connected in series to form a loop, the free end of the first inductor is connected to a live wire, the free end of the second inductor is connected to a zero wire, and two ends of the first capacitor are used as output ends of the differential mode filtering module.
Preferably, the anti-surge protection circuit further comprises: and two ends of the differential mode capacitor are connected to the output end of the second-stage common mode surge protection module, and the differential mode capacitor is connected in parallel between the live wire and the zero wire.
Preferably, the anti-surge protection circuit further includes: the input end of the common mode capacitor module is connected to two ends of the differential mode capacitor, the common mode capacitor comprises a first common mode capacitor and a second common mode capacitor, one end of the first common mode capacitor is connected with the live wire, one end of the second common mode capacitor is connected with the zero wire, and the other end of the first common mode capacitor and the other end of the second common mode capacitor are connected with the ground connected with the shell of the rear-end protected circuit.
Preferably, the anti-surge protection circuit further includes: the connector terminal row is connected to one-level surge protection module's input, and connector terminal row includes live wire terminal, zero line terminal and earth terminal, and live wire terminal is connected with the live wire electricity, and zero line terminal is connected with the zero line electricity, and earth terminal and the earth connection that the shell of rear end by protection circuit is connected.
Preferably, the common mode inductor is a ferrite core common mode inductor.
The utility model discloses beneficial effect includes: by means of a multi-stage anti-surge circuit, common-mode interference elimination and differential-mode interference elimination, surge current and peak voltage brought by surge are thoroughly reduced to a range value which can be borne by a back-end circuit, a self-recovery fuse is adopted, resistance of the self-recovery fuse is slightly improved under the action of the surge, the protection of the surge is more helpful, overcurrent damage of the back-end circuit can be avoided, overvoltage in the surge can be reduced by a piezoresistor, the self-recovery fuse and the piezoresistor are cooperatively used, maintenance cost can be reduced, and the anti-surge effect is better; secondly, when surge energy passes through the circuit, the surge energy charges the common mode capacitor through the common mode inductor, so that the voltage at two ends of the common mode capacitor is increased, when the surge voltage disappears, the current in the common mode inductor can not suddenly change, the common mode inductor forms a voltage source with positive left and negative right and is connected in series in the input circuit, the high voltage at two ends of the common mode inductor is easy to cause flashover, the common mode inductor plays a role in arc extinguishing through a mode of connecting piezoresistors in parallel, the damage to components with closer distances around is avoided, common mode interference and differential mode interference in the surge interference can be further eliminated through the design of the common mode filter circuit and the differential mode filter circuit, and the anti-interference capability of a rear end circuit (a microcomputer protection device and the like) to the surge is improved.
Description of the drawings:
fig. 1 is a schematic diagram of an anti-surge protection circuit according to a preferred embodiment;
fig. 2 is a circuit diagram of an anti-surge protection circuit according to a preferred embodiment.
The specific implementation mode is as follows:
in view of this, the present invention provides an anti-surge protection circuit, and the following description is made in conjunction with the accompanying drawings to describe the preferred embodiment of the present invention.
In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, but not all, embodiments of the present invention. Based on the embodiments in the present invention, all other embodiments obtained by a person skilled in the art without creative efforts belong to the protection scope of the present invention.
In addition, it is to be understood that the terms first, second, etc. used in the description of the embodiments of the present invention are used for distinguishing between the descriptions and not for indicating or implying any relative importance or order.
Referring to fig. 1, an anti-surge protection circuit is connected between an ac input terminal 1 and a rear end protected circuit, and includes: one-level surge protection module 2 that the order is connected, differential mode filtering module 3 and second grade common mode surge protection module 4, one-level surge protection module 2 is including establishing ties self-resuming fuse PTC on the live wire and parallelly connected first piezo-resistor RV1 between live wire and zero line, second grade common mode surge protection module 4 includes common mode inductance, second piezo-resistor RV2 and third piezo-resistor RV3, second piezo-resistor RV2 connects in parallel at the both ends of the first coil L3 of common mode inductance, third piezo-resistor RV3 connects in parallel at the both ends of common mode inductance second coil L4, common mode inductance's output is as second grade common mode surge protection module 4's output.
Specifically, the rear end can be computer protection device by protection circuit, the embodiment of the utility model provides an anti-surge protection circuit is applicable to the multiple scene that needs the protection, is most suitable for computer protection device, accords with the requirement of computer protection device to ann rule.
The primary surge protection module 2 comprises a self-recovery fuse PTC connected in series in a circuit and a piezoresistor connected in parallel between a live wire and a zero line, wherein the self-recovery fuse PTC mainly provides overcurrent protection for an electronic circuit or an electronic main device, the resistance of the self-recovery fuse PTC rises along with the rise of temperature, and by utilizing the characteristic, when a safety current passes through the self-recovery fuse PTC, the resistance value changes very little, when an abnormal large current passes through the self-recovery fuse PTC, the resistance value rises to achieve the purpose of limiting abnormal current, and when the abnormal current is eliminated and the temperature returns to a safety level, the resistance value is automatically reset; the first voltage dependent resistor RV1 is mainly used for clamping voltage when a circuit bears overvoltage and absorbing redundant current to protect a sensitive device, when the voltage applied to the voltage dependent resistor is lower than the threshold value of the voltage dependent resistor, the current flowing through the voltage dependent resistor RV is extremely small and is equivalent to a resistor with infinite resistance value, and when the voltage loaded on the voltage dependent resistor RV is higher than the threshold value of the voltage dependent resistor RV, the current flowing through the voltage dependent resistor RV is increased sharply and is equivalent to a resistor with infinite resistance value; and the utility model provides a piezo-resistor connects in parallel between live wire and zero line, and when the circuit normal operating, open a way between the live wire zero line in other words, when the peak voltage of surge was high to a definite value, its resistance value reduced rapidly, restraines peak voltage.
The differential mode filtering module 3 comprises a first inductor L1, a first capacitor CX1 and a second inductor L2 which are connected in series to form a loop, the free end of the first inductor L1 is connected to a live wire, the free end of the second inductor L2 is connected to a zero wire, and the two ends of the first capacitor CX1 are used as the output end of the differential mode filtering module 3. First electric capacity CX1 is connected between zero line and live wire, can have great decay to the differential mode, also is called differential mode filter capacitance, and first electric capacity CX1 is little to the capacitive reactance of high frequency interference, and first inductance L1 and second inductance L2 form differential mode inductance, and its inductive reactance to differential mode high frequency interference is big, can filter the differential mode high frequency interference among the surge interference like this.
And the secondary common mode surge protection module 4 is provided with a common mode inductor of a ferrite core. The surge energy charges the common-mode capacitor through the common-mode inductor, so that the voltage at two ends of the common-mode capacitor is increased. When the surge voltage disappears, the current in the common mode inductor can not change suddenly, the common mode inductor forms a voltage source with positive left and negative right and is connected in series in the input circuit, so that the surge voltage enters the microcomputer protection device, and the instantaneous overvoltage of components such as a chip in the microcomputer protection device is caused to cause calculation damage. The technical scheme in the embodiment of the utility model is that two ends of two coils with different winding directions of the common mode inductor are respectively connected in parallel with a piezoresistor, when the circuit is in normal operation, the piezoresistor can not be triggered to act, the common mode inductor normally filters out common mode interference, and the filtering effect of the common mode inductor is not influenced; when surge interference is generated in the circuit, the piezoresistor is conducted, the voltages at two ends of the common mode inductor are limited in a safety range, the arc extinguishing effect is achieved, the phenomenon that arc flashover easily occurs to high voltage generated at two ends when the common mode inductor is subjected to surge testing or surge interference is generated is avoided, and the problem that devices at the periphery with closer intervals are damaged is further avoided.
The anti-surge protection circuit further comprises: and the differential mode capacitor 5 is used for eliminating the differential mode interference part in the interference. Two ends of the differential mode capacitor 5 are connected to the output end of the second-stage common mode surge protection module 4, and the differential mode capacitor 5 is connected between the live wire and the zero wire in parallel.
The anti-surge protection circuit further comprises: and the common-mode capacitance module 6 is used for eliminating common-mode interference and high-frequency noise in the interference. The input end of the common mode capacitance module 6 is connected to two ends of the differential mode capacitance 5, the common mode capacitance 6 comprises a first common mode capacitance CY1 and a second common mode capacitance CY2, one end of the first common mode capacitance CY1 is connected with a live wire, one end of the second common mode capacitance CY2 is connected with a zero wire, and the other end of the first common mode capacitance CY1 and the other end of the second common mode capacitance CY2 are connected with a ground GNDPWR connected with a shell of a protection circuit at the rear end.
The input end of the first-level surge protection module 2 at the foremost end of the surge protection circuit is connected with the connector terminal strip, the connector terminal strip comprises a live wire terminal L, a zero line terminal N and a ground wire terminal PE, the live wire terminal L is electrically connected with a live wire, the zero line terminal N is electrically connected with a zero line, and the ground wire terminal PE is electrically connected with a ground GNDPWR of which the rear end is connected with a shell of the protection circuit. The connector terminal row is convenient for the access of external power supply for connect external live wire zero line and ground wire.
The surge voltage applied between the live wire and the zero line is called differential mode surge voltage, a differential mode path is that after the differential mode surge voltage enters a circuit, the differential mode surge voltage flows to the zero line after passing through a self-recovery fuse PTC, the resistance value of a first piezoresistor RV1 is reduced, meanwhile, after passing through the self-recovery fuse PTC, the differential mode surge voltage sequentially passes through a first inductor L1, a first capacitor CX1 and a second inductor L2 to reduce a part of differential mode interference, and then the differential mode interference is further filtered by a 1 end, a 2 end, 5 ends, 4 ends and 3 ends of a common mode inductor through the common mode inductor; the voltage applied between the live wire/zero line and the ground wire is common-mode surge voltage, and the common-mode path is the common-mode surge voltage which enters the circuit, flows to the ground after passing through the 1 end and the 2 end of the common-mode inductor and the first common-mode capacitor CY1, and flows to the ground after passing through the 3 end and the 4 end of the common-mode inductor and the second common-mode capacitor CY 2.
In summary, by means of the multi-stage anti-surge circuit, common mode interference elimination and differential mode interference elimination, surge current and peak voltage brought by surge are thoroughly reduced to a range value which can be borne by the back-end circuit, and the self-recovery fuse and the piezoresistor are cooperatively used, so that not only can maintenance cost be reduced, but also the anti-surge effect is better; and then, piezoresistors are connected in parallel at two ends of the common-mode inductor to play an arc extinguishing role, so that the damage to surrounding components with closer spacing is avoided, and the common-mode interference and the differential-mode interference in surge interference are further eliminated by the design of the common-mode filter circuit and the differential-mode filter circuit, so that the anti-interference capability of a rear-end circuit (a microcomputer protection device and the like) on the surge is improved.
Claims (6)
1. An anti-surge protection circuit, wherein the anti-surge protection circuit is connected between an ac input terminal and a rear end protected circuit, comprising: one-level surge protection module, differential mode filtering module and second grade common mode surge protection module that the order is connected, one-level surge protection module is including establishing ties self-resuming fuse on the live wire and parallelly connected the first piezo-resistor between live wire and null line, and second grade common mode surge protection module includes common mode inductance, second piezo-resistor and third piezo-resistor, the second piezo-resistor is parallelly connected the both ends of the first coil of common mode inductance, the third piezo-resistor is parallelly connected the both ends of common mode inductance second coil, common mode inductance's output conduct the output of second grade common mode surge protection module.
2. The anti-surge protection circuit according to claim 1, wherein the differential mode filter module comprises a first inductor, a first capacitor and a second inductor which are connected in series to form a loop, a free end of the first inductor is connected to a live line, a free end of the second inductor is connected to a zero line, and two ends of the first capacitor are used as output ends of the differential mode filter module.
3. The anti-surge protection circuit according to claim 1, further comprising: and two ends of the differential mode capacitor are connected to the output end of the secondary common mode surge protection module, and the differential mode capacitor is connected in parallel between the live wire and the zero wire.
4. The anti-surge protection circuit according to claim 3, further comprising: the input end of the common mode capacitor module is connected to two ends of the differential mode capacitor, the common mode capacitor comprises a first common mode capacitor and a second common mode capacitor, one end of the first common mode capacitor is connected with the live wire, one end of the second common mode capacitor is connected with the zero wire, and the other end of the first common mode capacitor and the other end of the second common mode capacitor are connected with the ground connected with the shell of the rear-end protected circuit.
5. The anti-surge protection circuit according to claim 1, further comprising: connector terminal row is connected to one-level surge protection module's input, connector terminal row includes live wire terminal, zero line terminal and earth terminal, live wire terminal is connected with the live wire electricity, the zero line terminal is connected with the zero line electricity, the earth terminal with the earth connection that the shell of rear end by protection circuit is connected.
6. The anti-surge protection circuit according to claim 1, wherein said common mode inductor is a ferrite core common mode inductor.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202221272219.3U CN217956691U (en) | 2022-05-25 | 2022-05-25 | Anti-surge protection circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202221272219.3U CN217956691U (en) | 2022-05-25 | 2022-05-25 | Anti-surge protection circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN217956691U true CN217956691U (en) | 2022-12-02 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202221272219.3U Active CN217956691U (en) | 2022-05-25 | 2022-05-25 | Anti-surge protection circuit |
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| Country | Link |
|---|---|
| CN (1) | CN217956691U (en) |
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2022
- 2022-05-25 CN CN202221272219.3U patent/CN217956691U/en active Active
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