CN217788384U - Package of semi-embedded chip and electronic device - Google Patents

Abstract

The application discloses packaging body and electron device of half embedding installation formula chip, wherein, packaging body of half embedding installation formula chip includes: the heat dissipation substrate is provided with a first groove and a plurality of fixing holes on one side; the chip is arranged in the first groove; the plastic packaging layer covers the chip and fills gaps among the plurality of fixing holes, the chip and the first groove, a plurality of blind holes are formed in the plastic packaging layer so as to expose part of the chip through the plurality of blind holes, and the plurality of blind holes are located on the same side of the chip; and one end of each conducting layer penetrates through the corresponding blind hole to be connected with the chip, and the other end of each conducting layer is exposed outside the plastic package layer and is used for being connected with other components. Through the structure, the bonding force between the plastic packaging layer and the chip and between the plastic packaging layer and the heat dissipation substrate can be greatly improved, so that the stability and the reliability of the semi-embedded chip packaging body are improved.

Description

Package of semi-embedded chip and electronic device

Technical Field

The application is applied to the technical field of chip packaging, in particular to a packaging body of a semi-embedded mounting type chip and an electronic device.

Background

The chip packaging technology is used for mounting a housing for a semiconductor integrated circuit chip, plays a role in placing, fixing, sealing, protecting the chip and enhancing the electrothermal performance, and is also a bridge for communicating an internal circuit of the chip with an external circuit.

Chip packaging often packages a chip and a substrate, a component or other combined objects through a plastic package layer, but in the transportation, installation or use process of a package body, the situation that the combination between the plastic package layer and the chip and the substrate, the component or other combined objects is loosened easily occurs, and the stability and reliability of the package body are affected.

SUMMERY OF THE UTILITY MODEL

The application provides a semi-embedded chip packaging body and an electronic device, which aim to solve the problem that a plastic packaging layer is unstable in combination.

In order to solve the above technical problem, the present application provides a package of a half-embedded mounted chip, the package of the half-embedded mounted chip includes: the heat dissipation substrate is provided with a first groove and a plurality of fixing holes on one side; the chip is arranged in the first groove; the plastic packaging layer covers the chip and fills gaps among the plurality of fixing holes, the chip and the first groove, a plurality of blind holes are formed in the plastic packaging layer so as to expose part of the chip through the plurality of blind holes, and the plurality of blind holes are located on the same side of the chip; and one end of each conducting layer penetrates through the corresponding blind hole to be connected with the chip, and the other end of each conducting layer is exposed outside the plastic package layer and is used for being connected with other components.

The fixing hole comprises a fixing through hole, and the fixing through hole penetrates through the heat dissipation substrate.

The fixing hole comprises a fixing blind hole, and the fixing blind hole does not penetrate through the heat dissipation substrate.

Wherein, the inner wall of the fixed hole is provided with a second groove; and/or a plurality of combing tooth grooves are arranged on the inner wall of the fixing hole.

The fixing hole comprises a first stepped hole and a second stepped hole which are communicated with each other; the first step hole is arranged close to one side of the heat dissipation substrate, on which the chip is mounted, and the second step hole is arranged far away from one side of the heat dissipation substrate, on which the chip is mounted; the aperture of the first stepped hole is smaller than that of the second stepped hole; and/or the hole diameter of the fixing hole is gradually increased along the direction from the side of the heat dissipation substrate where the chip is mounted to the opposite side.

Wherein, the fixed orifices is the ring channel, and the fixed orifices encircles first recess setting.

Wherein, a plurality of fixed orificess encircle recess evenly distributed on the radiating basal plate.

The first groove comprises a bottom and a side wall, and the side wall extends outwards along the direction far away from the bottom; the chip is arranged at the bottom, and the cross section size of the chip is matched with the size of the bottom.

And each conducting layer is respectively welded with the bonding pad on the same side of the chip.

In order to solve the technical problem, the present application further provides an electronic device including the package of the half-embedded mounted chip of any one of the above.

The beneficial effects of the application are; be different from prior art's condition, the packaging body of half embedding installation formula chip of this application is provided with first recess and a plurality of fixed orifices through the one side at the heat dissipation base plate, with chip installation and first recess in, rethread plastic envelope carries out the plastic envelope parcel with the chip, and make the plastic envelope layer fill a plurality of fixed orifices, thereby utilize the inner wall of a plurality of fixed orifices to increase substantially the bonding area between plastic envelope layer and the heat dissipation base plate, and utilize the three-dimensional structure between one side of fixed orifices and heat dissipation base plate to increase the bonding stability between plastic envelope layer and the heat dissipation base plate, at last associativity increases the plastic envelope layer and by its chip and the cohesion between the heat dissipation base plate of parcel, improve the stability and the reliability of the packaging body of half embedding installation formula chip.

Drawings

FIG. 1 is a schematic structural diagram of an embodiment of a package for a semi-embedded mounted chip provided herein;

FIG. 2 is a schematic structural view of a first embodiment of the fixing hole 1011 in the embodiment of FIG. 1;

FIG. 3 is a schematic structural view of a second embodiment of the fixing hole 1011 in the embodiment of FIG. 1;

FIG. 4 is a schematic structural view of a third embodiment of the fixing hole 1011 in the embodiment of FIG. 1;

FIG. 5 is a schematic structural view of a fourth embodiment of the fixing hole 1011 in the embodiment of FIG. 1;

FIG. 6 is a schematic sectional top view of a fifth embodiment of the fixing hole 1011 in the embodiment of FIG. 1;

FIG. 7 is a schematic top cross-sectional view of one embodiment of the distribution of the fixing holes 1011 in the embodiment of FIG. 1;

fig. 8 is a schematic structural diagram of another embodiment of a package of a semi-embedded mounted chip provided in the present application.

Detailed Description

The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only a part of the embodiments of the present application, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.

It should be noted that, if directional indications (such as up, down, left, right, front, and back … …) are involved in the embodiment of the present application, the directional indications are only used to explain the relative position relationship between the components, the motion situation, and the like in a specific posture (as shown in the drawing), and if the specific posture is changed, the directional indication is changed accordingly.

In addition, if there is a description relating to "first", "second", etc. in the embodiments of the present application, the description of "first", "second", etc. is for descriptive purposes only and is not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one such feature. In addition, technical solutions between various embodiments may be combined with each other, but must be realized by a person skilled in the art, and when the technical solutions are contradictory or cannot be realized, such a combination should not be considered to exist, and is not within the protection scope of the present application.

Referring to fig. 1, fig. 1 is a schematic structural diagram of an embodiment of a package of a semi-embedded chip according to the present application.

The package 100 of the semi-embedded chip of the present embodiment includes a heat dissipation substrate 101, a chip 104, a molding layer 102, and a plurality of conductive layers 103. The chip 104 of the present embodiment may include a Mosfet (Metal-Oxide-Semiconductor Field-Effect Transistor), which is referred to as a Mosfet for short.

One side of the heat dissipation substrate 101 is provided with a first groove 1012 and a plurality of fixing holes 1011. The present embodiment is described by taking the fixing hole 1011 as a fixing through hole as an example. The chip 104 is mounted in the first recess 1012 so as to be semi-embedded in the heat dissipation substrate 101. After the mounting, the whole heat dissipation substrate 101 can conduct heat generated in the operation process of the chip 104 to the outside, so that the heat dissipation area and the heat dissipation efficiency of the package 100 of the semi-embedded mounting chip are improved to a great extent, the quality and the stability of the package 100 of the semi-embedded mounting chip are guaranteed, and the service life of the package 100 of the semi-embedded mounting chip is prolonged. The number of the chips 104 and the first grooves 1012 may be one or more, and is set based on practical situations, and is not limited herein.

The molding compound layer 102 encapsulates the chip 104 and fills the gaps among the fixing holes 1011, the chip 104 and the first recess 1012. The molding compound layer 102 is provided with a plurality of blind holes 1021, so that a part of the chip 104 is exposed through the plurality of blind holes 1021, and the plurality of blind holes 1021 are located at the same side of the chip 104.

After the plastic package layer 102 wraps the chip 104 and fills the gap between the chip 104 and the first groove 1012, the plurality of fixing holes 1011 are filled, so that the inner walls of the plurality of fixing holes 1011 are utilized to greatly increase the bonding area between the plastic package layer 102 and the heat dissipation substrate 101, the three-dimensional structure between the fixing holes 1011 and one side of the heat dissipation substrate 101 is utilized to increase the bonding stability between the plastic package layer 102 and the heat dissipation substrate 101, and finally, the bonding force between the plastic package layer 102 and the chip 104 and the heat dissipation substrate 101 wrapped by the plastic package layer is increased. Since the chip 104 is wrapped by the molding layer 102, the mounting stability of the chip 104 is enhanced when the bonding between the molding layer 102 and the heat dissipation substrate 101 is improved.

In addition, since the fixing holes 1011 of the present embodiment are fixing through holes, the increased bonding area between the plastic package layer 102 and the heat dissipation substrate 101 is larger, and the bonding stability between the plastic package layer 102 and the heat dissipation substrate 101 is stronger.

One end of each conductive layer 103 passes through the corresponding blind hole 1021 to be connected with the chip 104, and the other end of each conductive layer 103 is exposed out of the plastic packaging layer 102 for being connected with other components or circuits. Since the plurality of blind holes 1021 are located on the same side of the chip 104, the electrodes of the chip 104 can be led out from the same side of the chip 104 by the conductive layers 103, thereby meeting the use requirements of the mosfet. The conductive layer 103 has a short conductive path, and has small parasitic inductance and parasitic capacitance generated during operation, and high conduction efficiency.

Through the structure, the packaging body of half embedding installation formula chip of this embodiment is provided with first recess and a plurality of fixed orifices through the one side at the heat dissipation base plate, with in chip installation and the first recess, rethread plastic envelope layer carries out the plastic envelope parcel with the chip, and make the plastic envelope layer fill a plurality of fixed orificess, thereby utilize the inner wall of a plurality of fixed orificess to increase substantially the bonding area between plastic envelope layer and the heat dissipation base plate, and utilize between one side of fixed orifices and heat dissipation base plate three-dimensional structure increase plastic envelope layer and the heat dissipation base plate between the bonding force, at last the bonding force between associativity increase plastic envelope layer and the chip and the heat dissipation base plate by its parcel, improve the stability and the reliability of the packaging body of half embedding installation formula chip.

In other embodiments, the inner wall of each fixing hole 1011 is provided with a second groove, so as to further increase the bonding area between the molding compound layer 102 and the heat dissipation substrate 101 and enhance the bonding three-dimensional property between the molding compound layer 102 and the heat dissipation substrate 101, thereby further enhancing the bonding force between the molding compound layer 102 and the chip 104 and the heat dissipation substrate 101 wrapped by the molding compound layer.

Referring to fig. 2, fig. 2 is a schematic structural diagram of a first embodiment of the fixing hole 1011 in the embodiment of fig. 1.

The inner wall of the fixing hole 1011 of this embodiment is provided with a second groove 105, wherein the number of the second grooves 105 provided in one fixing hole 1011 may be one or more.

In a specific application scenario, when the number of the second grooves 105 provided in the fixing hole 1011 is one. The second recess 105 may be disposed around the axis of the fixing hole 1011, or disposed on the inner wall of the fixing hole 1011. When the second groove 105 can be disposed around the axis of the fixing hole 1011, the bonding area between the molding compound layer 102 and the heat dissipation substrate 101 is increased, and the bonding stereo between the molding compound layer 102 and the heat dissipation substrate 101 is enhanced.

In other embodiments, a plurality of comb teeth grooves are formed on the inner wall of each fixing hole 1011. The bonding area between the plastic packaging layer 102 and the heat dissipation substrate 101 is further increased and the bonding stereoscopicity between the plastic packaging layer 102 and the heat dissipation substrate 101 is enhanced through the arrangement of the comb grooves, so that the bonding force between the plastic packaging layer 102 and the chip 104 and the heat dissipation substrate 101 wrapped by the plastic packaging layer is further enhanced.

Referring to fig. 3, fig. 3 is a schematic structural view of a fixing hole 1011 of the embodiment of fig. 1 in a second embodiment.

The inner wall of the fixing hole 1011 of the present embodiment is provided with a plurality of comb teeth grooves 106. The plurality of comb teeth grooves 106 may be disposed around the axis of the fixing hole 1011, or may be disposed on the inner wall of one side or both sides of the fixing hole 1011.

The plurality of comb grooves 106 can further increase the bonding area between the molding compound layer 102 and the heat dissipation substrate 101 and enhance the bonding three-dimensional property between the molding compound layer 102 and the heat dissipation substrate 101, thereby further enhancing the bonding force between the molding compound layer 102 and the chip 104 and the heat dissipation substrate 101 wrapped by the molding compound layer.

In other embodiments, each fixing hole 1011 includes a first stepped hole and a second stepped hole which are communicated with each other, the first stepped hole is disposed near one side of the heat dissipation substrate where the chip is mounted, and the second stepped hole is disposed far away from one side of the heat dissipation substrate where the chip is mounted, wherein the diameter of the first stepped hole is smaller than that of the second stepped hole, so that the structural stability of the whole package 100 of the half-embedded chip can be maintained to a certain extent even if the plastic package layer 102 falls off in the fixing hole 1011 due to the arrangement of the first stepped hole with a smaller diameter on the basis of increasing the bonding area between the plastic package layer 102 and the heat dissipation substrate 101 and enhancing the bonding stereoscopy between the plastic package layer 102 and the heat dissipation substrate 101, thereby further improving the reliability and quality of the package 100 of the half-embedded chip.

Referring to fig. 4, fig. 4 is a schematic structural view of a third embodiment of the fixing hole 1011 in the embodiment of fig. 1.

The fixing hole 1011 includes a first stepped hole 201 and a second stepped hole 202 which are communicated with each other, the first stepped hole 201 is arranged near one side of the heat dissipation substrate 101 where the chip 104 is installed, the second stepped hole 202 is arranged far away from one side of the heat dissipation substrate 101 where the chip 104 is installed, and the aperture of the first stepped hole 201 is smaller than that of the second stepped hole 202.

In other embodiments, the fixing holes 1011 also include a plurality of step holes that are communicated with each other, and the hole diameters of the plurality of step holes decrease gradually along the direction close to the side of the heat dissipation substrate 101 where the chip 104 is mounted, so that the structural stability of the package 100 of the whole half-embedded chip can be maintained to a certain extent even if the plastic sealing layer 102 falls off in the fixing holes 1011 due to the arrangement of the plurality of step holes on the basis of increasing the bonding area between the plastic sealing layer 102 and the heat dissipation substrate 101 and enhancing the bonding stereoscopy between the plastic sealing layer 102 and the heat dissipation substrate 101, thereby further improving the reliability and quality of the package 100 of the half-embedded chip.

In other embodiments, the aperture of each fixing hole 1011 gradually increases toward the opposite side along the side of the heat dissipating substrate 101 on which the chip 104 is mounted. Therefore, on the basis of improving the bonding area between the plastic package layer 102 and the heat dissipation substrate 101 and enhancing the bonding three-dimensional property between the plastic package layer 102 and the heat dissipation substrate 101, the structural stability of the whole package 100 of the half-embedded chip can be maintained to a certain extent even if the plastic package layer 102 falls off in the fixing hole 1011 due to the arrangement of the fixing hole 1011 with gradually changed aperture, so that the reliability and the quality of the package 100 of the half-embedded chip are further improved.

Referring to fig. 5, fig. 5 is a schematic structural diagram of a fourth embodiment of the fixing hole 1011 in the embodiment of fig. 1.

The aperture of the fixing hole 1011 gradually increases toward the opposite side along the side of the heat-dissipating substrate 101 on which the chip 104 is mounted.

In other embodiments, each of the fixing holes 1011 is an annular groove, and each of the fixing holes 1011 is disposed around the first recess 1012, thereby uniformly and stably improving the bonding stability of the package 100 of the semi-embedded mounted chip.

Referring to fig. 6, fig. 6 is a schematic top sectional view of a fifth embodiment of the fixing hole 1011 in the embodiment of fig. 1.

In this embodiment, each fixing hole 1011 is an annular groove, and each fixing hole 1011 is disposed around the first recess 1012, so that the bonding stability of the molding layer 102 around the chip 104 is improved globally, and the bonding stability of the package 100 of the half-embedded chip is further improved.

The fixing hole 1011 on the same heat dissipating substrate 101 of the present application may have one internal structure of the above-described embodiments, or may have a plurality of internal structures of the above-described embodiments, and is not particularly limited thereto.

In other embodiments, the plurality of fixing holes 1011 are uniformly distributed on the heat dissipating substrate 101 around the first recess 1012, thereby uniformly and stably improving the bonding stability of the package 100 of the semi-embedded mounted chip.

Referring to fig. 7, fig. 7 is a schematic top sectional view illustrating an embodiment of the distribution of the fixing holes 1011 in the embodiment of fig. 1.

The fixing holes 1011 of the present embodiment are uniformly distributed on the heat dissipating substrate 101 around the first recess 1012.

In other embodiments, the first groove 1012 includes a bottom and sidewalls extending outward in a direction away from the bottom, so as to increase an embedding space, increase a contact area between the molding layer 102 and the chip 104, and enhance a bonding force between the molding layer 102 and the chip 104.

The chip 104 is mounted on the bottom, and the cross-sectional dimension of the chip 104 matches the dimension of the bottom, so that the chip 104 is mounted in a matching manner, and the mounting stability of the chip 104 is improved.

In other embodiments, each conductive layer 103 is soldered to a pad on the same side of the chip 104, so that each conductive layer 103 can lead out an electrode of the chip 104 from the same side of the chip 104, thereby meeting the use requirement of the mosfet.

Referring to fig. 8, fig. 8 is a schematic structural diagram of another embodiment of a package of a semi-embedded chip according to the present application. The package of the semi-embedded chip of the present embodiment is described by taking the fixing hole as the fixing blind hole.

The inner wall structures of the heat dissipation substrate, the chip, the plastic package layer, the conductive layer, and the fixing hole of the present embodiment are the same as those of the previous embodiments, and please refer to the foregoing description, which is not repeated herein.

The fixed orifices 2011 of this embodiment is fixed blind hole, it does not run through radiating baseplate 201, thereby can enough utilize fixed blind hole to improve the bonding area between plastic-sealed layer 202 and radiating baseplate 101 in, the plastic packaging material is filled excessively when can also utilizing the bottom of fixed blind hole to prevent the plastic envelope, influence radiating plate 201 and keep away from the roughness of chip one side, and then the three-dimensional and the structural stability of combination between reinforced plastic-sealed layer 202 and radiating baseplate 101, and guarantee radiating plate 201 and keep away from the roughness of chip one side, improve the reliability of semi-embedded installation formula chip's packaging body 200.

In other embodiments, the plurality of fixing holes on the same heat dissipation substrate 201 may also include fixing blind holes and fixing through holes, and the fixing blind holes and the fixing through holes are mixedly distributed on the same heat dissipation substrate 201, so that the three-dimensional property and the structural stability of the combination between the plastic package layer 202 and the heat dissipation substrate 101 are enhanced, and the flatness of the side of the heat dissipation plate 201 away from the chip is ensured to a certain extent. The specific setting may be selected based on actual conditions, and is not limited herein.

The application also provides an electronic device, which comprises the semi-embedded chip packaging body of any one of the embodiments, so that the stability and the reliability of the electronic device can be improved.

The above description is only for the purpose of illustrating embodiments of the present application and is not intended to limit the scope of the present application, and all modifications of equivalent structures and equivalent processes, which are made by the contents of the specification and the drawings of the present application or are directly or indirectly applied to other related technical fields, are also included in the scope of the present application.

Claims (10)

1. A package for a semi-embedded mounted chip, the package comprising:

the heat dissipation substrate is provided with a first groove and a plurality of fixing holes on one side;

the chip is arranged in the first groove;

the plastic packaging layer covers the chip and fills gaps among the plurality of fixing holes, the chip and the first groove, a plurality of blind holes are formed in the plastic packaging layer so as to expose part of the chip through the blind holes, and the blind holes are positioned on the same side of the chip;

and one end of each conducting layer penetrates through the corresponding blind hole to be connected with the chip, and the other end of each conducting layer is exposed outside the plastic package layer.

2. The package for a semi-embedded mounted chip of claim 1, wherein said fixing holes comprise fixing through holes, said fixing through holes penetrating said heat-dissipating substrate.

3. The package of a semi-embedded mounted chip of claim 1, wherein said fixing holes comprise blind fixing holes, said blind fixing holes do not penetrate through said heat-dissipating substrate.

4. The package body of a semi-embedded chip, according to any one of claims 1 to 3, wherein the inner wall of the fixing hole is provided with a second groove; and/or

And a plurality of comb tooth grooves are formed in the inner wall of the fixing hole.

5. The package of a semi-embedded mounted chip as claimed in any one of claims 1-3, wherein the fixing hole comprises a first stepped hole and a second stepped hole which are communicated with each other; the first stepped hole is arranged close to one side of the heat dissipation substrate, on which the chip is mounted, and the second stepped hole is arranged far away from one side of the heat dissipation substrate, on which the chip is mounted; wherein the first stepped hole has a smaller aperture than the second stepped hole; and/or

The aperture of the fixing hole is gradually increased along a direction toward an opposite side of a side of the heat dissipation substrate on which the chip is mounted.

6. The package of a semi-embedded mounted chip of any one of claims 1-3,

the fixing hole is an annular groove and is arranged around the first groove.

7. The package of a semi-embedded mounted chip according to any one of claims 1-3, wherein the plurality of fixing holes are uniformly distributed on the heat-dissipating substrate around the first recess.

8. The package of a semi-embedded mounted chip of claim 1, wherein the first recess includes a bottom and sidewalls, the sidewalls extending outwardly in a direction away from the bottom;

the chip is mounted on the bottom, and the cross-sectional dimension of the chip is matched with the dimension of the bottom.

9. A package for a semi-embedded mounted chip as recited in claim 1, wherein each of said conductive layers is bonded to a respective pad on the same side of said chip.

10. An electronic device, characterized in that it comprises a package of a semi-embedded mounted chip according to any of claims 1-9.

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