CN217788008U - Control panel and display device - Google Patents
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- CN217788008U CN217788008U CN202221913042.0U CN202221913042U CN217788008U CN 217788008 U CN217788008 U CN 217788008U CN 202221913042 U CN202221913042 U CN 202221913042U CN 217788008 U CN217788008 U CN 217788008U
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Abstract
The embodiment of the utility model discloses control panel and display device. The control panel comprises a signal processing module and a data selection module; the signal processing module is connected with a connecting interface of the display driving chip; the signal processing module can convert a first driving signal of a grid driving circuit transmitted by a connecting interface of the display driving chip into a second driving signal; the data selection module is connected with the connection interface of the display driving chip and the signal processing module and can output the first driving signal or the second driving signal to the grid driving circuit. According to the scheme, the first driving signal is converted into the second driving signal through the signal processing module. The data selection module selectively outputs the first driving signal or the second driving signal to the gate driving circuit, so that the gate driving circuit can generate scanning signals with different frequencies according to driving signals with different frequencies, and further, the refresh frequency of the display device is changed.
Description
Technical Field
The embodiment of the utility model provides a relate to liquid crystal display technical field, especially relate to a control panel and display device.
Background
With the development of display screen technology, the requirement of users on the refresh frequency of the display panel is higher and higher. At present, a driving chip used by a part of display panels cannot output a high-frequency driving signal, so that the requirement of high refresh frequency cannot be met when the driving chip is used for display driving.
SUMMERY OF THE UTILITY MODEL
An embodiment of the utility model provides a control panel and display device, under the prerequisite that does not change drive core driving force, satisfy display device's high frequency demand that refreshes.
In a first aspect, an embodiment of the present invention provides a control panel, which includes a signal processing module and a data selection module;
the signal processing module is connected with a connecting interface of the display driving chip; the signal processing module can convert a first driving signal of a gate driving circuit transmitted by a connection interface of the display driving chip into a second driving signal;
the data selection module is connected with the connection interface of the display driving chip and the signal processing module and can output the first driving signal or the second driving signal to the gate driving circuit; the gate driving circuit can output a scan signal of a first frequency according to the first driving signal or output a scan signal of a second frequency according to the second driving signal, wherein the second frequency is greater than the first frequency.
Optionally, an output end of the data selection module may be connected to a start signal line and a clock signal line, and the first driving signal and the second driving signal each include a start signal and a clock signal.
Optionally, the signal processing module includes a signal compression unit and a timing control unit;
the signal compression unit is connected with a connection interface of the display driving chip and can compress the first driving signal into a third driving signal according to the compression ratio;
the time sequence control unit is connected with the signal compression unit and can adjust the phase of the third driving signal according to the compression multiplying power to obtain the second driving signal.
Optionally, the signal compression unit includes an analog-to-digital conversion subunit, a signal compiling subunit, and a digital-to-analog conversion subunit;
the analog-to-digital conversion subunit is connected with a connection interface of the display driving chip and can convert the first driving signal into a first digital driving signal;
the signal compiling subunit is connected with the analog-to-digital conversion subunit, and can perform sampling coding on the first digital driving signal according to the compression magnification to obtain a second digital driving signal;
the digital-to-analog conversion subunit is connected with the signal compiling subunit and can convert the second digital driving signal into a third driving signal.
Optionally, the signal processing module further comprises a storage unit;
the signal compression unit and the time sequence control unit are both connected with the storage unit, and the storage unit can store the third driving signal of one frame and output the stored third driving signal of one frame to the time sequence control unit.
Optionally, the data selection module includes a control terminal, a first input terminal, a second input terminal, and an output terminal;
the first input end is connected with a connection interface of the display driving chip, the second input end is connected with the signal processing module, and the control end is connected with the control signal line;
the data selection module can conduct a data transmission channel between the first input end and the output end or conduct a data transmission channel between the second input end and the output end according to a control signal output by the control signal line, and outputs the first driving signal or the second driving signal.
In a second aspect, the embodiment of the present invention further provides a display device, which includes the control panel provided in any of the above embodiments.
Optionally, the display device further includes a display panel and a display driving chip, where the display panel includes a gate driving circuit;
the display driving chip is connected with a control panel through a connection interface of the display driving chip, and the control panel is connected with the grid driving circuit;
the control board can convert a first driving signal generated by the display driving chip into a second driving signal and output the first driving signal or the second driving signal to the gate driving circuit.
Optionally, the display device further comprises a host connected to the control board, and the control end of the data selection module is connected to the host through a control signal line;
the host can control the data selection module to output the first driving signal or the second driving signal.
Optionally, the gate driving circuit is connected to a start signal line and a clock signal line, and the start signal line and the clock signal line are connected to the output end of the data selection module;
the gate driving circuit can output a scan signal of a first frequency according to the first driving signal or output a scan signal of a second frequency according to the second driving signal, wherein the second frequency is greater than the first frequency.
The embodiment of the utility model provides a control panel carries out data processing through the first drive signal that signal processing module will show the driver chip and produce, changes first drive signal into second drive signal. Wherein the frequency of the second drive signal may be greater than the frequency of the first drive signal. The data selection module selectively outputs the first driving signal or the second driving signal to the gate driving circuit, so that the gate driving circuit generates scanning signals with different frequencies according to the driving signals with different frequencies, and further changes the refresh frequency of the display device. Therefore, the control panel designed by the scheme can overcome the technical defect that the refresh frequency of the display device cannot be improved on the premise of not replacing the driving chip in the prior art.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings used in the description of the embodiments will be briefly described below, and it is obvious that the drawings in the description are only some embodiments of the present invention, and it is obvious for those skilled in the art that other drawings can be obtained without creative efforts.
Fig. 1 is a schematic diagram of a connection structure between a display driver chip and a gate driver circuit provided in the prior art;
fig. 2 is a schematic structural diagram of a control panel according to an embodiment of the present invention;
fig. 3 is a schematic structural diagram of another control panel according to an embodiment of the present invention;
fig. 4 is a schematic structural diagram of another control panel according to an embodiment of the present invention;
fig. 5 is a schematic diagram illustrating a process of processing the first driving signal by the signal compression unit to obtain the third driving signal according to an embodiment of the present invention;
fig. 6 is a schematic diagram of a first driving signal, a second driving signal and a third driving signal according to an embodiment of the present invention;
fig. 7 is a schematic structural diagram of another control panel according to an embodiment of the present invention;
fig. 8 is a schematic structural diagram of another control panel according to an embodiment of the present invention;
fig. 9 is a schematic structural diagram of a display device according to an embodiment of the present invention;
fig. 10 is a schematic structural diagram of another display device according to an embodiment of the present invention;
fig. 11 is a schematic structural diagram of another display device according to an embodiment of the present invention.
Detailed Description
In order to make the technical solutions of the present invention better understood, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by a person skilled in the art without creative efforts shall fall within the protection scope of the present invention.
It should be noted that the terms "first," "second," and the like in the description and claims of the present invention and in the drawings described above are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used is interchangeable under appropriate circumstances such that the embodiments of the invention described herein are capable of operation in sequences other than those illustrated or otherwise described herein. Moreover, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed, but may include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus.
Fig. 1 is a schematic diagram of a connection structure between a display driver chip and a gate driver circuit provided in the prior art, as shown in fig. 1, in the prior art, the display driver chip 110 is directly connected to the gate driver circuit 200 through a connection interface 120 of the display driver chip 110, and the display driver chip 110 directly outputs a generated driving signal to the gate driver circuit 200. Since the frequency of the driving signal generated by the display driving chip 110 determines the frequency of the scanning signal output by the gate driving circuit 200, the frequency of the scanning signal determines the refresh frequency of the display device. Therefore, in the prior art, the design manner of directly connecting the display driver chip 110 to the gate driver circuit 200 through the connection interface 120 of the display driver chip 110 cannot satisfy the requirement of the display device for high refresh rate without changing the driving capability of the driver chip.
To the above problem, the utility model provides a control panel aims at not changing under the prerequisite of driver chip driving force, satisfies display device's high frequency demand that refreshes.
Fig. 2 is a schematic structural diagram of a control board according to an embodiment of the present invention, as shown in fig. 2, the control board includes a signal processing module 300 and a data selecting module 400; the signal processing module 300 is connected to the connection interface 120 of the display driving chip 110; the signal processing module 300 can convert the first driving signal of the gate driving circuit 200 transmitted by the connection interface 120 of the display driving chip 110 into a second driving signal; the data selection module 400 is connected to the connection interface 120 of the display driver chip 110 and the signal processing module 300, and is capable of outputting the first driving signal or the second driving signal to the gate driving circuit 200; the gate driving circuit can output a scanning signal of a first frequency according to the first driving signal or output a scanning signal of a second frequency according to the second driving signal, wherein the second frequency is greater than the first frequency.
The display driving chip 110 is connected to the control board through the connection interface 120 of the display driving chip 110, and the control board is connected to the gate driving circuit 200. The control board may perform data processing on the first driving signal output by the connection interface 120 of the display driving chip 110 to generate a second driving signal, and selectively transmit the first driving signal or the second driving signal to the gate driving circuit 200.
Specifically, the signal processing module 300 included in the control board may perform data processing on a first driving signal generated by the display driving chip 110, and convert the first driving signal into a second driving signal, where a frequency of the second driving signal may be greater than a frequency of the first driving signal. The data selection module 400 included in the control board can simultaneously input the first driving signal and the second driving signal, and selectively output the first driving signal or the second driving signal to the gate driving circuit 200 according to the current display requirement of the display device. Therefore, when the usage requirement of the user is satisfied, the gate driving circuit 200 can output the scan signal of the low frequency (the scan signal of the first frequency) according to the first driving signal to reduce the power consumption of the display device. The gate driving circuit 200 may further output a high frequency scan signal (a second frequency scan signal) according to the second driving signal to meet the requirement of a user on a high refresh frequency of the display device.
The embodiment of the utility model provides a control panel will show the first drive signal that driver chip 110 produced through signal processing module 300 and carry out data processing, changes first drive signal into second drive signal. Wherein the frequency of the second drive signal may be greater than the frequency of the first drive signal. Through the data selection module 400, the first driving signal or the second driving signal is selectively output to the gate driving circuit 200, so that the gate driving circuit 200 generates scanning signals with different frequencies according to driving signals with different frequencies, thereby changing the refresh frequency of the display device. Therefore, the control panel designed by the scheme can overcome the technical defect that the refresh frequency of the display device cannot be improved on the premise of not replacing the driving chip in the prior art.
On the basis of the above embodiment, optionally, the output end of the data selection module can be connected to a start signal line and a clock signal line, and the first driving signal and the second driving signal both include a start signal and a clock signal.
The data selection module can transmit the start signal included by the first drive signal or the second drive signal to the gate drive circuit through the start signal line, and can also transmit the clock signal included by the first drive signal or the second drive signal to the gate drive circuit through the clock signal line.
Specifically, the start signal is a signal input to an input terminal of the first stage shift register in the gate driver circuit. The first stage shift register can generate a first stage scanning signal and a signal input to the input end of the next stage shift register according to the starting signal and the clock signal, and the like until the gate drive circuit generates scanning signals of all stages according to the starting signal and the clock signal and correspondingly outputs the scanning signals to pixel circuits of all stages of the display device, so that the display function of the display device is realized.
On the basis of the above embodiment, optionally, fig. 3 is a schematic structural diagram of another control panel provided in the embodiment of the present invention, as shown in fig. 3, the signal processing module 300 includes a signal compression unit 310 and a timing control unit 320; the signal compression unit 310 is connected to the connection interface 120 of the display driving chip 110, and can compress the first driving signal into a third driving signal according to the compression ratio; the timing control unit 320 is connected to the signal compression unit 310, and can adjust the phase of the third driving signal according to the compression ratio to obtain the second driving signal.
Illustratively, the first drive signal and the second drive signal each include a start signal and a clock signal. The signal compression unit 310 may collect high and low potentials of the start signal and the clock signal according to a compression ratio, so as to obtain the compressed start signal and the compressed clock signal, that is, a third driving signal. The timing control unit 320 may perform compression adjustment on a phase between the compressed start signal and the clock signal according to a compression ratio, so as to obtain a second driving signal obtained by compressing the first driving signal as a whole.
It should be noted that: the compression magnification is set in advance, and the compression magnification is less than 1. Therefore, the display time of each frame of the second driving signal converted by the signal processing module 300 is shorter than the display time of each frame of the first driving signal, so that the gate driving circuit 200 can output a higher-frequency scanning signal according to the second driving signal, and the requirement of the display device for high refresh frequency is met.
On the basis of the foregoing embodiment, optionally, fig. 4 is a schematic structural diagram of another control board provided in the embodiment of the present invention, as shown in fig. 4, the signal compression unit 310 includes an analog-to-digital conversion subunit 311, a signal compiling subunit 312, and a digital-to-analog conversion subunit 313; the analog-to-digital conversion subunit 311 is connected to the connection interface 120 of the display driving chip 110, and is capable of converting the first driving signal into a first digital driving signal; the signal compiling subunit 312 is connected to the analog-to-digital converting subunit 311, and is capable of sampling and encoding the first digital driving signal according to the compression magnification to obtain a second digital driving signal; the digital-to-analog conversion sub-unit 313 is connected to the signal compiling sub-unit 312, and can convert the second digital driving signal into a third driving signal.
The analog-to-digital conversion sub-unit 311 may include an a/D converter, the signal compiling sub-unit 312 may include a signal compiler, and the digital-to-analog conversion sub-unit 313 may include a D/a converter.
Exemplarily, fig. 5 is a schematic diagram of a process of processing the first driving signal by the signal compression unit to obtain the third driving signal according to an embodiment of the present invention. Referring to fig. 4-5, the working process of the analog-to-digital conversion sub-unit 311, the signal compiling sub-unit 312 and the digital-to-analog conversion sub-unit 313 included in the signal compression unit 310 is as follows:
for the convenience of describing the operation of the analog-to-digital conversion sub-unit 311, the signal compiling sub-unit 312, and the digital-to-analog conversion sub-unit 313, a high level code is defined as 1, and a low level code is defined as 0.
In the process (1), the analog-to-digital conversion subunit 311 converts the analog signal waveform output by the display driving chip 110, i.e., the first driving signal 01, into the first digital driving signal 111000111000; the process (2) is that the signal coding sub-unit 312 performs sampling coding on the first digital driving signal 111000111000 according to the compression ratio of 2/3 to obtain a second digital driving signal 11001100; process (3) is for the digital-to-analog converting subunit 313 to convert the second digital driving signal 11001100 into an analog signal waveform, the third driving signal 02.
As can be seen from the above embodiments, the analog-to-digital conversion sub-unit 311, the signal compiling sub-unit 312, and the digital-to-analog conversion sub-unit 313 only perform compression sampling on each of the first driving signals 01, but do not perform phase adjustment between each of the first driving signals 01. In this regard, according to this embodiment, the timing control unit 320 may adjust a phase between each of the third driving signals 02 output by the signal compression unit 310 according to the compression ratio, so as to obtain the second driving signal.
Exemplarily, fig. 6 is a schematic diagram of a first driving signal, a second driving signal, and a third driving signal provided by an embodiment of the present invention. As shown in fig. 6, the first drive signal 01, the second drive signal 03, and the third drive signal 02 each include a start signal STV, a clock signal CLK1, and a clock signal CLK2. The phase difference between the start signal STV, the clock signal CLK1 and the clock signal CLK2 in the first driving signal 01 is Δ X. The phase difference between the start signal STV, the clock signal CLK1 and the clock signal CLK2 in the third driving signal 02 is Δ X. The phase difference between the start signal STV, the clock signal CLK1 and the clock signal CLK2 in the second driving signal 03 is 2/3 Δ X.
Specifically, the a process is that the signal compressing unit 310 compresses the first drive signal 01 into the third drive signal 02 according to a compression ratio of 2/3. The process B is that the timing control unit 320 adjusts the phase among the start signal STV, the clock signal CLK1 and the clock signal CLK2 included in the third driving signal 02 according to the compression ratio of 2/3 to obtain the second driving signal 03.
On the basis of the above embodiment, optionally, fig. 7 is a schematic structural diagram of another control board provided in the embodiment of the present invention, and as shown in fig. 7, the signal processing module 300 further includes a storage unit 330; the signal compression unit 310 and the timing control unit 320 are both connected to the storage unit 330, and the storage unit 330 can store the third driving signal for one frame and output the stored third driving signal for one frame to the timing control unit 320.
Specifically, the digital-to-analog conversion sub-unit 313 in the signal compression unit 310 is connected to the storage unit 330, and the storage unit 330 may store the third driving signal output by the digital-to-analog conversion sub-unit 313, where the storage unit 330 stores the third driving signal for one frame at a time. After the storage unit 330 stores the third driving signal of one frame, the stored third driving signal of one frame can be transmitted to the timing control unit 320, so that the timing control unit 320 can be ensured to process the third driving signal of each frame in order, the problem of processing missing or disordered processing of the previous signal due to excessive data of the input third driving signal can be prevented, the correctness of the timing control unit 320 for outputting the second driving signal can be improved, and the stability of the control board for outputting the second driving signal can be improved to a certain extent.
On the basis of the foregoing embodiment, optionally, fig. 8 is a schematic structural diagram of another control board provided by the embodiment of the present invention, and as shown IN fig. 8, the data selection module 400 includes a control terminal C, a first input terminal IN1, a second input terminal IN2, and an output terminal OUT; the first input terminal IN1 is connected to the connection interface 120 of the display driver chip 110, the second input terminal IN2 is connected to the signal processing module 300, and the control terminal C is connected to the control signal line 510; the data selecting module 400 can switch on the data transmission channel between the first input terminal IN1 and the output terminal OUT or switch on the data transmission channel between the second input terminal IN2 and the output terminal OUT according to the control signal output by the control signal line 510, and output the first driving signal or the second driving signal.
Specifically, the control terminal C of the data selection module 400 may be connected to the host 500 through a control signal line 510. The host 500 is a control center for controlling the refresh frequency of the display device, and the host 500 may send a control signal to the control terminal C of the data selection module 400 through a control signal line 510. The data selection module 400 can gate the data transmission channel between the first input terminal IN1 and the output terminal OUT to output the first driving signal or gate the data transmission channel between the second input terminal IN2 and the output terminal OUT to output the second driving signal according to the control signal, so that the display device can realize the switching of the high and low refresh frequencies.
Illustratively, the following table: the host outputs different high and low levels, and the data selection module enables the data selector to correspondingly output a logic relation table of the first driving signal or the second driving signal according to different control signals.
| Host output | Data selector input | |
| 0 | 0 | A |
| 1 | 1 | Second drive signal |
As can be seen from the above table, the data selector mainly outputs the data of one of two types, and by setting the data selector, the output terminal can be controlled to output the first driving signal or the second driving signal when the control terminal of the data selector receives different signals.
Fig. 9 is a schematic structural diagram of a display device according to an embodiment of the present invention, and as shown in fig. 9, the display device 10 includes a control board 11 according to any embodiment of the present invention.
Wherein, display device 10 includes the utility model discloses the control panel 11 that arbitrary embodiment provided consequently has the utility model provides a control panel 11's beneficial effect, here is no longer described any more.
Fig. 10 is a schematic structural diagram of another display device according to an embodiment of the present invention, as shown in fig. 10, the display device 10 further includes a display panel 12 and a display driving chip 110, the display panel 12 includes a gate driving circuit 200; the display driving chip 110 is connected to the control board 11 through the connection interface 120 of the display driving chip 110, and the control board 11 is connected to the gate driving circuit 200; the control board 11 can convert the first driving signal generated by the display driving chip 110 into the second driving signal and output the first driving signal or the second driving signal to the gate driving circuit 200.
Specifically, the control board 11 includes a signal processing module 300 and a data selection module 400, the signal processing module 300 of the control board 11 is connected to the display driving chip 110 through the connection interface 120 of the display driving chip 110, and the data selection module 400 of the control board 11 is connected to the gate driving circuit 200. The signal processing module 300 of the control board 11 may convert the first driving signal generated by the display driving chip 110 into a second driving signal. The data selection module 400 of the control board 11 can output the first driving signal or the second driving signal to the gate driving circuit 200, so that the display device 10 can realize the switching of the high and low refresh frequencies.
Fig. 11 is a schematic structural diagram of another display device according to an embodiment of the present invention, as shown in fig. 11, the display device 10 further includes a host 500 connected to the control board 11, and the control end of the data selection module 400 is connected to the host 500 through a control signal line 510; the host 500 can control the data selection module 400 to output the first driving signal or the second driving signal.
The host 500 sends a control signal to the control terminal of the data selection module 400 through a signal control line, so as to control the data selection module 400 to output a first driving signal or a second driving signal according to the control signal.
Optionally, the gate driving circuit is connected to a start signal line and a clock signal line, and the start signal line and the clock signal line are connected to the output end of the data selection module; the gate driving circuit can output a scan signal of a first frequency according to the first driving signal or output a scan signal of a second frequency according to the second driving signal, the second frequency being greater than the first frequency.
Specifically, the data selection module may transmit a start signal included in the first driving signal or the second driving signal to the gate driving circuit through a start signal line, and the data selection module may also transmit a clock signal included in the first driving signal or the second driving signal to the gate driving circuit through a clock signal line. Since the frequency of the second driving signal may be greater than the frequency of the first driving signal, the first frequency of the scan signal output by the gate driving circuit according to the first driving signal is less than the second frequency of the scan signal output according to the second driving signal.
It should be understood that various forms of the flows shown above, reordering, adding or deleting steps, may be used. For example, the steps described in the present invention may be executed in parallel, may be executed sequentially, or may be executed in different orders, as long as the desired result of the technical solution of the present invention can be achieved, and the present invention is not limited thereto.
The above detailed description does not limit the scope of the present invention. It should be understood by those skilled in the art that various modifications, combinations, sub-combinations and substitutions may be made, depending on design requirements and other factors. Any modification, equivalent replacement or improvement made within the spirit and principle of the present invention should be included in the protection scope of the present invention.
Claims (10)
1. A control panel is characterized by comprising a signal processing module and a data selection module;
the signal processing module is connected with a connecting interface of the display driving chip; the signal processing module can convert a first driving signal of a gate driving circuit transmitted by a connection interface of the display driving chip into a second driving signal;
the data selection module is connected with the connection interface of the display driving chip and the signal processing module and can output the first driving signal or the second driving signal to the gate driving circuit; the gate driving circuit can output a scan signal of a first frequency according to the first driving signal or output a scan signal of a second frequency according to the second driving signal, wherein the second frequency is greater than the first frequency.
2. The control board of claim 1, wherein the output of the data selection module is capable of being connected to an enable signal line and a clock signal line, and the first driving signal and the second driving signal each comprise an enable signal and a clock signal.
3. The control board according to claim 1, wherein the signal processing module includes a signal compression unit and a timing control unit;
the signal compression unit is connected with a connection interface of the display driving chip and can compress the first driving signal into a third driving signal according to the compression ratio;
the time sequence control unit is connected with the signal compression unit and can adjust the phase of the third driving signal according to the compression ratio to obtain the second driving signal.
4. The control board of claim 3, wherein the signal compression unit comprises an analog-to-digital conversion subunit, a signal coding subunit and a digital-to-analog conversion subunit;
the analog-to-digital conversion subunit is connected with a connection interface of the display driving chip and can convert the first driving signal into a first digital driving signal;
the signal compiling subunit is connected with the analog-to-digital conversion subunit, and can perform sampling coding on the first digital driving signal according to the compression magnification to obtain a second digital driving signal;
the digital-to-analog conversion subunit is connected with the signal compiling subunit and can convert the second digital driving signal into a third driving signal.
5. The control board of claim 3, wherein the signal processing module further comprises a memory unit;
the signal compression unit and the time sequence control unit are both connected with the storage unit, and the storage unit can store one frame of the third driving signal and output the stored one frame of the third driving signal to the time sequence control unit.
6. The control board of claim 1, wherein the data selection module comprises a control terminal, a first input terminal, a second input terminal, and an output terminal;
the first input end is connected with a connection interface of the display driving chip, the second input end is connected with the signal processing module, and the control end is connected with the control signal line;
the data selection module can conduct a data transmission channel between the first input end and the output end or conduct a data transmission channel between the second input end and the output end according to a control signal output by the control signal line, and outputs the first driving signal or the second driving signal.
7. A display device comprising the control panel of any one of claims 1 to 6.
8. The display device according to claim 7, further comprising a display panel and a display driving chip, wherein the display panel includes a gate driving circuit;
the display driving chip is connected with a control panel through a connection interface of the display driving chip, and the control panel is connected with the grid driving circuit;
the control board can convert a first driving signal generated by the display driving chip into a second driving signal and output the first driving signal or the second driving signal to the gate driving circuit.
9. The display device according to claim 7, further comprising a host connected to the control board, wherein the control terminal of the data selection module is connected to the host through a control signal line;
the host can control the data selection module to output the first driving signal or the second driving signal.
10. The display device according to claim 7, wherein the gate driving circuit is connected to a start signal line and a clock signal line, the start signal line and the clock signal line being connected to an output terminal of the data selection module;
the gate driving circuit can output a scan signal of a first frequency according to the first driving signal or output a scan signal of a second frequency according to the second driving signal, wherein the second frequency is greater than the first frequency.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202221913042.0U CN217788008U (en) | 2022-07-20 | 2022-07-20 | Control panel and display device |
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| Application Number | Priority Date | Filing Date | Title |
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| CN202221913042.0U CN217788008U (en) | 2022-07-20 | 2022-07-20 | Control panel and display device |
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| CN217788008U true CN217788008U (en) | 2022-11-11 |
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| CN202221913042.0U Active CN217788008U (en) | 2022-07-20 | 2022-07-20 | Control panel and display device |
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