CN217590595U

CN217590595U - Circuit for restraining surge current by valley bottom conduction

Info

Publication number: CN217590595U
Application number: CN202221335535.0U
Authority: CN
Inventors: 邓俊高
Original assignee: Shenzhen Qianhai Shouke Technology Holdings Co ltd
Current assignee: Shenzhen Qianhai Shouke Technology Holdings Co ltd
Priority date: 2022-05-31
Filing date: 2022-05-31
Publication date: 2022-10-14
Anticipated expiration: 2032-05-31

Abstract

The utility model discloses a valley bottom switches on circuit of suppression surge current, including valley bottom detection circuitry, operational amplification and self-locking circuit and electronic switch circuit. The utility model discloses the circuit can restrain switching power supply system start instantaneous surge current, especially high-power switching power supply. The interference and impact of overlarge surge current on a power supply system are avoided, the safe operation of the power supply system is ensured, and the service life of related devices of a power supply line is prolonged. Meanwhile, due to the adoption of the MOSFET device, the power consumption is low, the heat emission is low, the efficiency of the whole power supply is improved, and in addition, due to the low heat emission, the heat dissipation is simple, so that the power supply miniaturization design of a designer is facilitated.

Description

Circuit for restraining surge current in valley bottom conduction

Technical Field

The utility model relates to a switching power supply, specific saying so relates to a circuit of valley bottom conduction suppression surge current.

Background

In the design of a switching power supply, an input characteristic parameter is called surge current, and the conventional definition of the surge current refers to peak current flowing into switching power supply equipment at the power-on moment of the switching power supply.

As shown in fig. 1, which is a simplified switching power supply, the input voltage first passes through an EMI filter, then through a bridge rectifier to become dc, and then through a very large electrolytic capacitor for smoothing, before entering the actual dc/dc converter. The input surge current is generated during the initial charging of the electrolytic capacitor and its magnitude depends on the magnitude of the input voltage at power-up and the total resistance of the circuit formed by the bridge rectifier and the electrolytic capacitor. If power is applied at the very peak point of the ac input voltage, a peak input inrush current occurs. If the current is not inhibited, the large surge current can reach more than 100A, and the serious current can often cause the input fuse to be blown or the contact of a closing switch to be blown out and a rectifier bridge to be damaged by overcurrent at the power-on moment of the power supply; the light person can also make the air switch not be switched on, which affects the safe operation of the power system.

As shown in fig. 2, which is a diagram of an inrush current waveform actually tested, the power input circuit has a NTC of power type 2.5 ohms connected in series, and the power specification is: inputting 90-264V 50/60Hz; outputting a 24VD capacitor C2.4A; nominal output power 58W. In a power supply product, as the power of the whole machine is increased, the capacity of an electrolytic capacitor for inputting smoothing filtering is larger, and the surge is larger.

In order to solve a series of problems caused by the overrun of the surge current of the power supply system, an electronic circuit can be adopted to restrain the surge current in an expected safe and reliable range. The prior art has focused on techniques for limiting current.

The existing method for restraining surge current of the switching power supply is commonly used for limiting startup surge current by connecting an NTC in series. As shown in fig. 3, fig. 3 is a circuit diagram of a prior art switching power supply with a series NTC for limiting inrush current during startup. The NTC resistor can be reduced along with the temperature rise, and when the switching power supply is started, the NTC resistor is at normal temperature and has high resistance, so that the current can be effectively limited; after the power supply is started, the NTC resistor can be heated up to about 110 ℃ rapidly due to self-heating heat, and the resistance value is reduced to about one-fifteenth of the room temperature, so that the power loss of the switching power supply during normal operation is reduced.

The serial NTC has the advantages that: the circuit is simple and practical and has low cost.

However, the serial NTC also has significant disadvantages: 1. the current limiting effect of the NTC resistor is greatly influenced by the ambient temperature: if the starting is carried out at low temperature (below zero), the resistance is overlarge, the charging current is too small, and the switching power supply can not be started; if the resistance of the resistor is too small at high temperature start-up, the effect of limiting the input inrush current may not be achieved. 2. The current limiting effect does not work well after a brief interruption of the incoming mains network (of the order of a few hundred milliseconds). During this brief interruption, the electrolytic capacitor has been discharged, while the NTC resistor is still at a high temperature and has a low resistance, at which point the NTC cannot effectively limit the current when the interruption is complete and requires an immediate restart of the power supply. 3. The power loss of the NTC resistor reduces the conversion efficiency of the switching power supply. 4. The NTC heats up to 110 ℃, which increases the difficulty of heat dissipation and is not beneficial to the miniaturization design of the power supply.

SUMMERY OF THE UTILITY MODEL

To the deficiency among the prior art, the to-be-solved technical problem of the utility model lies in providing a valley end switches on suppression surge current's circuit, designs the purpose that this valley end switches on suppression surge current's circuit: the function of inhibiting surge current is realized by limiting voltage and indirectly limiting current.

In order to solve the technical problem, the utility model discloses a following scheme realizes: the utility model discloses a circuit of suppression surge current switches on at bottom of millet, include:

the valley bottom detection circuit comprises a bridge rectifier diode BD2, a resistor R6 and an optocoupler U6, wherein the input end of the bridge rectifier diode BD2 is connected with mains supply, rectified and then outputs direct current voltage VD to the resistor R6, the other end of the resistor R6 is connected with the positive electrode of the light emitting end of the optocoupler U6, and the negative electrode of the light emitting end of the optocoupler U6 is grounded and connected to the negative electrode of the output pin of the bridge rectifier diode BD 2;

the operational amplification and self-locking circuit comprises a double operational amplifier U5, a resistor R34, a resistor R35, a resistor R36, a resistor R37, a resistor R38, a diode D7, a diode D10, a diode D11, a voltage stabilizing diode D12, a capacitor C39 and a polar capacitor C8, wherein pins 8 of the double operational amplifier U5 and pins 4 of the double operational amplifier U5 are respectively connected with VCC and GND, a non-inverting input end of a built-in first amplifier A is connected with the resistor R35, the capacitor C39, the resistor R38 and the cathode of the diode D7, an inverting input end of the first amplifier A is connected with the resistors R36, R37 and the cathode of the diode D11, a built-in second amplifier B of the double operational amplifier U5 is vacant, the anode of the diode D7 is connected with the output end of the first amplifier A, the other end of the resistor R35 is connected to VCC, the other end of the resistor R36 and a collector of a light receiving end of the optical coupler U6, the other end of the capacitor C39, the other end of the resistor R38 and the other end of the resistor R37 are all connected to 4 pins of the dual operational amplifier U5, the anode of the diode D11 is connected to the cathode of the diode D10, the anode of the diode D10 is connected to an emitter of the light receiving end of the optical coupler U6, the cathode of the polar capacitor C8 is grounded and connected to 4 pins of the dual operational amplifier U5, the voltage stabilizing diode D12 is connected in parallel with the polar capacitor C8, the anode of the voltage stabilizing diode D12 is connected to the grounding end of the polar capacitor C8, the cathode of the voltage stabilizing diode D12 is connected to the resistors R34 and VCC, and the other end of the resistor R34 is connected to VCC;

the electronic switch circuit comprises a transistor Q3 and a resistor R14, wherein the source electrode of the transistor Q3 is grounded, the resistor R14 is connected between the source electrode and the grid electrode of the transistor Q3, and the grid electrode of the transistor Q3 is connected to the output end of the first amplifier A.

Further, the drain electrode of the transistor Q3 is connected to the negative electrode of the polar capacitor C2, the positive electrode of the polar capacitor C2 is connected to the negative electrode of the silicon carbide schottky power diode D2 and the negative electrode of the diode D1, the positive electrode of the silicon carbide schottky power diode D2 is connected to one end of the inductor L2, the other end of the inductor L2 is connected to one end of the capacitor C1 and the positive electrode output end of the bridge rectifier diode BD1, the positive electrode of the diode D1 is connected to the positive electrode output end of the bridge rectifier diode BD1, the other end of the capacitor C1 is grounded and connected to the negative electrode output end of the bridge rectifier diode BD1, and the input end of the bridge rectifier diode BD1 is connected to the mains supply.

Compared with the prior art, the beneficial effects of the utility model are that: the utility model discloses the technique mainly focuses on the voltage limiting, follows the voltage limiting and arrives the current-limiting to the suppression surge current function has been realized.

1. The current limiting effect is not influenced by the ambient temperature, and the capabilities of low-temperature (below zero) starting and high-temperature starting and inhibiting surge current are the same.

2. The current limiting effect is not affected by a short input main power grid interruption (about several hundred milliseconds), after the interruption the electrolytic capacitor is discharged, the power supply is restarted, and the control circuit is restarted.

3. The electronic switch adopts the MOSFET, the internal resistance is smaller than the NTC, the power consumption is smaller than the NTC, and the conversion efficiency of the switching power supply is improved.

4. The MOSFET has small internal resistance and low power consumption, is easy to be designed for heat dissipation, and is beneficial to the miniaturization design of a power supply.

The utility model discloses the circuit can restrain switching power supply system start instantaneous surge current, especially high-power switching power supply. The interference and impact of excessive surge current on the power supply system are avoided, the safe operation of the power supply system is ensured, and the service life of related devices of a power supply line is prolonged. Meanwhile, due to the adoption of the MOSFET device, the power consumption is low, the heat emission is low, the efficiency of the whole power supply is improved, and in addition, due to the low heat emission, the heat dissipation is simple, so that the power supply miniaturization design of a designer is facilitated.

Drawings

Fig. 1 is a simplified circuit diagram of a switching power supply in the prior art.

Fig. 2 is a diagram of a surge current waveform of a practical test in the prior art.

Fig. 3 is a circuit diagram of a prior art switching power supply with a series NTC to limit inrush current during startup.

Fig. 4 to 6 are circuit diagrams of the valley bottom conduction surge current suppression of the present invention.

Fig. 7 is a waveform diagram of the valley bottom detection circuit of the present invention.

Fig. 8-17 are circuit diagrams of the circuit for valley bottom conduction and surge current suppression according to an embodiment of the present invention.

Fig. 18 is a waveform diagram of the voltage VD and the voltage Va according to the time period.

Fig. 19 is another waveform diagram of the present invention in which the voltage VD and the voltage Va are varied in time periods.

Detailed Description

The technical solution in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, so that the advantages and features of the present invention can be more easily understood by those skilled in the art, thereby making more clear and definite definitions of the protection scope of the present invention. It is obvious that the described embodiments of the invention are only some of the embodiments of the invention, and not all of them. Based on the embodiments in the present invention, all other embodiments obtained by a person skilled in the art without creative work belong to the protection scope of the present invention.

Furthermore, the technical features mentioned in the different embodiments of the invention described below can be combined with each other as long as they do not conflict with each other.

Example 1: the utility model discloses a concrete structure as follows:

referring to fig. 1-19, a valley bottom conduction surge current suppressing circuit of the present invention includes:

the valley bottom detection circuit 2 comprises a bridge rectifier diode BD2, a resistor R6 and an optocoupler U6, wherein the input end of the bridge rectifier diode BD2 is connected with mains supply and outputs direct current voltage VD to the resistor R6 after rectification, the other end of the resistor R6 is connected with the positive electrode of the light emitting end of the optocoupler U6, and the negative electrode of the light emitting end of the optocoupler U6 is grounded and connected to the negative electrode of the output pin of the bridge rectifier diode BD 2;

the operational amplification and self-locking circuit 3 comprises a double operational amplifier U5, a resistor R34, a resistor R35, a resistor R36, a resistor R37, a resistor R38, a diode D7, a diode D10, a diode D11, a voltage stabilizing diode D12, a capacitor C39 and a polar capacitor C8, wherein 8 pins of the double operational amplifier U5 and 4 pins of the double operational amplifier U5 are respectively connected with VCC and GND, a non-inverting input end of a built-in first amplifier A is connected with the resistor R35, the capacitor C39, the resistor R38 and the cathode of the diode D7, an inverting input end of the first amplifier A is connected with the resistor R36, the resistor R37 and the cathode of the diode D11, a built-in second amplifier B of the double operational amplifier U5 is vacant, the anode of the diode D7 is connected with the output end of the first amplifier A, the other end of the resistor R35 is connected to VCC, the other end of the resistor R36 and a collector of a light receiving end of the optical coupler U6, the other end of the capacitor C39, the other end of the resistor R38 and the other end of the resistor R37 are all connected to 4 pins of the dual operational amplifier U5, the anode of the diode D11 is connected to the cathode of the diode D10, the anode of the diode D10 is connected to an emitter of the light receiving end of the optical coupler U6, the cathode of the polar capacitor C8 is grounded and connected to 4 pins of the dual operational amplifier U5, the voltage stabilizing diode D12 is connected in parallel with the polar capacitor C8, the anode of the voltage stabilizing diode D12 is connected to the grounding end of the polar capacitor C8, the cathode of the voltage stabilizing diode D12 is connected to the resistors R34 and VCC, and the other end of the resistor R34 is connected to VCC;

the electronic switch circuit 1 comprises a transistor Q3 and a resistor R14, wherein the source of the transistor Q3 is grounded, the resistor R14 is connected between the source and the gate of the transistor Q3, and the gate of the transistor Q3 is connected to the output end of the first amplifier a.

A preferred technical solution of this embodiment: the drain electrode of the transistor Q3 is connected to the negative electrode of the polar capacitor C2, the positive electrode of the polar capacitor C2 is connected to the negative electrode of the silicon carbide Schottky power diode D2 and the negative electrode of the diode D1, the positive electrode of the silicon carbide Schottky power diode D2 is connected with one end of the inductor L2, the other end of the inductor L2 is connected to one end of the capacitor C1 and the positive electrode output end of the bridge rectifier diode BD1, the positive electrode of the diode D1 is connected to the positive electrode output end of the bridge rectifier diode BD1, the other end of the capacitor C1 is grounded and connected to the negative electrode output end of the bridge rectifier diode BD1, and the input end of the bridge rectifier diode BD1 is connected to the mains supply.

Example 2:

the following is that the utility model discloses the specific theory of operation of circuit that suppresses surge current is switched on at the bottom of the millet:

the utility model discloses the circuit of suppression surge current is switched on at the bottom of the millet, mainly comprises 3 most, is bottom of the millet detection circuitry 2, operational amplification and self-locking circuit 3 and electronic switch circuit 1 respectively.

The valley bottom detection circuit 2 mainly comprises a bridge rectifier diode BD2, a resistor R6 and an optocoupler U6;

the operational amplification and self-locking circuit 3 mainly comprises a double operational amplifier U5, a resistor R35, a resistor R36, a resistor R37, a resistor R38, a diode D7, a diode D10, a diode D11, a diode D12 and a capacitor C8;

the electronic switch circuit 1 mainly comprises a transistor Q3, a resistor R14;

in the valley bottom detection circuit 2, ac mains supply is rectified by the bridge rectifier diode BD2 and then converted into pulsating dc voltage VD, and the waveform is as shown in fig. 7. The positive end of the pulsating voltage passes through a current limiting resistor R6 to a pin 1 of the optocoupler U6 to a pin 2 of the optocoupler U6, and finally returns to the negative end of the pulsating voltage. When the ripple voltage is in the valley bottom position, the current I1 flowing through 1 pin of opto-coupler U6 and 2 pins of opto-coupler U6 is too small, and 3 pins of opto-coupler U6 and 4 pins of opto-coupler U6 are not saturated and switched on, and 3 pins of opto-coupler U6 and 4 pins of opto-coupler U6 are in the closed state. When the ripple voltage rises, the current I1 flowing through the pin 1 of the optocoupler U6 and the pin 2 of the optocoupler U6 increases, the pin 3 of the optocoupler U6 and the pin 4 of the optocoupler U6 are saturated and switched on, and the pin 3 of the optocoupler U6 and the pin 4 of the optocoupler U6 are in a switched-on state at the moment. With this function, the valley bottom detection circuit 2 can trigger the subsequent operational amplification and self-locking circuit 3.

For the convenience of analysis, the operational amplification and self-locking circuit 3 ignores the influence of the optocoupler U6, and assumes VCC =12V, and calculates Va =51/151vcc =4.05v according to the circuit parameters, with the resistor R35=51K, the resistor R36=100K, the resistor R37=51K, and the resistor R38= 100K. Due to the existence of the capacitor C39, vb has the initial voltage of 0V, and after passing through the resistor R39x the capacitor C, vb =51/151VCC =7.94V, wherein, 2 stages exist, va > Vb in the stage that the voltage of Vb is 0-4.05V, so VC = VoL (approximately equal to 0V); va < Vb during the period when the Vb voltage is 4.5-7.94V, so VC = VoH (approximately equal to the VCC voltage).

An electronic switching circuit 1 in which a transistor Q3 is turned off when VC = VoL (approximately equal to 0V); at VC = VoH (approximately equal to the VCC voltage), transistor Q3 is turned on.

Fig. 8-17 are circuit diagrams of the circuit for valley bottom conduction surge current suppression according to an embodiment of the present invention. After a power supply is powered on, alternating current mains supply passes through a transformer LF1 and a transformer LF2, the power supply is divided into 2 paths, one path is divided into 8 pins of a bridge rectifier diode BD1, a diode D1 (L2) and a control IC U2 (the type of the control IC U2 is TEA2017, the control IC U2 is an LLC and PFC integrated control IC capable of being configured digitally), the 13 pins of the control IC U2, a capacitor C4/a capacitor C37-PGND are arranged, at the moment, the capacitor C4/the capacitor C37 are charged, the voltage simultaneously charges a capacitor C8 through a resistor R34, the capacitor C8 is charged to the working voltage of a double operational amplifier U5, and the double operational amplifier U5 starts to work. And the other path of the current path runs a bridge rectifier diode BD 2-a resistor R6-an opto-coupler U6-PGND. At the time when the dual operational amplifier U5 starts to work, the input voltage amplitude VD and Va have only 2 relations, and firstly, VD is too small and does not affect the voltage of Va, which is defined as relation 1 in fig. 18; secondly, VD is large enough to raise Va voltage, and the maximum voltage at VCC is limited to 12-0.7 v =10.6v, defined herein as relationship 2, as shown in fig. 19.

In the stage t0-t1 of the relation 1, the charging stage of the capacitor C39, the voltage Va is not influenced when VD is too small, but Va is enabled to be larger than Vb by selecting the capacitor C39 with proper capacity, so that the VC output at the pin 1 of the dual operational amplifier U5 is VoL; in the stage from t1 to t2, the voltage of Va is rapidly increased to 10.6V due to the action of VD, and Vb is charged to the stable voltage of 7.94V after a period of time, wherein in the stage, va is greater than Vb, and the VC output at the pin 1 of the dual operational amplifier U5 is VoL; along with the amplitude of the input voltage changing from the peak value to the valley bottom, in the process, the voltage of Va also drops, when Va drops to be smaller than Vb, the voltage of a pin 1 of the dual operational amplifier U5 is inverted from VoL to VoH, meanwhile, voH is led to Vb through the feedback diode, the voltage of Vb rises to VoH-0.7V at the moment, the input voltage rises in the next period is guaranteed, when I2 is the maximum, va is only VoH-0.7-0.7V at the maximum, vb is guaranteed to be 0.7V larger than the voltage of Va, and therefore the purpose that Vb is always larger than Va after VC is inverted to VoH as long as the input voltage is not powered off is achieved, and the locked state is achieved.

During the period t0-t1 of the relation 2, the charging period of the capacitor C39, wherein VD is large enough to enable the voltage Va to rapidly rise to 10.6V, and the voltage Vb is still in the charging process, so that Va is larger than Vb, and the VC output at the pin 1 of the dual operational amplifier U5 is VoL; in the stage from t1 to t2, va is kept at 10.6V due to the effect of VD, vb is fully charged to 7.94V after a period of time and starts to keep stable voltage, va is still larger than Vb in this stage, and the 1 pin VC of the dual operational amplifier U5 still outputs VoL; along with the valley bottom of the input voltage amplitude from the peak value, in the process, the voltage of Va also drops, when Va drops to be smaller than Vb, the voltage of pin 1 of the double operational amplifier U5 is inverted to VoH from VoL, at the same time, voH is connected to Vb through the feedback diode, the voltage of Vb rises to VoH-0.7V at the moment, the input voltage rises in the next period is ensured, when I2 is maximum, the maximum voltage of Va is only VoH-0.7-0.7V, the voltage of Vb is ensured to be 0.7V larger than the voltage of Va, and therefore the purpose that VC is always larger than Va after being inverted to VoH as long as the input voltage is not powered off is achieved, and the Vb achieves the locked state.

From the above state 1 and state 2, it can be seen that after the power supply is powered on and before the dual operational amplifier U5 starts to work, the voltage VC is VoL, the transistor Q3 is turned off, the capacitor C2 has no charging loop, and there is no surge current. After the dual operational amplifier U5 starts to operate, no matter the relation 1 or the relation 2, in the stage t0 to t1 of starting to operate, VC is still equal to VoL, the transistor Q3 is turned off, the capacitor C2 has no charging loop, and no surge current exists. Until the next valley bottom comes, the VC voltage is turned from VoL to VoH and is kept, the transistor Q3 is conducted, the capacitor C2 starts to charge at the valley bottom, and the initial charging current of the capacitor C2 is very small due to the fact that the valley bottom voltage is very small, so that the purpose of inhibiting surge current by conducting the valley bottom is achieved.

The VC voltage is inverted from VoL to VoH and is kept, the 3 pin of the double operational amplifier U5 and the 4 pin of the double operational amplifier U5 are required to be triggered from connection to disconnection, and the 3 pin of the double operational amplifier U5 and the 4 pin of the double operational amplifier U5 are determined by the size of a current-limiting resistor R6 from connection to disconnection, so that the resistance value of the resistor R6 is adjusted, and the valley voltage of the connection of the trigger transistor Q3 can be adjusted.

To sum up, the utility model discloses the circuit can restrain switching power supply system start-up in the twinkling of an eye surge current, especially high-power switching power supply. The interference and impact of overlarge surge current on a power supply system are avoided, the safe operation of the power supply system is ensured, and the service life of related devices of a power supply line is prolonged. Meanwhile, the MOSFET device is adopted, so that the power consumption is low, the heating is low, the efficiency of the whole power supply is improved, and in addition, the heating is low, the heat dissipation is simple, and the miniaturization design of the power supply is facilitated for designers.

The above description is only the preferred embodiment of the present invention, and not intended to limit the scope of the present invention, and all the equivalent structures or equivalent processes that are used in the specification and drawings of the present invention can be directly or indirectly applied to other related technical fields, and all the same principles are included in the scope of the present invention.

Claims

1. A valley conduction inrush current suppression circuit, comprising:

the valley bottom detection circuit (2) comprises a bridge rectifier diode BD2, a resistor R6 and an optocoupler U6, wherein the input end of the bridge rectifier diode BD2 is connected with a mains supply and outputs a direct current voltage VD to the resistor R6 after rectification, the other end of the resistor R6 is connected with the positive electrode of the light emitting end of the optocoupler U6, and the negative electrode of the light emitting end of the optocoupler U6 is grounded and connected to the negative electrode of the output pin of the bridge rectifier diode BD 2;

an operational amplification and self-locking circuit (3), the operational amplification and self-locking circuit (3) comprises a double operational amplifier U5, a resistor R34, a resistor R35, a resistor R36, a resistor R37, a resistor R38, a diode D7, a diode D10, a diode D11, a voltage stabilizing diode D12, a capacitor C39 and a polar capacitor C8, the pin 8 of the double operational amplifier U5 and the pin 4 of the double operational amplifier U5 are respectively connected to VCC and GND, the non-inverting input end of a built-in first amplifier A is connected with the resistor R35, the capacitor C39, the resistor R38 and the cathode of the diode D7, the inverting input end of the first amplifier A is connected with the resistors R36, R37 and the cathode of the diode D11, the built-in second amplifier B of the double operational amplifier U5 is vacant, the anode of the diode D7 is connected to the output end of the first amplifier A, the other end of the resistor R35 is connected to the other ends of the resistors R36 and the collector of the light receiving end of the diode U6, the other ends of the resistors VCC, the resistor R38, the other ends of VCC and the resistors R37 and the resistor R12 are connected to the emitter of the diode D6, the diode D12 of the diode D8 is connected to the diode D8, the positive pole of the diode D6 is connected to the diode D8, the diode D12 of the diode D8, the diode D6 is connected to the diode D8, and the emitter of the diode D8, and the diode D10 are connected to the diode D8, and the diode D8, the emitter of the diode D8, and the diode D8 are connected to the diode D6 in parallel connection end of the emitter of the diode D8;

the electronic switch circuit (1) comprises a transistor Q3 and a resistor R14, wherein the source electrode of the transistor Q3 is grounded, the resistor R14 is connected between the source electrode and the grid electrode of the transistor Q3, and the grid electrode of the transistor Q3 is connected to the output end of the first amplifier A.

2. The circuit according to claim 1, wherein a drain of the transistor Q3 is connected to a negative electrode of a polar capacitor C2, an anode of the polar capacitor C2 is connected to a negative electrode of a silicon carbide schottky power diode D2 and a negative electrode of a diode D1, the anode of the silicon carbide schottky power diode D2 is connected to one end of an inductor L2, the other end of the inductor L2 is connected to one end of a capacitor C1 and an anode output end of a bridge rectifier diode BD1, the anode of the diode D1 is connected to an anode output end of the bridge rectifier diode BD1, the other end of the capacitor C1 is grounded and connected to a cathode output end of the bridge rectifier diode BD1, and an input end of the bridge rectifier diode BD1 is connected to a commercial power.