CN217562176U

CN217562176U - Control circuit for multimedia controller

Info

Publication number: CN217562176U
Application number: CN202221268010.XU
Authority: CN
Inventors: 宋维光
Original assignee: Chengdu Yidu Optoelectronics Technology Co ltd
Current assignee: Chengdu Yidu Optoelectronics Technology Co ltd
Priority date: 2022-05-25
Filing date: 2022-05-25
Publication date: 2022-10-11
Anticipated expiration: 2032-05-25

Abstract

The utility model discloses a control circuit for multimedia controller, including MCU circuit, relay output circuit, communication circuit, interface circuit and power management circuit, wherein, the relay output circuit is used for outputting control signal; the communication circuit is used for wireless communication control; the power management circuit is used for changing voltage and supplying power to the control circuit; the MCU circuit comprises a main control chip U1, a clock oscillation circuit, a power supply filter circuit, a power-on reset circuit and a backup power supply circuit. In the utility model, an MCU circuit, a relay output circuit, a communication circuit, an interface circuit and a power management circuit are arranged; realize switch LAN direct control through communication circuit, solved prior art, wired control wiring is complicated, leads to the inconvenient problem of sand table control.

Description

Control circuit for multimedia controller

Technical Field

The utility model belongs to the technical field of controller control circuit, specifically be a control circuit for multimedia controller.

Background

The sand table is a model piled by materials such as silt and the like according to a certain proportion relation according to a topographic map or an aerial photo. Users are generally helped to know the environment of the area where the building is located, typically in the form of a sand table; for example, a future city planning scenario is simulated by a city sand table. In order to control the sand table to show different scenes, a sand table controller is usually used for controlling the sand table.

At present, a sand table controller on the market uses a wired control power switch, so that when a plurality of sand tables need to be controlled, the problems of complex wiring and inconvenient control exist.

SUMMERY OF THE UTILITY MODEL

An object of the utility model is to provide a control circuit for multimedia controller to in the prior art who provides among the solution background art, sand table controller uses wired control switch, leads to when a plurality of sand tables of needs control, and it is complicated to have the wiring, controls inconvenient problem.

In order to solve the technical problem, the utility model discloses the technical scheme who adopts is:

a control circuit for a multimedia controller comprises an MCU circuit, a relay output circuit, a communication circuit, an interface circuit and a power management circuit, wherein the relay output circuit is used for outputting a control signal; the communication circuit is used for wireless communication control; the power management circuit is used for changing voltage and supplying power to the control circuit;

the MCU circuit comprises a main control chip U1, a clock oscillation circuit, a power supply filter circuit, a power-on reset circuit and a backup power supply circuit; the clock oscillation circuit is used for providing a clock source for the main control chip U1, and the power supply filter circuit is used for filtering an input power supply signal; the backup power circuit is used for ensuring that the clock circuit can still normally run after the system is powered off;

the relay output circuit comprises a control chip U2, a pin connector, a relay circuit and a state display circuit; one end of the control chip U2 is connected with the main control chip U1, the other end of the control chip U2 is connected with the pin connector, the pin connector is connected with the relay circuit, the relay circuit outputs a control signal, and the state display circuit is used for displaying an output state.

According to the technical scheme, the clock oscillation circuit comprises a chip oscillation circuit and a clock source oscillation circuit; the chip oscillation circuit comprises a crystal oscillator Y2, a capacitor C5, a capacitor C6 and a resistor R15; a No. 5 pin of the main control chip U1 is respectively connected with a No. 1 pin of the crystal oscillator Y2, one end of a resistor R15 and one end of a capacitor C6; a No. 6 pin of the main control chip U1 is respectively connected with a No. 2 pin of the crystal oscillator Y2, the other end of the resistor R15 and one end of the capacitor C5; the other end of the capacitor C5 is grounded, and the other end of the capacitor C6 is grounded;

the clock source oscillation circuit comprises a crystal oscillator Y1, a capacitor C7 and a capacitor C8; the pin 3 of the main control chip U1 is respectively connected with the pin 1 of the crystal oscillator Y1 and one end of the capacitor C8, and the pin 4 of the main control chip U1 is respectively connected with the pin 2 of the crystal oscillator Y1 and one end of the capacitor C7; the other end of the capacitor C7 is grounded, and the other end of the capacitor C8 is grounded.

According to the technical scheme, the power supply filter circuit comprises a resistor R23, a capacitor C10 and a capacitor C11; one end of the resistor R23 is connected with a power supply, and the other end of the resistor R23 is respectively connected with one end of the capacitor C10, one end of the capacitor C11 and the No. 9 pin of the main control chip U1; the other terminal of the capacitor C10 is grounded, and the other terminal of the capacitor C11 is grounded.

According to the technical scheme, the power-on reset circuit comprises a resistor R21 and a capacitor C9, one end of the resistor R21 is connected with a power supply, and the other end of the resistor R21 is respectively connected with one end of the capacitor C9 and a No. 7 pin of a main control chip U1; the other terminal of the capacitor C9 is grounded.

According to the technical scheme, the pin No. 1 of the control chip U2 is connected with the pin No. 38 of the main control chip U1, and the pin No. 2 and the pin No. 3 of the control chip U2 are respectively connected with the pins No. 32 and No. 33 of the main control chip U1; pins 4 to 8 of the control chip U2 are respectively connected with pins 25 to 29 of the main control chip U1, the other end of the control chip U2 is connected with the pin connector, a port 9 of the control chip U2 is grounded, and a port 10 of the control chip U2 is connected with a power supply.

According to the technical scheme, the pin connector comprises a pin connector J1 and a pin connector J2, and the pin connector J1 is connected with the pin connector J2; pins 11 to 18 of the control chip U2 are connected with pins 2 to 9 of the pin connector J1, and the pin 1 of the pin connector J1 is connected with a 12V power supply; pins 2-9 of the pin connector J2 are connected with the relay circuit, and pin 1 of the pin connector J2 is connected with a 12V power supply.

According to the technical scheme, the relay circuit comprises a relay body and an indicating circuit, wherein a pin 1 of the relay body is connected with a pin 2 of the J1, a pin 2 of the relay body is internally connected with a pin 1 of the relay body, a pin 2 of the relay body is also connected with a 12V power supply, a pin 3 of the relay body is internally connected with a pin 5 to form a normally closed switch, and a pin 3 is connected with the inside of a pin 4 when the relay acts to form a normally open switch;

the indicating circuit comprises a light emitting diode L1 and a resistor R71; one end of the light emitting diode L1 is connected with the No. 2 pin of the J2, the other end of the light emitting diode L1 is connected with one end of the resistor R71, and the other end of the resistor R71 is connected with a 12V power supply.

According to the technical scheme, the relay circuit is provided with a plurality of relays.

According to the technical scheme, the interface circuit comprises a control chip U4, an automatic reset circuit, a crystal oscillator circuit and a socket element P18; the automatic reset circuit comprises a resistor R47, a resistor R49, a resistor R60, a resistor R59, a triode Q2, a triode Q3 and a diode D7; an emitting electrode of the triode Q2 is connected with a power supply, a collector electrode of the triode Q2 is connected with one end of a resistor R49, the other end of the resistor R49 is connected with a No. 44 pin of the main control chip U1, a base electrode of the triode Q2 is connected with one end of a resistor R47, and the other end of the resistor R47 is respectively connected with an emitting electrode of the triode Q3 and a No. 14 pin of the control chip U4; a collector of the triode Q3 is respectively connected with one end of a resistor R59 and one end of a diode D7, the other end of the resistor R59 is connected with a power supply, and the other end of the diode D7 is connected with a No. 7 pin of the main control chip U1; the base electrode of the triode Q3 is connected with one end of a resistor R60, and the other end of the resistor R60 is connected with a No. 13 pin of a control chip U4;

pin 1 of the control chip U4 is grounded, pin 2 of the control chip U4 is connected with pin 30 of the main control chip U1, pin 3 of the control chip U4 is connected with pin 31 of the control chip U1, pin 4 of the control chip U4 is connected with the filter capacitor C20, pin 5 of the control chip U4 is connected with pin 5 of the socket element P18, and pin 6 of the control chip U4 is connected with pin 3 of the socket element P18;

pins

7 and 8 of the socket component P18 are grounded, and

pins

1 and 2 are connected with a 5V power supply;

the crystal oscillator circuit comprises a crystal oscillator Y3, a capacitor C21 and a capacitor C27; no. 1 pin of crystal oscillator Y3 is connected with No. 7 pin of control chip U4, no. 2 pin of crystal oscillator Y3 is connected with No. 8 pin of control chip U4, and the one end of electric capacity C21 is connected with No. 1 pin of crystal oscillator Y3, and the other end of electric capacity C21 is connected with the one end of electric capacity C27, and the other end of electric capacity C27 is connected with No. 2 pin of crystal oscillator Y3, and electric capacity C21 and electric capacity C27's common terminal ground connection.

According to the technical scheme, the power management circuit comprises a control chip U6, a resistor R1, a resistor R2, a resistor R3, a resistor R4, a resistor R5, a resistor R6, a capacitor C3, a capacitor C7, a capacitor C8, a capacitor C12, a capacitor C36, an inductor LH1 and a voltage stabilizing diode D5; the No. 1 pin of the control chip U6 is connected with one end of a capacitor C3, an inductor LH1 and one end of a voltage stabilizing diode D5 respectively, and the other end of the capacitor C3 is connected with the No. 8 pin of the control chip U6; the other end of the voltage-stabilizing diode D5 is grounded, the other end of the inductor LH1 is respectively connected with a power supply, a resistor R6 and one end of a capacitor C12, and the other end of the capacitor C12 is grounded; the other end of the resistor R6 is respectively connected with a No. 4 pin of the control chip U6 and one end of the resistor R5; the other end of the resistor R5 is grounded;

a pin No. 2 of the control chip U6 is respectively connected with one ends of a resistor R1 and a resistor R2, the other end of the resistor R1 is grounded, and the other end of the resistor R2 is respectively connected with a power supply, one end of a capacitor C36 and a pin No. 7 of the control chip U6; the other end of the capacitor C36 is grounded;

no. 3 pin of control chip U6 is connected with electric capacity C7 and electric capacity C8's one end respectively, and electric capacity C7's the other end is connected with resistance R3's one end, and resistance R3's the other end is connected the back ground connection with electric capacity C8's the other end.

Compared with the prior art, the utility model discloses following beneficial effect has:

in the utility model, the MCU circuit, the relay output circuit, the communication circuit, the interface circuit and the power management circuit are arranged; realize switch LAN direct control through communication circuit, solved prior art, wired control wiring is complicated, leads to the inconvenient problem of sand table control.

Drawings

FIG. 1 is a circuit diagram of the MCU of the present invention;

fig. 2 is one of the output circuit diagrams of the relay of the present invention;

fig. 3 is a second circuit diagram of the relay output circuit of the present invention;

fig. 4 is an interface circuit diagram of the present invention;

FIG. 5 is a diagram of a switching circuit of the present invention;

FIG. 6 is a circuit diagram of the buzzer of the present application;

FIG. 7 is a power management circuit diagram of the present invention;

fig. 8 is a communication circuit diagram of the present invention.

Detailed Description

The technical solutions in the embodiments of the present invention will be described clearly and completely with reference to the accompanying drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments in the present invention, all other embodiments obtained by a person skilled in the art without creative work belong to the protection scope of the present invention.

Example one

As shown in fig. 1 to 8, a control circuit for a multimedia controller includes an MCU circuit, a relay output circuit, a communication circuit, an interface circuit, and a power management circuit, wherein the relay output circuit is used for outputting a control signal; the communication circuit is used for wireless communication control; the power management circuit is used for changing voltage and supplying power to the control circuit;

In the utility model, the MCU circuit, the relay output circuit, the communication circuit, the interface circuit, the conversion circuit, the power management circuit and the buzzer circuit are arranged; realize switch LAN direct control through communication circuit, solved prior art, wired control wiring is complicated, leads to the inconvenient problem of sand table control.

Example two

This embodiment is a further refinement of the first embodiment. As shown in fig. 1, the clock oscillator circuit includes a chip oscillator circuit and a clock source oscillator circuit; the chip oscillation circuit comprises a crystal oscillator Y2, a capacitor C5, a capacitor C6 and a resistor R15; a No. 5 pin of the main control chip U1 is respectively connected with a No. 1 pin of the crystal oscillator Y2, one end of a resistor R15 and one end of a capacitor C6; a No. 6 pin of the main control chip U1 is respectively connected with a No. 2 pin of the crystal oscillator Y2, the other end of the resistor R15 and one end of the capacitor C5; the other end of the capacitor C5 is grounded, and the other end of the capacitor C6 is grounded;

As shown in fig. 1, the power filter circuit includes a resistor R23, a capacitor C10, and a capacitor C11; one end of the resistor R23 is connected with a power supply, and the other end of the resistor R23 is respectively connected with one end of the capacitor C10, one end of the capacitor C11 and the No. 9 pin of the main control chip U1; the other end of the capacitor C10 is grounded, and the other end of the capacitor C11 is grounded.

As shown in fig. 1, the power-on reset circuit includes a resistor R21 and a capacitor C9, one end of the resistor R21 is connected to the power supply, and the other end of the resistor R21 is connected to one end of the capacitor C9 and a pin No. 7 of the main control chip U1, respectively; the other terminal of the capacitor C9 is grounded.

As shown in fig. 2, pin No. 1 of the control chip U2 is connected to pin No. 38 of the main control chip U1, and pin No. 2 and pin No. 3 of the control chip U2 are connected to pins No. 32 and 33 of the main control chip U1, respectively; pins 4 to 8 of the control chip U2 are respectively connected with pins 25 to 29 of the main control chip U1, the other end of the control chip U2 is connected with the pin connector, a port 9 of the control chip U2 is grounded, and a port 10 of the control chip U2 is connected with a power supply.

The pin connector comprises a pin connector J1 and a pin connector J2, and the pin connector J1 is connected with the pin connector J2; pins 11 to 18 of the control chip U2 are connected with pins 2 to 9 of the pin connector J1, and the pin 1 of the pin connector J1 is connected with a 12V power supply; pins 2 to 9 of the pin connector J2 are connected with a relay circuit, and a pin 1 of the pin connector J2 is connected with a 12V power supply.

The relay circuit comprises a relay body and an indicating circuit, wherein a pin 1 of the relay body is connected with a pin 2 of the J1, a pin 2 of the relay body is internally connected with the pin 1 of the relay body, the pin 2 of the relay body is also connected with a 12V power supply, and a pin 3 of the relay body is internally connected with a pin 4 to form a normally open switch;

as shown in fig. 3, the indicating circuit includes a light emitting diode L1 and a resistor R71; one end of the light emitting diode L1 is connected with the No. 2 pin of the J2, the other end of the light emitting diode L1 is connected with one end of the resistor R71, and the other end of the resistor R71 is connected with a 12V power supply.

The relay circuit is provided in plurality. The control chip U2 is provided with two sets, and the pin connector J1 and the pin connector J2 are also provided with two sets. Two sets of control chips U2 are respectively connected with one end of a pin connector J1, and one end of the pin connector J1 is connected with one end of a pin connector J2; the other end of the pin connector J2 is connected to the relay circuit. The number of the relay circuits is 16, and two sets of pin connectors J1 and J2 are provided, namely J1 and J1B, and J2A and J2B respectively. The first relay circuit comprises two terminals J1_1 and J2_1, wherein J1_1 is connected to pin No. 2 of J1A; j2_1 is connected with the No. 2 pin of J2A;

the second relay circuit includes two terminals J1_2 and J2_2, where J1_2 is connected to pin No. 3 of J1A; j2_2 is connected with the No. 3 pin of J2A;

the third relay circuit includes two terminals J1_3 and J2_3, where J1_3 is connected to pin No. 4 of J1A; j2_3 is connected with the No. 4 pin of J2A;

the fourth relay circuit includes two terminals J1_4 and J2_4, where J1_4 is connected to pin No. 5 of J1; j2_4 is connected with pin No. 5 of J2;

the fifth relay circuit comprises two terminals J1_5 and J2_5, wherein J1_5 is connected to pin No. 6 of J1A; j2_5 is connected with the No. 6 pin of J2A;

the sixth relay circuit includes two terminals J1_6 and J2_6, where J1_6 is connected to pin No. 7 of J1A; j2_6 is connected with No. 7 pin of J2A;

the seventh relay circuit includes two terminals J1_7 and J2_7, where J1_7 is connected to pin No. 8 of J1A; j2_7 is connected with the No. 8 pin of J2A;

the eighth relay circuit includes two terminals J1_8 and J2_8, where J1_8 is connected to pin No. 9 of J1A; j2_1 is connected with pin No. 9 of J2A;

the ninth relay circuit includes two terminals J1_9 and J2_9, where J1_9 is connected to pin No. 2 of J1B; j2_9 is connected with the No. 2 pin of J2B;

the tenth relay circuit includes two terminals J1_10 and J2_10, where J1_10 is connected to pin No. 3 of J1B; j2_10 is connected with pin No. 3 of J2B;

the eleventh relay circuit includes two terminals J1_11 and J2_11, where J1_11 is connected to pin No. 4 of J1B; j2_11 is connected with the No. 4 pin of J2B;

the twelfth relay circuit includes two terminals J1_12 and J2_12, where J1_12 is connected to pin No. 5 of J1B; j2_12 is connected with pin No. 5 of J2B;

the thirteenth relay circuit includes two terminals J1_13 and J2_13, where J1_13 is connected to pin No. 6 of J1B; j2_13 is connected with No. 6 pin of J2B;

the fourteenth relay circuit includes two terminals J1_14 and J2_14, where J1_14 is connected to pin No. 7 of J1B; j2_14 is connected with pin No. 7 of J2B;

the fifteenth relay circuit includes two terminals J1_15 and J2_15, where J1_15 is connected to pin No. 8 of J1B; j2_15 is connected with the No. 8 pin of J2B;

the sixteenth relay circuit includes two terminals J1_16 and J2_16, where J1_16 is connected to pin No. 9 of J1B; j2_16 is connected to pin No. 9 of J2B.

As shown in fig. 4, the interface circuit includes a control chip U4, an automatic reset circuit, a crystal oscillator circuit, and a socket element P18; the automatic reset circuit comprises a resistor R47, a resistor R49, a resistor R60, a resistor R59, a triode Q2, a triode Q3 and a diode D7; an emitting electrode of the triode Q2 is connected with a power supply, a collecting electrode of the triode Q2 is connected with one end of a resistor R49, the other end of the resistor R49 is connected with a No. 44 pin of the main control chip U1, a base electrode of the triode Q2 is connected with one end of a resistor R47, and the other end of the resistor R47 is respectively connected with a collecting electrode of the triode Q3 and a No. 14 pin of the control chip U4; an emitting electrode of the triode Q3 is respectively connected with one end of a resistor R59 and one end of a diode D7, the other end of the resistor R59 is connected with a power supply, and the other end of the diode D7 is connected with a No. 7 pin of the main control chip U1; the base electrode of the triode Q3 is connected with one end of a resistor R60, and the other end of the resistor R60 is connected with a No. 13 pin of a control chip U4;

pin 1 of the control chip U4 is grounded, pin 2 of the control chip U4 is connected with pin 30 of the main control chip U1, pin 3 of the control chip U4 is connected with pin 31 of the control chip U1, pin 4 of the control chip U4 is connected with the filter capacitor C20, pin 5 of the control chip U4 is connected with pin 5 of the socket element P18, and pin 6 of the control chip U4 is connected with pin 3 of the socket element P18; pins 7 and 8 of socket P18 are grounded;

As shown in fig. 7, the power management circuit includes a control chip U6, a resistor R1, a resistor R2, a resistor R3, a resistor R4, a resistor R5, a resistor R6, a capacitor C3, a capacitor C7, a capacitor C8, a capacitor C12, a capacitor C36, an inductor LH1, and a zener diode D5; the No. 1 pin of the control chip U6 is connected with one end of a capacitor C3, an inductor LH1 and one end of a voltage stabilizing diode D5 respectively, and the other end of the capacitor C3 is connected with the No. 8 pin of the control chip U6; the other end of the voltage-stabilizing diode D5 is grounded, the other end of the inductor LH1 is respectively connected with a power supply, a resistor R6 and one end of a capacitor C12, and the other end of the capacitor C12 is grounded; the other end of the resistor R6 is connected with a No. 4 pin of the control chip U6 and one end of the resistor R5 respectively; the other end of the resistor R5 is grounded;

no. 3 pin of control chip U6 is connected with the one end of electric capacity C7 and electric capacity C8 respectively, and the other end of electric capacity C7 is connected with the one end of resistance R3, and the other end of resistance R3 is connected the back ground connection with the other end of electric capacity C8.

EXAMPLE III

This embodiment is a further refinement of the first embodiment. The MCU circuit also comprises an LED circuit and a power supply filter capacitor.

As shown in fig. 1, the LED circuit includes a light emitting diode D8, a light emitting diode D10, a resistor R71, and a resistor R74; one end of the light-emitting diode D8 is connected with a power supply, the other end of the light-emitting diode D8 is connected with one end of the resistor R74, and the other end of the resistor R74 is connected with a No. 11 pin of the main control chip U1; one end of the light emitting diode D10 is connected with a power supply, the other end of the light emitting diode D10 is connected with one end of the resistor R71, and the other end of the resistor R71 is connected with the No. 16 pin of the main control chip U1.

As shown in fig. 1, the power supply filter capacitor includes a polar capacitor CD1, a polar capacitor CD4, a polar capacitor C12, a capacitor C16, and a capacitor C18; one end of the polar capacitor CD1 is connected with a power supply; the other end of the polar capacitor CD1 is grounded; one end of the polar capacitor CD4 is connected with a power supply, and the other end of the polar capacitor CD4 is grounded; one end of the polar capacitor C12 is connected with a power supply, and the other end of the polar capacitor C12 is grounded; one end of the capacitor C12 is connected with a power supply, and the other end of the capacitor C12 is grounded; one end of the capacitor C16 is connected to a power supply, and the other end of the capacitor C16 is grounded.

Example four

This embodiment is a further refinement of embodiment one. As shown in fig. 8, the communication circuit includes a control chip U3, a resistor R52, a resistor R53, a resistor R54, a resistor R55, a resistor R56, a resistor Ru1, a polar capacitor CD2, and a capacitor C23; the No. 1 pin of the control chip U3 is connected with one end of a resistor R54, and the other end of the resistor R54 is respectively connected with a power supply, one end of a resistor R55 and the No. 8 pin of the control chip U3; a No. 3 pin of the control chip U3 is connected with the other end of the resistor R55;

a pin 16 of the control chip U3 is connected with one end of the resistor R56, the other end of the resistor R56 is connected with a pin 22 of the main control chip U1, a pin 15 of the control chip U3 is connected with one end of the resistor R53, and the other end of the resistor R53 is connected with a pin 21; a No. 12 pin of the control chip U3 is connected with one end of the resistor RU1, and the other end of the resistor RU1 is connected with a power supply; and a pin No. 10 of the control chip U3 is connected with the resistor R52, and the other end of the resistor R52 is connected with a pin No. 9 of the control chip U3 and then grounded.

One end of the polar capacitor CD2 is connected with a power supply, and the other end of the polar capacitor CD2 is grounded; one end of the capacitor C23 is connected to a power supply, and the other end of the capacitor C23 is grounded.

EXAMPLE five

This embodiment is a further refinement of embodiment one. As shown in fig. 5, the conversion circuit includes a control chip U5, a resistor R9, a resistor R12, a resistor R31, a resistor R34, a resistor R36, a resistor R40, a resistor R42, a zener diode D3, a zener diode D4, a zener diode D5, a photocoupler, a capacitor C13, and a capacitor C15;

the No. 1 pin of the control chip U5 is connected with the No. 13 pin of the main control chip U1, the No. 2 pin and the No. 3 pin of the control chip U5 are connected with the No. 14 pin of the main control chip U1, and the No. 4 pin of the control chip U5 is connected with the No. 12 pin of the main control chip U1; a No. 8 pin of the control chip U5 is connected with a 3.3V power supply and one end of a capacitor C15, the other end of the capacitor C15 is respectively connected with one end of a resistor R42 and one end of a voltage stabilizing diode D5, and the common ends of the capacitor C15, the resistor R42 and the voltage stabilizing diode D5 are grounded;

a No. 7 pin of the control chip U5 is respectively connected with the other end of the resistor R42, the other end of the voltage stabilizing diode D5, one end of the resistor R36, one end of the voltage stabilizing diode D4 and one end of the resistor R40; the other end of the resistor R40 is connected with a No. 2 pin of the sip 4;

a No. 6 pin of the control chip U5 is connected with the other end of the resistor R36, the other end of the voltage stabilizing diode D4, one ends of the resistor R34 and the resistor R31 and one end of the voltage stabilizing diode D3, and the other end of the resistor R34 is connected with a No. 1 pin of the sip 4; the other end of the resistor R31 is connected with a 3.3V power supply, and the other end of the voltage stabilizing diode D3 is grounded.

A pin 4 of the sip is connected with one end of a resistor R9, and the other end of the resistor R9 is connected with a pin 1 of the photoelectric coupler; the pin 2 of the photoelectric coupler is connected with a power supply, the pin 3 of the photoelectric coupler is connected with one end of a capacitor C13, and the other end of the capacitor C13 is grounded; a pin 4 of the photoelectric coupler is connected with one end of the resistor R12, and the pin 4 of the photoelectric coupler is grounded with the common end of the resistor R12; the other end of the resistor R12 is connected with a 3.3V power supply.

It is noted that, herein, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus.

The control circuit also comprises a buzzer circuit which is used for prompting the output of the relay. The buzzer circuit is shown in figure 6. The buzzer circuit comprises two pins which are externally connected, wherein one end of the first pin is connected with the No. 17 pin of the U1, and the second pin is connected with the 3.3V power supply.

Finally, it should be noted that: although the present invention has been described in detail with reference to the foregoing embodiments, it will be apparent to those skilled in the art that modifications may be made to the embodiments described in the foregoing embodiments, or equivalents may be substituted for elements thereof. Any modification, equivalent replacement, or improvement made within the spirit and principle of the present invention should be included in the protection scope of the present invention.

Claims

1. A control circuit for a multimedia controller, characterized by: the device comprises an MCU circuit, a relay output circuit, a communication circuit, an interface circuit and a power management circuit, wherein the relay output circuit is used for outputting a control signal; the communication circuit is used for wireless communication control; the power management circuit is used for changing voltage and supplying power to the control circuit;

2. The control circuit for a multimedia controller of claim 1, wherein: the clock oscillation circuit comprises a chip oscillation circuit and a clock source oscillation circuit; the chip oscillation circuit comprises a crystal oscillator Y2, a capacitor C5, a capacitor C6 and a resistor R15; a No. 5 pin of the main control chip U1 is respectively connected with a No. 1 pin of the crystal oscillator Y2, one end of the resistor R15 and one end of the capacitor C6; a No. 6 pin of the main control chip U1 is respectively connected with a No. 2 pin of the crystal oscillator Y2, the other end of the resistor R15 and one end of the capacitor C5; the other end of the capacitor C5 is grounded, and the other end of the capacitor C6 is grounded;

the clock source oscillation circuit comprises a crystal oscillator Y1, a capacitor C7 and a capacitor C8; the pin No. 3 of the main control chip U1 is respectively connected with the pin No. 1 of the crystal oscillator Y1 and one end of a capacitor C8, and the pin No. 4 of the main control chip U1 is respectively connected with the pin No. 2 of the crystal oscillator Y1 and one end of a capacitor C7; the other end of the capacitor C7 is grounded, and the other end of the capacitor C8 is grounded.

3. The control circuit for a multimedia controller of claim 1, wherein: the power supply filter circuit comprises a resistor R23, a capacitor C10 and a capacitor C11; one end of the resistor R23 is connected with a power supply, and the other end of the resistor R23 is respectively connected with one end of the capacitor C10, one end of the capacitor C11 and the No. 9 pin of the main control chip U1; the other terminal of the capacitor C10 is grounded, and the other terminal of the capacitor C11 is grounded.

4. The control circuit for a multimedia controller of claim 1, wherein: the power-on reset circuit comprises a resistor R21 and a capacitor C9, one end of the resistor R21 is connected with the power supply, and the other end of the resistor R21 is respectively connected with one end of the capacitor C9 and a No. 7 pin of the main control chip U1; the other terminal of the capacitor C9 is grounded.

5. The control circuit for a multimedia controller of claim 1, wherein: the No. 1 pin of the control chip U2 is connected with the No. 38 pin of the main control chip U1, and the No. 2 pin of the control chip U2 is connected with the No. 3 pin of the main control chip U1 respectively; pins 4 to 8 of the control chip U2 are respectively connected with pins 25 to 29 of the main control chip U1, the other end of the control chip U2 is connected with the pin connector, a port 9 of the control chip U2 is grounded, and a port 10 of the control chip U2 is connected with a power supply.

6. The control circuit for a multimedia controller of claim 5, wherein: the pin connector comprises a pin connector J1 and a pin connector J2, and the pin connector J1 is connected with the pin connector J2; pins 11 to 18 of the control chip U2 are connected with pins 2 to 9 of the pin connector J1, and the pin 1 of the pin connector J1 is connected with a 12V power supply; pins 2-9 of the pin connector J2 are connected with the relay circuit, and pin 1 of the pin connector J2 is connected with a 12V power supply.

7. The control circuit for a multimedia controller of claim 6, wherein: the relay circuit comprises a relay body and an indicating circuit, wherein a pin 1 of the relay body is connected with a pin 2 of the J1, a pin 2 of the relay body is internally connected with a pin 1 of the relay body, a pin 2 of the relay body is also connected with a 12V power supply, a pin 3 of the relay body is internally connected with a pin 5 to form a normally closed switch, and a pin 3 is connected with the inside of a pin 4 when the relay acts to form a normally open switch;

8. The control circuit for a multimedia controller of claim 7, wherein: the relay circuit is provided in plurality.

9. The control circuit for a multimedia controller of claim 1, wherein: the interface circuit comprises a control chip U4, an automatic reset circuit, a crystal oscillator circuit and a socket element P18; the automatic reset circuit comprises a resistor R47, a resistor R49, a resistor R60, a resistor R59, a triode Q2, a triode Q3 and a diode D7; an emitting electrode of the triode Q2 is connected with a power supply, a collector electrode of the triode Q2 is connected with one end of a resistor R49, the other end of the resistor R49 is connected with a No. 44 pin of the main control chip U1, a base electrode of the triode Q2 is connected with one end of a resistor R47, and the other end of the resistor R47 is respectively connected with an emitting electrode of the triode Q3 and a No. 14 pin of the control chip U4; a collector of the triode Q3 is respectively connected with one end of a resistor R59 and one end of a diode D7, the other end of the resistor R59 is connected with a power supply, and the other end of the diode D7 is connected with a No. 7 pin of the main control chip U1; the base electrode of the triode Q3 is connected with one end of a resistor R60, and the other end of the resistor R60 is connected with a No. 13 pin of a control chip U4;

pin 1 of the control chip U4 is grounded, pin 2 of the control chip U4 is connected with pin 30 of the main control chip U1, pin 3 of the control chip U4 is connected with pin 31 of the control chip U1, pin 4 of the control chip U4 is connected with the filter capacitor C20, pin 5 of the control chip U4 is connected with pin 5 of the socket element P18, and pin 6 of the control chip U4 is connected with pin 3 of the socket element P18; pins 7 and 8 of the socket element P18 are grounded, and pins 1 and 2 are connected with a 5V power supply;

10. The control circuit for a multimedia controller of claim 1, wherein: the power management circuit comprises a control chip U6, a resistor R1, a resistor R2, a resistor R3, a resistor R4, a resistor R5, a resistor R6, a capacitor C3, a capacitor C7, a capacitor C8, a capacitor C12, a capacitor C36, an inductor LH1 and a voltage stabilizing diode D5; the pin 1 of the control chip U6 is connected with one end of a capacitor C3, an inductor LH1 and one end of a voltage stabilizing diode D5 respectively, and the other end of the capacitor C3 is connected with the pin 8 of the control chip U6; the other end of the voltage-stabilizing diode D5 is grounded, the other end of the inductor LH1 is respectively connected with a power supply, a resistor R6 and one end of a capacitor C12, and the other end of the capacitor C12 is grounded; the other end of the resistor R6 is respectively connected with a No. 4 pin of the control chip U6 and one end of the resistor R5; the other end of the resistor R5 is grounded;

a pin 2 of the control chip U6 is respectively connected with one ends of the resistor R1 and the resistor R2, the other end of the resistor R1 is grounded, and the other end of the resistor R2 is respectively connected with a power supply, one end of the capacitor C36 and a pin 7 of the control chip U6; the other end of the capacitor C36 is grounded;