CN217426113U - Hard disk lighting device based on single chip microcomputer analysis SGPIO signal - Google Patents

Hard disk lighting device based on single chip microcomputer analysis SGPIO signal Download PDF

Info

Publication number
CN217426113U
CN217426113U CN202221096955.8U CN202221096955U CN217426113U CN 217426113 U CN217426113 U CN 217426113U CN 202221096955 U CN202221096955 U CN 202221096955U CN 217426113 U CN217426113 U CN 217426113U
Authority
CN
China
Prior art keywords
hard disk
chip microcomputer
single chip
interface
signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN202221096955.8U
Other languages
Chinese (zh)
Inventor
张宏光
陈艳飞
张芪
王谦
孙涛
龚骁敏
杨佳东
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
CETC 52 Research Institute
Original Assignee
CETC 52 Research Institute
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by CETC 52 Research Institute filed Critical CETC 52 Research Institute
Priority to CN202221096955.8U priority Critical patent/CN217426113U/en
Application granted granted Critical
Publication of CN217426113U publication Critical patent/CN217426113U/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Landscapes

  • Debugging And Monitoring (AREA)

Abstract

The utility model discloses a hard disk lighting device based on single-chip microcomputer analysis SGPIO signal, including hard disk controller and the hard disk backplate of electricity connection hard disk pilot lamp, hard disk lighting device based on single-chip microcomputer analysis SGPIO signal still includes the singlechip, wherein, hard disk controller is including the first interface that sends SClock signal, the second interface that sends the SLoad signal and the third interface that sends SDataOut signal; one part of GPIO interfaces of the single chip microcomputer are respectively and electrically connected with the first interface, the second interface and the third interface, and the other part of GPIO interfaces of the single chip microcomputer are electrically connected with the hard disk backboard; the SCLock signal, the SLoad signal and the SDataOut signal of the SGPIO are analyzed by the single chip microcomputer, the hard disk indicating lamp is driven through the GPIO interface, and the hard disk indicating lamp is turned on or turned off, so that the problems of high cost and poor universality caused by analyzing through a CPLD chip in the prior art are solved, the cost is reduced, and the program development flow is simplified.

Description

Hard disk lighting device based on single chip microcomputer analysis SGPIO signal
Technical Field
The utility model belongs to server and storage array field, concretely relates to hard disk lighting device based on analytic SGPIO signal of singlechip.
Background
The SGPIO interface is generally used in the field of servers and storage arrays, and mainly functions to provide a physical interface for controlling hard disk indicator lamps according to the SFF8485 protocol. The SGPIO interface is divided into an Initiator end and a Target end, the Initiator end is usually an SAS controller or an SAS expansion chip, the Target end is usually a hard disk backplane, and the SGPIO interface includes 4 signals, namely, SClock, SLoad, SDataOut, and SDataIn. Wherein the SClock, SLoad and SDataOut signals are driven by the Initiator terminal, and the SDataIn signal is driven by the Target terminal. In the field of servers and storage arrays, the accuracy and safety of data are particularly important, and the state of a hard disk indicator light reflects the working and health conditions of a hard disk.
In a traditional hard disk lighting scheme, an SGPIO Target end is usually a CPLD chip or a dedicated SOC chip, which both increases hardware cost undoubtedly, and if the CPLD chip is used, developers need to master Verilog or VHDL languages.
SUMMERY OF THE UTILITY MODEL
An object of the utility model is to solve the problem of proposing in the background art, propose a hard disk lighting device based on the analytic SGPIO signal of singlechip.
In order to achieve the above purpose, the utility model adopts the technical proposal that:
the utility model provides a hard disk lighting device based on analytic SGPIO signal of singlechip, including the hard disk backplate of hard disk controller and electric connection hard disk pilot lamp, the hard disk lighting device based on analytic SGPIO signal of singlechip still includes the singlechip, wherein:
the hard disk controller comprises a first interface for transmitting SClock signals, a second interface for transmitting SLoad signals and a third interface for transmitting SDataOut signals.
The single chip microcomputer comprises GPIO interfaces GPIOA0, GPIOA1 and GPIOA2 which are respectively and correspondingly electrically connected with the first interface, the second interface and the third interface, and other GPIO interfaces which are respectively and electrically connected with the hard disk backboard.
Preferably, the hard disk lighting device for analyzing the SGPIO signal based on the single chip microcomputer further comprises a reset circuit, a power circuit, a clock circuit and a debugging and downloading interface electrically connected with the single chip microcomputer.
Preferably, the hard disk controller is a SAS controller or SAS expansion chip.
Preferably, the single chip microcomputer is provided with a timer, and the timer counts the value to be cleared when GPIOA0 detects a rising edge.
Preferably, the timer is provided with an automatic reload value, when the count value of the timer exceeds the automatic reload value, an overflow interrupt is sent out, and the single chip microcomputer executes a corresponding interrupt service function.
Preferably, the single chip microcomputer is provided with a low level counter.
Preferably, the single chip microcomputer is provided with a falling edge counter.
Preferably, a plurality of hard disks are inserted in the hard disk backboard, the cathode of the hard disk indicating lamp is connected with other GPIO interfaces of the single chip microcomputer, and the anode of the hard disk indicating lamp is connected with the power supply of the hard disk backboard through a series resistor.
Compared with the prior art, the beneficial effects of the utility model are that: the SClock signal, the SLoad signal and the SDataOut signal of the SGPIO are analyzed by the single chip microcomputer, the hard disk indicating lamp is driven through the GPIO interface, and the hard disk indicating lamp is turned on or turned off, so that the problems of high cost and poor universality caused by analyzing through a CPLD chip in the prior art are solved, the cost is further reduced, the development process of a program is simplified, and the high usability and expandability are realized.
Drawings
Fig. 1 is a block diagram of a hard disk lighting device based on a single chip microcomputer analyzing SGPIO signal;
FIG. 2 is a flow chart of the single chip microcomputer for analyzing SGPIO signals;
fig. 3 is a flowchart of the timeout detection of the SClock signal according to the present invention.
Detailed Description
The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only a part of the embodiments of the present application, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
It will be understood that when an element is referred to as being "connected" to another element, it can be directly connected to the other element or intervening elements may also be present. Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used in the description of the present application is for the purpose of describing particular embodiments only and is not intended to be limiting of the application.
In one embodiment, as shown in fig. 1, a hard disk lighting device for analyzing SGPIO signals based on a single chip microcomputer is provided, which includes a hard disk controller and a hard disk backplane electrically connected to a hard disk indicator. This embodiment hard disk lighting device based on single chip microcomputer analysis SGPIO signal still includes the single chip microcomputer, wherein:
the hard disk controller comprises a first interface for sending an SClock signal, a second interface for sending an SLoad signal and a third interface for sending an SDataOut signal;
the single chip microcomputer comprises GPIO interfaces GPIOA0, GPIOA1 and GPIOA2 which are respectively and correspondingly electrically connected with the first interface, the second interface and the third interface, and other GPIO interfaces which are respectively and electrically connected with the hard disk backboard.
In this embodiment, the hard disk controller is an SAS controller or an SAS expansion chip, and serves as an Initiator end of the SGPIO interface.
The Target end of the traditional SGPIO interface adopts a CPLD chip to analyze, the single chip microcomputer is adopted as a main control chip to analyze the SGPIO signal in the embodiment, and the CPLD chip in the traditional hard disk lighting scheme is replaced.
In fig. 1, the SClock signal, the SLoad signal, and the SDataOut signal are all SGPIO signals, and correspond to the first interface, the second interface, and the third interface of the hard disk controller, respectively. The single chip microcomputer adopts a GD32F407ZKT6 single chip microcomputer as a main control chip, a common GPIO interface of the single chip microcomputer is simulated as an SGPIO interface, and on-chip resources of the single chip microcomputer are fully and skillfully utilized.
The partial interfaces GPIOA0, GPIOA1 and GPIOA2 of the single chip microcomputer correspondingly detect SClock signals, SLoad signals and SDataOut signals in sequence. And the rest GPIO interfaces of the singlechip are connected with the hard disk backboard, and the corresponding hard disk indicator lamps are driven in real time according to the analysis result.
The logic basis of the single chip microcomputer software is the SFF8485 protocol, and the SGPIO signal is analyzed according to the protocol. The SClock signal, the SLoad signal and the SDataOut signal all comprise a high-level signal and a low-level signal; the GPIOA0 interface can capture both the rising edge, i.e., the transition from low to high, and the falling edge, i.e., the transition from high to low.
In one embodiment, a plurality of hard disks are inserted in the hard disk backboard, the cathode of the hard disk indicating lamp is connected with other GPIO interfaces of the single chip microcomputer, and the anode of the hard disk indicating lamp is connected with a power supply of the hard disk backboard through a series resistor.
In this embodiment, adopt the mode of irritating the electric current to light the hard disk pilot lamp, the anodal series resistance of hard disk pilot lamp is pulled up to power 3.3V, and other GPIO interfaces of singlechip are connected to the negative pole.
In an embodiment, the hard disk lighting device for analyzing the SGPIO signal based on the single chip microcomputer further includes a reset circuit, a power circuit, a clock circuit, and a debug download interface electrically connected to the single chip microcomputer.
In this embodiment, the reset circuit, the power circuit, the clock circuit, and the debug download interface are all peripheral circuits of the single chip microcomputer, and are used to ensure that the single chip microcomputer can work normally. The reset circuit is a circuit used for enabling the single chip microcomputer to be restored to an initial state; the power supply circuit is used for supplying power; the clock circuit generally consists of a crystal oscillator, a crystal oscillation control chip and a capacitor, and generates an oscillation circuit which accurately moves like a clock; the debugging downloading interface adopts an SWD (Serial Wire debug) serial debugging interface, the interface has a high-speed mode and is reliable, the occupied GPIO resources are few, and the online debugging can be carried out on a software program by matching with a simulator, so that the software development is facilitated, and the development period is shortened.
In one embodiment, the single chip is provided with a timer that counts the value to zero when GPIOA0 detects a rising edge.
In this embodiment, the timer is used to count the time for holding the high level of the SClock signal, and the frequency division coefficient of the timer is 84, that is, the counting frequency of the timer is 84M/84 ═ 1 MHz.
In one embodiment, the single chip is provided with a low level counter.
In this embodiment, the low level counter is used to count the low level of the SLoad signal.
In one embodiment, the single chip is provided with a falling edge counter.
In this embodiment, the falling edge counter is used for counting the falling edges of the SClock signal.
As shown in fig. 2, the specific steps of the single chip microcomputer analyzing the SLoad, SClock and SDataOut signals are as follows:
step 1, setting a timer input capture function in the initialization process of a GPIOA0 interface, initially capturing a rising edge, triggering an interrupt service function when GPIOA0 detects the rising edge, turning to step 2, and otherwise continuing the step 1;
step 2, setting the rising edge flag bit to indicate that GPIOA0 detects the rising edge, clearing the timer count value, and setting GPIOA0 for capturing the falling edge;
step 3, when GPIOA0 detects a falling edge, triggering an interrupt service function, turning to step 4, otherwise continuing step 3;
step 4, the falling edge counter adds 1 to the falling edge count value of the SClock signal, the SClock capture position is set, it indicates that the GPIOA1 interface needs to detect and process the SLoad signal, and GPIOA0 is set for rising edge capture;
step 5, when GPIOA1 detects that the SLoad signal is at a high level, turning to step 6, otherwise, adding 1 to a low level count value of the SLoad signal by a low level counter, clearing an SClock capture bit, and turning to step 1;
step 6, judging whether the SLoad signal low level count is more than or equal to 5, if so, turning to step 7, otherwise, resetting the SLoad signal low level count value by a low level counter;
step 7, the low level counter clears the low level count value of the SLoad signal, the falling edge counter clears the falling edge count value of the SChook signal, and the GPIOA2 begins to analyze the SDataOut signal;
and step 8, every 3 SDataOut signals form a group and correspond to one hard disk indicating lamp information, the single chip microcomputer carries out logic operation on the 3 SDataOut signals to obtain the state of the corresponding hard disk indicating lamp, the single chip microcomputer drives the hard disk indicating lamp through part of GPIO interfaces and lights the corresponding hard disk indicating lamp, the process is continued until all the hard disk indicating lamps are detected to be finished, and then the step 1 is carried out.
In one embodiment, the timer is provided with an automatic reload value, when the count value of the timer exceeds the automatic reload value, an overflow interrupt is sent out, and the single chip microcomputer executes a corresponding interrupt service function.
In this embodiment, as shown in fig. 3, the auto-reload value of the timer is configured to be 64000, and the counting frequency of the timer is 1MHz, that is, after the timer counts for 64ms, an overflow interrupt occurs. When GPIOA0 detects rising edge, the timer count is cleared, if overflow interrupt occurs, it indicates that SClock signal high level continues to exceed 64ms, and the hard disk indicator light is turned off.
In one embodiment, a specific embodiment of the hard disk lighting device that analyzes the SGPIO signal based on the single chip microcomputer is as follows:
the system comprises a self-made single chip microcomputer minimum system hardware circuit and an LED lamp panel hardware circuit, wherein the LED lamp panel simulates a hard disk backboard, other GPIO interfaces of the single chip microcomputer, which are electrically connected with the hard disk backboard, are connected with the LED lamp panel through a DuPont wire, an SGPIO signal of an SAS controller is electrically connected with a simulated SGPIO interface of the single chip microcomputer through a flying wire form, and meanwhile, the SGPIO signal of the SAS controller is electrically connected with the hard disk backboard through a connector. And (3) performing read-write test on the hard disk inserted in the hard disk backboard by using a hard disk read-write tool, and comparing the indicator lamp of the hard disk backboard with the LED lamp panel indicator lamp, wherein the flashing states of the indicator lamps are completely consistent. The hard disk lighting device for analyzing the SGPIO signal based on the single chip microcomputer is completely feasible.
The device adopts the single chip microcomputer to analyze SClock signals, SLoad signals and SDataOut signals of the SGPIO, drives the hard disk indicating lamp through the GPIO interface, and lights or extinguishes the hard disk indicating lamp, so that the problems of higher cost and poorer universality caused by analyzing through a CPLD chip in the prior art are solved, the cost is further reduced, the development flow of a program is simplified, and the device has higher usability and expandability.
The technical features of the embodiments described above may be arbitrarily combined, and for the sake of brevity, all possible combinations of the technical features in the embodiments described above are not described, but should be considered as being within the scope of the present specification as long as there is no contradiction between the combinations of the technical features.
The above-mentioned embodiments only express the more specific and detailed embodiments described in the present application, but not be construed as limiting the claims. It should be noted that, for a person skilled in the art, several variations and modifications can be made without departing from the concept of the present application, which falls within the scope of protection of the present application. Therefore, the protection scope of the present patent shall be subject to the appended claims.

Claims (8)

1. The utility model provides a hard disk lighting device based on single chip microcomputer analysis SGPIO signal, includes hard disk controller and the electric hard disk backplate of connecting the hard disk pilot lamp, its characterized in that: hard disk lighting device based on single chip microcomputer analysis SGPIO signal still includes the single chip microcomputer, wherein:
the hard disk controller comprises a first interface for sending an SClock signal, a second interface for sending an SLoad signal and a third interface for sending an SDataOut signal;
the single chip microcomputer comprises GPIO interfaces GPIOA0, GPIOA1 and GPIOA2 which are respectively and correspondingly electrically connected with the first interface, the second interface and the third interface, and other GPIO interfaces which are respectively and electrically connected with the hard disk backboard.
2. The hard disk lighting device based on the SGPIO signal analyzed by the single chip microcomputer according to claim 1, wherein: the hard disk lighting device for analyzing the SGPIO signal based on the single chip microcomputer further comprises a reset circuit, a power circuit, a clock circuit and a debugging and downloading interface which are electrically connected with the single chip microcomputer.
3. The hard disk lighting device based on the SGPIO signal analyzed by the single chip microcomputer according to claim 1, characterized in that: the hard disk controller is an SAS controller or an SAS expansion chip.
4. The hard disk lighting device based on the SGPIO signal analyzed by the single chip microcomputer according to claim 1, wherein: the single chip microcomputer is provided with a timer, and the timer is cleared when the GPIOA0 detects a rising edge.
5. The hard disk lighting device based on the single chip microcomputer SGPIO signal of claim 4, wherein: the timer is provided with an automatic reloading value, when the count value of the timer exceeds the automatic reloading value, an overflow interrupt is sent out, and the single chip microcomputer executes a corresponding interrupt service function.
6. The hard disk lighting device based on the SGPIO signal analyzed by the single chip microcomputer according to claim 1, wherein: the single chip microcomputer is provided with a low level counter.
7. The hard disk lighting device based on the SGPIO signal analyzed by the single chip microcomputer according to claim 1, wherein: the single chip microcomputer is provided with a falling edge counter.
8. The hard disk lighting device based on the SGPIO signal analyzed by the single chip microcomputer according to claim 1, wherein: the hard disk backboard is inserted with a plurality of hard disks, the cathode of the hard disk indicating lamp is connected with other GPIO interfaces of the single chip microcomputer, and the anode of the hard disk indicating lamp is connected with a power supply of the hard disk backboard through a series resistor.
CN202221096955.8U 2022-05-06 2022-05-06 Hard disk lighting device based on single chip microcomputer analysis SGPIO signal Active CN217426113U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202221096955.8U CN217426113U (en) 2022-05-06 2022-05-06 Hard disk lighting device based on single chip microcomputer analysis SGPIO signal

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202221096955.8U CN217426113U (en) 2022-05-06 2022-05-06 Hard disk lighting device based on single chip microcomputer analysis SGPIO signal

Publications (1)

Publication Number Publication Date
CN217426113U true CN217426113U (en) 2022-09-13

Family

ID=83184296

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202221096955.8U Active CN217426113U (en) 2022-05-06 2022-05-06 Hard disk lighting device based on single chip microcomputer analysis SGPIO signal

Country Status (1)

Country Link
CN (1) CN217426113U (en)

Similar Documents

Publication Publication Date Title
US7987389B2 (en) System and method for testing sleep and wake functions of computer
EP3511831A1 (en) System and method for remote system recovery
CN105814767B (en) A kind of electronic equipment fast charge method, device and equipment
US20110078350A1 (en) Method for generating multiple serial bus chip selects using single chip select signal and modulation of clock signal frequency
CN101937381B (en) Test method of SGPIO (Serial General Purpose Input/Output) signal on SAS backboard
CN104572226A (en) Method and device for detecting mainboard starting abnormity
CN110647486B (en) PCIe link training method, end equipment and communication system
CN217426113U (en) Hard disk lighting device based on single chip microcomputer analysis SGPIO signal
CN105260144A (en) Design method for optimizing hard disk management
CN109918250A (en) A kind of method, apparatus and readable storage medium storing program for executing of server power supply timing sequence test
CN103149468A (en) Electron component parameter testing device
CN115904849B (en) PCIE link signal testing method, system, computer equipment and medium
CN105740116B (en) The detection method of hard disk backboard and its serial universal input output signal
CN116087752A (en) Chip testing method, system, device and medium
CN105223880A (en) A kind of programmed control box net synchronization capability detection method and device
CN108549042A (en) A kind of NVME LED detecting systems and detection method
CN214669306U (en) Non-invasive load identification module detection device
CN110601923B (en) Working mode configuration method, communication module and power terminal
CN110895502B (en) Control method and device for hard disk state indicating device, electronic equipment and storage medium
CN112579366A (en) Hard disk in-place detection system
CN210328065U (en) Driving system of hard disk signal lamp
CN105607977A (en) Power state testing system
CN112634977A (en) Chip with debugging memory interface and debugging method thereof
CN110109789A (en) A kind of novel OTP MCU test method
CN211429331U (en) Device for detecting LAN signal based on FPGA

Legal Events

Date Code Title Description
GR01 Patent grant
GR01 Patent grant