CN217406402U - Cascade sequence starting circuit of isolated converter - Google Patents
Cascade sequence starting circuit of isolated converter Download PDFInfo
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- CN217406402U CN217406402U CN202220384581.3U CN202220384581U CN217406402U CN 217406402 U CN217406402 U CN 217406402U CN 202220384581 U CN202220384581 U CN 202220384581U CN 217406402 U CN217406402 U CN 217406402U
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Abstract
The utility model provides a cascade order starting circuit of isolated converter, including the first field effect transistor drive module who is used for driving first isolated converter module and controlled switch module work, be used for driving second isolated converter module and the second field effect transistor drive module of next-level controlled switch module work, be used for reducing respectively and export the first pseudo-load module and the pseudo-load module of second in order to prevent load element burn out, be used for controlling the controlled switch module of second time delay module electricity respectively to the magnitude of voltage in the load. The utility model provides a pair of cascade order starting circuit of isolated converter can solve load device electricity overstress inefficacy that the load is slightly light to cause, the too big monolithic of electric impulse current can not reliably start failure on the monolithic, the polylith veneer that the multi-disc was used uses at same device and causes the power overcurrent protection action scheduling problem to can adopt cascade order starting mode between the multi-disc isolated DC/DC converter.
Description
Technical Field
The utility model relates to an electronic circuit technical field especially relates to a cascade order starting circuit of isolated converter.
Background
At present, for the application of multiple isolated DC/DC converters on the same single board, the problems to be solved are that the power-on impact current of single-chip application is small, the starting time between the chips is time-difference, but the total starting time must be less than the power-on reset time of the watchdog, so as to ensure that the CPU does not need to wait for the power-on of the peripheral interface circuit after the reset starting, and at the same time, the output voltage cannot exceed the power supply voltage range of the load circuit, and the ripple cannot be higher than the ripple requirement of the input voltage.
Therefore, it is desirable to provide a cascaded sequential start-up circuit of an isolated converter to solve the above technical problems.
SUMMERY OF THE UTILITY MODEL
The utility model discloses the main technical problem who solves provides a cascade order starting circuit of isolated converter, can solve load device electric overstress inefficacy that the load is lighter to cause, the too big monolithic of electric impulse current can not reliably start failure on the monolithic, the polylith veneer that the multi-disc was used uses at same device and causes power overcurrent protection action scheduling problem to can adopt the cascade order starting mode between the multi-disc isolated DC/DC converter.
In order to solve the above technical problem, a technical solution adopted in the present invention is to provide a cascade sequential start circuit of an isolated converter, which includes a first isolated converter module 1, a second isolated converter module 2, a first fet driving module 3 for driving the first isolated converter module 1 and a controlled switch module 10 to work, a first delay module 4 for making voltage rise to a state capable of driving the first fet driving module 3 to be turned on, a first LC filter module 5 for reducing current impact of the first isolated converter module 1 to a power supply source when the first isolated converter module 1 is powered on, a first pi-type filter module 6 for filtering current output from the first isolated converter module 1 to a load, a first pseudo load module 7 for reducing a voltage value output from the first isolated converter module 1 to the load to prevent the load element from being burned out, A second fet driving module 8 for driving the second isolated converter module 2 and the next stage of controlled switch module to work, a second delay module 9 for increasing the voltage to drive the second fet driving module 8 to conduct, a controlled switch module 10 for controlling the second delay module 9 to power up, a second LC filter module 11 for reducing the current impact of the second isolated converter module 2 on the power supply when the second isolated converter module 2 is powered up, a second pi-type filter module 12 for filtering the current output by the second isolated converter module 2 to the load, and a second pseudo-load module 13 for reducing the voltage value output by the second isolated converter module 2 to the load to prevent the load element from burning out;
wherein, the power input end of the first delay module 4 is electrically connected with the power supply, the control signal input end of the first fet driving module 3 is electrically connected with the power output end of the first delay module 4, the control signal output end of the first fet driving module 3 is electrically connected with the signal input end of the first isolated converter module 1 and the control signal input end of the controlled switch module 10 through the first LC filter module 5, the signal output end of the first isolated converter module 1 is electrically connected with the first pseudo load module 7 through the first pi-type filter module 6, the control signal output end of the controlled switch module 10 is electrically connected with the second delay module 9, the power input end of the second delay module 9 is electrically connected with the power supply, the control signal input end of the second fet driving module 8 is electrically connected with the power output end of the second delay module 9 The control signal output end of the second fet driving module 8 is electrically connected to the signal input end of the second isolated converter module 2 and the control signal input end of the next-stage controlled switch module through the second LC filter module 11, respectively, and the signal output end of the second isolated converter module 2 is electrically connected to the second dummy load module 13 through the second pi-type filter module 12.
In the examples, it is preferred that:
the first fet driving module 3 includes a P-channel MOS transistor PM1 for driving the first isolated converter module 1 and the controlled switch module 10 to operate, a gate of the P-channel MOS transistor PM1 is electrically connected to the first delay module 4 through a resistor RMP1, a drain of the P-channel MOS transistor PM1 is electrically connected to a signal input terminal of the first isolated converter module 1 and a control signal input terminal of the controlled switch module 10 through the first LC filter module 5, respectively, and a source of the P-channel MOS transistor PM1 is electrically connected to the power supply;
the second fet driving module 8 includes a P-channel MOS transistor PM11 for driving the second isolated converter module 2 and the next stage controlled switch module to operate, the gate of the P-channel MOS transistor PM11 is electrically connected to the second delay module 9 through a resistor RMP11, the drain of the P-channel MOS transistor PM11 is electrically connected to the signal input terminal of the second isolated converter module 2 and the control signal input terminal of the next stage controlled switch module respectively through the second LC filter module 11, and the source of the P-channel MOS transistor PM11 is electrically connected to the power supply.
In the examples, it is preferred that:
the first delay module 4 comprises a capacitor Cin1 and a resistor R01, one end of the capacitor Cin1 is electrically connected with the power supply, the other end of the capacitor Cin1 is electrically connected with one end of the resistor R01 and the control signal input end of the first fet driving module 3, and the other end of the resistor R01 is grounded;
the second delay module 9 includes a capacitor Cin11 and a resistor R011 therein, one end of the capacitor Cin11 is electrically connected to the power supply, the other end of the capacitor Cin11 is electrically connected to one end of the resistor R011 and the control signal input end of the second fet driving module 8, and the other end of the resistor R011 is electrically connected to the control signal output end of the controlled switch module 10.
In the examples, it is preferred that:
the first LC filter module 5 includes a winding chip inductor L1 and a filter capacitor C2, one end of the winding chip inductor L1 is electrically connected to the control signal output end of the first fet driving module 3, the other end of the winding chip inductor is electrically connected to the signal input end of the first isolated converter module 1 and the control signal input end of the controlled switch module 10, one end of the filter capacitor C2 is electrically connected to the other end of the winding chip inductor L1, and the other end of the filter capacitor C2 is grounded;
including wire winding chip inductor L11 and filter capacitor C21 in the second LC filter module 11, wire winding chip inductor L11 one end with the control signal output end electricity of second field effect transistor drive module 8 is connected, the other end electricity respectively connects the signal input part of second isolated converter module 2 with the control signal input part of next stage controlled switch module, filter capacitor C21's one end with wire winding chip inductor L11's other end electricity is connected, the other end ground connection.
In the examples, it is preferred that:
the first pi-type filter module 6 includes a patch magnetic bead B1, a filter capacitor C3 and a filter capacitor C4, the filter capacitor C3 and the filter capacitor C4 are connected in parallel to the signal output end of the first isolated converter module 1, and the patch magnetic bead B1 is electrically connected between the filter capacitor C3 and the filter capacitor C4;
the second pi-type filter module 12 includes a patch bead B11, a filter capacitor C31, and a filter capacitor C41, the filter capacitor C31 and the filter capacitor C41 are connected in parallel to the signal output terminal of the second isolated converter module 2, and the patch bead B11 is electrically connected between the filter capacitor C31 and the filter capacitor C41.
In the examples, it is preferred that:
the first pseudo load module 7 comprises a resistor R1, a resistor R2 and a resistor R3 which are connected in parallel with the signal output end of the first isolated converter module 1 through the first pi-type filter module 6;
the second pseudo load module 13 includes a resistor R11, a resistor R21, and a resistor R31 connected in parallel to the signal output terminal of the second isolated converter module 2 through the second pi filter module 12.
In the examples, it is preferred that:
the controlled switch module 10 includes a triode Q11 for controlling the second delay module 9 to be powered on, a control signal input end of the triode Q11 is electrically connected with a control signal output end of the first fet driving module 3 through the first LC filter module 5, a control signal output end of the triode Q11 is electrically connected with the second delay module 9, and a resistor R11 is electrically connected between the control signal input end of the triode Q11 and the first LC filter module 5.
In the examples, it is preferred that:
the first isolated converter module 1 includes an isolated DC/DC converter U1 with a model number of DCP010505BP, a signal input end of the isolated DC/DC converter U1 is electrically connected to a control signal output end of the first fet driving module 3 through the first LC filter module 5, and a signal output end of the isolated DC/DC converter U1 is electrically connected to the first dummy load module 7 through the first pi-type filter module 6;
the second isolated converter module 2 includes an isolated DC/DC converter U11 with a model number of DCP010505BP, a signal input terminal of the isolated DC/DC converter U11 is electrically connected to a control signal output terminal of the second fet driving module 8 through the second LC filter module 11, and a signal output terminal of the isolated DC/DC converter U11 is electrically connected to the second dummy load module 13 through the second pi filter module 12.
The utility model has the advantages that: the utility model provides a pair of cascade order starting circuit of isolated converter can solve load device electricity overstress inefficacy that the load is slightly light to cause, the too big monolithic of electric impulse current can not reliably start failure on the monolithic, the polylith veneer that the multi-disc was used uses at same device and causes the power overcurrent protection action scheduling problem to can adopt cascade order starting mode between the multi-disc isolated DC/DC converter.
Drawings
Fig. 1 is a schematic block diagram of a circuit structure of a cascade sequential start-up circuit of an isolated converter according to the present invention;
fig. 2 is a schematic circuit diagram of a cascaded sequential start-up circuit of another isolated converter according to the present invention.
Detailed Description
The technical solution of the present invention will be described in detail with reference to the drawings.
Referring to fig. 1, the cascade sequential start circuit of the isolated converter of the present embodiment includes a first isolated converter module 1, a second isolated converter module 2, a first fet driving module 3 for driving the first isolated converter module 1 and a controlled switch module 10 to operate, a first delay module 4 for increasing a voltage to a level that can drive the first fet driving module 3 to conduct, a first LC filter module 5 for reducing a current impact on a power supply when the first isolated converter module 1 is powered on, a first pi-type filter module 6 for filtering a current output from the first isolated converter module 1 to a load, a first dummy load module 7 for reducing a voltage value output from the first isolated converter module 1 to the load to prevent a load element from being burned out, and a second fet driving module 8 for driving the second isolated converter module 2 and a next controlled switch module to operate The second time delay module 9 is used for enabling the voltage to rise to a value capable of driving the second field effect transistor driving module 8 to be conducted, the controlled switch module 10 is used for controlling the second time delay module 9 to be electrified, the second LC filter module 11 is used for reducing the current impact of the second isolated converter module 2 on a power supply when the second isolated converter module 2 is electrified, the second pi-type filter module 12 is used for carrying out filtering processing on the current output into the load by the second isolated converter module 2, and the second pseudo load module 13 is used for reducing the voltage value output into the load by the second isolated converter module 2 to prevent the load elements from being burnt out;
wherein, the power input end of the first delay module 4 is electrically connected with the power supply, the control signal input end of the first fet driving module 3 is electrically connected with the power output end of the first delay module 4, the control signal output end of the first fet driving module 3 is electrically connected with the signal input end of the first isolated converter module 1 and the control signal input end of the controlled switch module 10 through the first LC filter module 5, the signal output end of the first isolated converter module 1 is electrically connected with the first dummy load module 7 through the first pi-type filter module 6, the control signal output end of the controlled switch module 10 is electrically connected with the second delay module 9, the power input end of the second delay module 9 is electrically connected with the power supply, the control signal input end of the second fet driving module 8 is electrically connected with the power output end of the second delay module 9, the control signal output end of the second fet driving module 8 is electrically connected with the power supply through the second LC filter module 11 respectively And a signal output end of the second isolated converter module 2 is electrically connected with a signal input end of the second isolated converter module 2 and a control signal input end of the next-stage controlled switch module, and a signal output end of the second isolated converter module 2 is electrically connected with a second pseudo load module 13 through a second pi-type filter module 12.
In this embodiment, when the +5VCC power supply starts to be powered up, the power supply voltage is not stable, then the first delay module 4 can delay the voltage which is just powered up, so that the voltage which is left is increased to above 2V and then output, and further drive the first fet driving module 3 to conduct, after the first fet driving module 3 is conducted, on one hand, the voltage can be output to the first isolated converter module 1, so that the first isolated converter module 1 can output the first group of voltages to the first dummy load module 7 through the first pi-type filter module 6, on the other hand, the first fet driving module 3 can output the level signal to the controlled switch module 10, so that the controlled switch module 10 is conducted, at this time, the working processes of the second delay module 9, the second fet driving module 8 and the second isolated converter module 2 are similar to those of the first delay module 4, the first fet driving module 3 and the first isolated converter module 1, namely, the second delay module 9 can delay the voltage which is just electrified, so that the voltage which is left is increased to more than 2V and then output, and then the second field effect transistor driving module 8 is driven to be conducted, and after the second field effect transistor driving module 8 is conducted, on one hand, the voltage can be output to the second isolated converter module 2, so that the second isolated converter module 2 can output a second group of voltage to the second pseudo load module 13 through the second pi-type filtering module 12, on the other hand, the second field effect transistor driving module 8 can output a level signal to the next-stage controlled switch module, so that the next-stage controlled switch module is conducted, and the working processes of the subsequent delay module which is electrically connected with the next-stage controlled switch module and the isolated converter module can be analogized.
In the present embodiment, the present application can describe a conversion circuit in which 2 isolated converter modules are disposed for simplicity, but in practical applications, the number of isolated converter modules to which the present application is applicable is not limited.
In this embodiment, the whole circuit of this application is that after the previous power began to work and export, the order was through the time delay, lets the next power begin to work and exports, avoids multichannel power to start simultaneously and causes the heavy current to rush.
Referring to fig. 2, in the embodiment of the present invention, it is preferable that:
the first fet driving module 3 includes a P-channel MOS transistor PM1 for driving the first isolated converter module 1 and the controlled switch module 10 to operate, a gate of the P-channel MOS transistor PM1 is electrically connected to the first delay module 4 through a resistor RMP1, a drain of the P-channel MOS transistor PM1 is electrically connected to a signal input terminal of the first isolated converter module 1 and a control signal input terminal of the controlled switch module 10 through a first LC filter module 5, respectively, and a source of the P-channel MOS transistor PM1 is electrically connected to the power supply;
the second fet driving module 8 includes a P-channel MOS transistor PM11 for driving the second isolated converter module 2 and the next-stage controlled switch module to operate, a gate of the P-channel MOS transistor PM11 is electrically connected to the second delay module 9 through a resistor RMP11, a drain of the P-channel MOS transistor PM11 is electrically connected to a signal input terminal of the second isolated converter module 2 and a control signal input terminal of the next-stage controlled switch module through a second LC filter module 11, and a source of the P-channel MOS transistor PM11 is electrically connected to the power supply.
In this embodiment, before the first LC filter module 5, the PMOS is used as a slow start circuit, and is also used as a part of the start control of the cascade sequence, since there is no special requirement for the switching speed, the influence of junction capacitance is not considered in this application, and in order to prevent the PMOS from overcurrent damage, a 510 Ω resistor is connected in series to the gate thereof.
Referring to fig. 2, in the embodiment of the present invention, it is preferable that:
the first time delay module 4 comprises a capacitor Cin1 and a resistor R01, one end of the capacitor Cin1 is electrically connected with a power supply, the other end of the capacitor Cin1 is electrically connected with one end of the resistor R01 and a control signal input end of the first field effect transistor driving module 3, and the other end of the resistor R01 is grounded;
the second delay module 9 includes a capacitor Cin11 and a resistor R011, one end of the capacitor Cin11 is electrically connected to the power supply, the other end of the capacitor Cin11 is electrically connected to one end of the resistor R011 and the control signal input end of the second fet driving module 8, and the other end of the resistor R011 is electrically connected to the control signal output end of the controlled switch module 10.
Referring to fig. 2, in the embodiment of the present invention, it is preferable that:
the first LC filter module 5 comprises a wire-wound chip inductor L1 and a filter capacitor C2, one end of the wire-wound chip inductor L1 is electrically connected with the control signal output end of the first field effect transistor driving module 3, the other end of the wire-wound chip inductor L1 is electrically connected with the signal input end of the first isolated converter module 1 and the control signal input end of the controlled switch module 10 respectively, one end of the filter capacitor C2 is electrically connected with the other end of the wire-wound chip inductor L1, and the other end of the filter capacitor C2 is grounded;
the second LC filter module 11 includes a wire-wound chip inductor L11 and a filter capacitor C21, one end of the wire-wound chip inductor L11 is electrically connected to the control signal output terminal of the second fet driving module 8, the other end of the wire-wound chip inductor L11 is electrically connected to the signal input terminal of the second isolated converter module 2 and the control signal input terminal of the next-stage controlled switch module, one end of the filter capacitor C21 is electrically connected to the other end of the wire-wound chip inductor L11, and the other end of the filter capacitor C21 is grounded.
In the embodiment, the winding chip inductor L1 and the winding chip inductor L11 in the present application can be winding chip inductors with a precision of 20%, a current of not less than 700mA, and a direct resistance of not more than 500m Ω.
In this embodiment, since the isolated converter module of the present application adopts the CMOS/DMOS process, it is similar to a high-speed digital circuit at the initial power-on, and has a strong current demand on the power supply, and it is very easy to cause the power supply to drop, and when the input voltage is lower than a certain value, the internal circuit of the power supply chip detects that the voltage is too low, and the driving circuit is turned off, so that the power supply chip cannot be started, and the power supply is restarted after meeting the conditions, thereby the continuous restart phenomenon occurs; under the condition, large current impact is easy to form, and a plurality of downlink burrs occur on the input power voltage; meanwhile, the starting process is too long, and the transformer inside the chip is easily saturated and heated to be damaged. If the inlet of the power chip is not properly used as a decoupling capacitor for storing energy or a plurality of power chips are started simultaneously, the phenomenon is more obvious; if the polylith veneer that the multi-disc started simultaneously uses simultaneously at same device, very easily causes device power to go up electric in-process current protection action, appears "hiccup" phenomenon, so this application chooses for use at least 2.2 uF's ceramic capacitor at the power entry of isolated converter module, under ESR value minimum and the prerequisite of guaranteeing that the chip can normally start, consider that the electric impact of self to the power on the electric capacity, the ceramic capacitor who gets 2.2uF does entry energy storage decoupling capacitance.
In this embodiment, in order to prevent the impact of power-on the power supply of the isolated converter module, the present application may add primary inductors L1 and L11 before the energy storage capacitors C2 and C21 to form an LC filter, and considering that the maximum impact current on a single circuit does not exceed the design target of 0.5A, the inductor is used for current derating and the maximum current is 700 mA; meanwhile, considering the influence of the direct resistance on the power drop, the voltage of the power inlet of the isolated converter module needs to be normally started when the power input is 5V-10%, namely 4.5V, and then the voltage drop of the impact current on the inductor is far less than 0.5V, namely the direct resistance of the inductor is far less than 1 omega, and considering the direct resistance influence of the slow start circuit, the actual selection of the direct resistance of the inductor is 0.38 omega +/-20%.
In this embodiment, the capacitance values of the filter capacitor C2 and the filter capacitor C21 of the present application cannot be too small, otherwise, the power supply may be restarted continuously, and cannot be too large, otherwise, the power-on impact current of the power supply may be large.
Referring to fig. 2, in the embodiment of the present invention, it is preferable that:
the first pi-type filter module 6 comprises a patch magnetic bead B1, a filter capacitor C3 and a filter capacitor C4, the filter capacitor C3 and the filter capacitor C4 are connected in parallel to the signal output end of the first isolated converter module 1, and the patch magnetic bead B1 is electrically connected between the filter capacitor C3 and the filter capacitor C4;
the second pi-type filter module 12 includes a patch magnetic bead B11, a filter capacitor C31, and a filter capacitor C41, the filter capacitor C31 and the filter capacitor C41 are connected in parallel to the signal output terminal of the second isolated converter module 2, and the patch magnetic bead B11 is electrically connected between the filter capacitor C31 and the filter capacitor C41.
In the embodiment, in order to reduce the influence of high-frequency noise, a magnetic bead, a 100nF ceramic capacitor and 10uF are used to form a pi-type filter circuit, the characteristic frequency of the ceramic capacitor is 2-3 MHz, the characteristic frequency of the 100nF ceramic capacitor is 20-30 MHz, and the characteristic impedance of the selected magnetic bead at 100MHz is 600 Ω.
Referring to fig. 2, in the embodiment of the present invention, it is preferable that:
the first pseudo load module 7 comprises a resistor R1, a resistor R2 and a resistor R3 which are connected in parallel with the signal output end of the first isolated converter module 1 through a first pi-type filter module 6;
the second pseudo load module 13 includes a resistor R11, a resistor R21, and a resistor R31 connected in parallel to the signal output terminal of the second isolated converter module 2 through the second pi filter module 12.
In this embodiment, since the load is light in practical application, a dummy load needs to be added, in order to be suitable for different practical load conditions, 3 resistors are connected in parallel, and the minimum resistance value of a single resistor cannot be smaller than 100 Ω according to the maximum power calculation.
Referring to fig. 2, in the embodiment of the present invention, it is preferable that:
the controlled switch module 10 includes a transistor Q11 for controlling the second delay module 9 to be powered on, a control signal input end of the transistor Q11 is electrically connected with a control signal output end of the first field effect transistor driving module 3 through the first LC filter module 5, a control signal output end of the transistor Q11 is electrically connected with the second delay module 9, and a resistor R11 is electrically connected between the control signal input end of the transistor Q11 and the first LC filter module 5.
In the present embodiment, as a control part for the cascade sequential start, a general NPN transistor is selected to control the time control circuit of the PMOS start circuit; the base of the triode is enough to drive current under the condition of considering the conducting state, a resistor of 510 omega is connected in series with the base, and a control signal of the resistor is from the first pin power supply input VS of the upper stage isolation type converter module.
In this embodiment, this application also can adopt the isolation control scheme, namely the isolation power output of last level passes through the slow start time constant switch of opto-coupler (TLP127) control next level, and function and performance satisfy the requirement completely, and only slightly more on the cost, this typical circuit has chooseed for use lower cost's non-isolation triode control, has avoided the influence to next level power on time when this level isolation converter module damages, and it is comparatively convenient to lay wire simultaneously, and the space is more compact.
In this embodiment, if isolation control is used, the optocoupler can use TLP127, although the dark current of the optocoupler is small, the PMOS circuit is started when the primary side of the optocoupler is not controlled, and only the starting time of the PMOS circuit is long, and under the current circuit parameters, the self-starting time is 200ms away, which determines a point, that is, the number of cascades cannot be too large; but at the same time it brings the advantage that if a certain stage in the cascade is damaged, it will not have a functional impact on the next stage
Referring to fig. 2, in the embodiment of the present invention, it is preferable that:
the first isolated converter module 1 comprises an isolated DC/DC converter U1 with the model number of DCP010505BP, a signal input end of the isolated DC/DC converter U1 is electrically connected with a control signal output end of the first field effect transistor driving module 3 through the first LC filter module 5, and a signal output end of the isolated DC/DC converter U1 is electrically connected with the first dummy load module 7 through the first pi-type filter module 6;
the second isolated converter module 2 includes an isolated DC/DC converter U11 with a model number of DCP010505BP, a signal input terminal of the isolated DC/DC converter U11 is electrically connected to a control signal output terminal of the second fet driving module 8 through the second LC filter module 11, and a signal output terminal of the isolated DC/DC converter U11 is electrically connected to the second dummy load module 13 through the second pi filter module 12.
In this embodiment, the application is an improvement made by combining the practical application condition of the DCP010505BP, so as to solve the problems of electrical overstress failure of a load device caused by a light load, failure of a single chip caused by an overlarge electrical impact current on the single chip due to unreliable starting of the single chip, and power overcurrent protection action caused by using a plurality of single boards with multiple application in the same device; at present, the circuit has no single board application.
In this embodiment, if the process route allows the use of DIP packaging, and the product has a pressure on the cost, it may be considered to select the isolated DC/DC of DCH01 series, because the isolated DC/DC of DCH01 series is implemented by using a triode discrete component, the switching frequency is low, the actually measured power-on impact current is small, and at the same time, the price has a significant advantage. However, due to the discrete components adopted by the circuit, there is a risk of no start-up, and due to the low frequency, the filtering measures need to be fully considered, and meanwhile, the circuit needs to pay attention to the requirements of the false load, the energy storage decoupling capacitor for starting and the like.
In this embodiment, when multiple boards are used in one device at the same time, the simultaneous starting impact current of the multiple boards theoretically is the sum of currents of the single boards at the same time, and the effect of starting the multiple boards in a cascade sequence is actually realized by changing the current impact of the single boards into single-chip current impact, so that the same device of the multiple boards is applied and developed into starting of the pieces with the same number of boards. The limitation of this approach is that it is not appropriate to use the standard circuit when the number of boards is too large, resulting in cumulative effects that exceed the dynamic load capability of the device power supply.
It can be seen that, by implementing the cascade sequential start-up circuit of the isolated converters described in fig. 1 to fig. 2, the problems of electrical overstress failure of the load device caused by a light load, unreliable start failure of a single chip caused by an excessive electrical impact current on the single chip, overcurrent protection action of a power supply caused by using a plurality of single boards with multiple applications in the same device, and the like can be solved, and a cascade sequential start-up mode can be adopted among the isolated DC/DC converters.
The above is only the embodiment of the present invention, and the patent scope of the present invention is not limited thereby, and all the equivalent structures made by the contents of the specification and the attached drawings or directly or indirectly applied to other related technical fields are included in the same way in the patent protection scope of the present invention.
Claims (8)
1. A cascade sequential start-up circuit of an isolated converter, comprising: the power supply control circuit comprises a first isolated converter module (1), a second isolated converter module (2), a first field effect transistor driving module (3) used for driving the first isolated converter module (1) and a controlled switch module (10) to work, a first time delay module (4) used for enabling voltage to rise to drive the first field effect transistor driving module (3) to be conducted, a first LC filter module (5) used for reducing current impact of the first isolated converter module (1) on a power supply when the first isolated converter module (1) is powered on, a first pi-type filter module (6) used for filtering current output to a load by the first isolated converter module (1), a first pseudo load module (7) used for reducing voltage value output to the load by the first isolated converter module (1) and preventing load elements from burning out, A second field effect transistor driving module (8) for driving the second isolated converter module (2) and the next-stage controlled switch module to work, a second time delay module (9) for enabling the voltage to rise to drive the second field effect transistor driving module (8) to be conducted, and a controlled switch module (10) for controlling the second time delay module (9) to be electrified, the second LC filtering module (11) is used for reducing the current impact of the second isolated converter module (2) on the power supply when the second isolated converter module (2) is powered on, the second pi-shaped filtering module (12) is used for filtering the current output by the second isolated converter module (2) into the load, and the second pseudo-load module (13) is used for reducing the voltage value output by the second isolated converter module (2) into the load to prevent the load element from burning out;
wherein the power input end of the first time delay module (4) is electrically connected with the power supply, the control signal input end of the first field effect transistor driving module (3) is electrically connected with the power output end of the first time delay module (4), the control signal output end of the first field effect transistor driving module (3) is respectively and electrically connected with the signal input end of the first isolated converter module (1) and the control signal input end of the controlled switch module (10) through the first LC filter module (5), the signal output end of the first isolated converter module (1) is electrically connected with the first pseudo load module (7) through the first pi-type filter module (6), the control signal output end of the controlled switch module (10) is electrically connected with the second time delay module (9), the power input end of the second time delay module (9) is electrically connected with the power supply, the control signal input end of the second field effect transistor driving module (8) is electrically connected with the power output end of the second time delay module (9), the control signal output end of the second field effect transistor driving module (8) is electrically connected with the signal input end of the second isolated converter module (2) and the control signal input end of the next-stage controlled switch module respectively through the second LC filtering module (11), and the signal output end of the second isolated converter module (2) is electrically connected with the second pseudo-load module (13) through the second pi-type filtering module (12).
2. A cascaded sequential start-up circuit of an isolated converter according to claim 1, wherein:
the first field effect transistor driving module (3) comprises a P-channel MOS transistor PM1 for driving the first isolated converter module (1) and the controlled switch module (10) to operate, a gate of the P-channel MOS transistor PM1 is electrically connected to the first delay module (4) through a resistor RMP1, a drain of the P-channel MOS transistor PM1 is electrically connected to a signal input terminal of the first isolated converter module (1) and a control signal input terminal of the controlled switch module (10) through the first LC filter module (5), and a source of the P-channel MOS transistor PM1 is electrically connected to the power supply;
the second field effect transistor driving module (8) comprises a P-channel MOS transistor PM11 for driving the second isolated converter module (2) and the next-stage controlled switch module to work, the grid electrode of the P-channel MOS transistor PM11 is electrically connected with the second delay module (9) through a resistor RMP11, the drain electrode of the P-channel MOS transistor PM11 is electrically connected with the signal input end of the second isolated converter module (2) and the control signal input end of the next-stage controlled switch module respectively through the second LC filtering module (11), and the source electrode of the P-channel MOS transistor PM11 is electrically connected with the power supply.
3. A cascaded sequential start-up circuit of an isolated converter according to claim 1, wherein:
the first time delay module (4) comprises a capacitor Cin1 and a resistor R01, one end of the capacitor Cin1 is electrically connected with the power supply, the other end of the capacitor Cin1 is electrically connected with one end of the resistor R01 and a control signal input end of the first field effect transistor driving module (3), and the other end of the resistor R01 is grounded;
the second time delay module (9) comprises a capacitor Cin11 and a resistor R011, one end of the capacitor Cin11 is electrically connected with the power supply, the other end of the capacitor Cin11 is electrically connected with one end of the resistor R011 and the control signal input end of the second field effect transistor driving module (8), and the other end of the resistor R011 is electrically connected with the control signal output end of the controlled switch module (10).
4. A cascaded sequential start-up circuit of an isolated converter according to claim 1, wherein:
the first LC filter module (5) comprises a wire-wound chip inductor L1 and a filter capacitor C2, one end of the wire-wound chip inductor L1 is electrically connected with the control signal output end of the first field effect transistor driving module (3), the other end of the wire-wound chip inductor L1 is electrically connected with the signal input end of the first isolated converter module (1) and the control signal input end of the controlled switch module (10), one end of the filter capacitor C2 is electrically connected with the other end of the wire-wound chip inductor L1, and the other end of the filter capacitor C2 is grounded;
including wire winding chip inductor L11 and filter capacitor C21 in second LC filter module (11), wire winding chip inductor L11's one end with the control signal output part electricity of second field effect transistor drive module (8) is connected, the other end electricity is connected respectively the signal input part of second isolated converter module (2) with the control signal input part of next grade controlled switch module, filter capacitor C21's one end with wire winding chip inductor L11's other end electricity is connected, the other end ground connection.
5. A cascaded sequential start-up circuit of an isolated converter according to claim 1, wherein:
the first pi-type filter module (6) comprises a patch magnetic bead B1, a filter capacitor C3 and a filter capacitor C4, the filter capacitor C3 and the filter capacitor C4 are connected in parallel to a signal output end of the first isolated converter module (1), and the patch magnetic bead B1 is electrically connected between the filter capacitor C3 and the filter capacitor C4;
the second pi-type filter module (12) includes a patch magnetic bead B11, a filter capacitor C31 and a filter capacitor C41, the filter capacitor C31 and the filter capacitor C41 are connected in parallel to the signal output end of the second isolated converter module (2), and the patch magnetic bead B11 is electrically connected between the filter capacitor C31 and the filter capacitor C41.
6. A cascaded sequential start-up circuit of an isolated converter according to claim 1, wherein:
the first pseudo-load module (7) internally comprises a resistor R1, a resistor R2 and a resistor R3 which are connected in parallel with the signal output end of the first isolated converter module (1) through the first pi-type filtering module (6);
the second pseudo load module (13) comprises a resistor R11, a resistor R21 and a resistor R31 which are connected in parallel with the signal output end of the second isolated converter module (2) through the second pi-type filtering module (12).
7. A cascaded sequential start-up circuit of an isolated converter according to claim 1, wherein:
the controlled switch module (10) is internally provided with a triode Q11 for controlling the second time delay module (9) to be electrified, the control signal input end of the triode Q11 is electrically connected with the control signal output end of the first field effect transistor driving module (3) through the first LC filtering module (5), the control signal output end of the triode Q11 is electrically connected with the second time delay module (9), and the control signal input end of the triode Q11 is electrically connected with a resistor R11 between the first LC filtering module (5).
8. A cascade sequential start-up circuit of an isolated converter according to any of claims 1 to 7, characterized in that:
the first isolated converter module (1) comprises an isolated DC/DC converter U1 with the model number of DCP010505BP, a signal input end of the isolated DC/DC converter U1 is electrically connected with a control signal output end of the first field effect transistor driving module (3) through the first LC filtering module (5), and a signal output end of the isolated DC/DC converter U1 is electrically connected with the first dummy load module (7) through the first pi-shaped filtering module (6);
the second isolated converter module (2) comprises an isolated DC/DC converter U11 with the model number of DCP010505BP, a signal input end of the isolated DC/DC converter U11 is electrically connected with a control signal output end of the second field effect transistor driving module (8) through the second LC filtering module (11), and a signal output end of the isolated DC/DC converter U11 is electrically connected with the second dummy load module (13) through the second pi-shaped filtering module (12).
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202220384581.3U CN217406402U (en) | 2022-02-23 | 2022-02-23 | Cascade sequence starting circuit of isolated converter |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202220384581.3U CN217406402U (en) | 2022-02-23 | 2022-02-23 | Cascade sequence starting circuit of isolated converter |
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| Publication Number | Publication Date |
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| CN217406402U true CN217406402U (en) | 2022-09-09 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN202220384581.3U Active CN217406402U (en) | 2022-02-23 | 2022-02-23 | Cascade sequence starting circuit of isolated converter |
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| CN (1) | CN217406402U (en) |
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- 2022-02-23 CN CN202220384581.3U patent/CN217406402U/en active Active
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