CN217404757U

CN217404757U - Multi-stage anti-interference signal collector

Info

Publication number: CN217404757U
Application number: CN202221662259.9U
Authority: CN
Inventors: 樊楚雄; 张海燕; 张琦
Original assignee: Hangzhou Liyu Technology Co ltd
Current assignee: Hangzhou Liyu Technology Co ltd
Priority date: 2022-06-30
Filing date: 2022-06-30
Publication date: 2022-09-09
Anticipated expiration: 2032-06-30

Abstract

The utility model belongs to the technical field of signal acquisition, concretely relates to multistage anti-interference signal collector, including 4 way digital quantity input circuit, 4 way analog quantity input circuit, clock monitoring circuit, voltage monitoring circuit, MCU treater, power input circuit, 4 way digital quantity output circuit, WIFI module and RS485 circuits; the input end of the 4-path digital quantity input circuit is connected with an external signal source, the output end of the 4-path digital quantity input circuit is connected with the MCU processor and used for transmitting received digital quantity signals, the input end of the 4-path analog quantity input circuit is connected with the external signal source, the output end of the 4-path analog quantity input circuit is connected with the MCU processor and used for transmitting received analog quantity signals, and the output end of the clock monitoring circuit is connected with the MCU processor and used for outputting clock signals. The defects of the prior art are overcome, the forms of 4-path analog quantity input and 4-path switching value input are designed, and the output of the 4-path switching value is integrated to the maximum extent in a limited space as much as possible.

Description

Multi-stage anti-interference signal collector

Technical Field

The utility model belongs to the technical field of signal acquisition, concretely relates to multistage anti-interference signal collector.

Background

The signal collector is an automatic device with the functions of on-site real-time data collection and processing, and has the functions of real-time collection, automatic storage, real-time display, real-time feedback, automatic processing and automatic transmission. Since the optical fiber is used as an industrial acquisition device, the nondestructive output is ensured on a disordered field, the optical fiber has strong anti-interference capability and environmental adaptability, and the multi-input and multi-output operation is ensured as much as possible in a limited working space, which is also one of the difficulties; in order to solve the above problem, the present application provides a multi-stage interference-free signal collector with 4 inputs and outputs.

SUMMERY OF THE UTILITY MODEL

An object of the utility model is to provide a multistage anti-interference signal collector has overcome prior art's not enough, designs the form of 4 way analog input and 4 way switching value inputs, and the output of 4 way switching value is as far as possible to be done furthest under limited space and integrates.

In order to solve the above problems, the utility model adopts the following technical scheme:

the multi-stage anti-interference signal collector comprises 4 paths of digital quantity input circuits, 4 paths of analog quantity input circuits, a clock monitoring circuit, a voltage monitoring circuit, an MCU (microprogrammed control unit) processor, a power supply input circuit, 4 paths of digital quantity output circuits, a WIFI (wireless fidelity) module and an RS485 circuit;

the input end of the 4-path digital quantity input circuit is connected with an external signal source, the output end of the 4-path digital quantity input circuit is connected with the MCU processor and is used for transmitting received digital quantity signals, the input end of the 4-path analog quantity input circuit is connected with the external signal source, the output end of the 4-path analog quantity input circuit is connected with the MCU processor and is used for transmitting received analog quantity signals, the output end of the clock monitoring circuit is connected with the MCU processor and is used for outputting clock signals, the input end of the power supply input circuit is connected with 12-36V voltage and supplies power to the MCU processor and other chips through internal voltage stabilization and reduction; the output end of the voltage monitoring circuit is connected with the MCU processor and used for monitoring the voltage of each circuit, one end of the 4-path digital quantity output voltage circuit is connected with the MCU processor, and the other end of the 4-path digital quantity output voltage circuit is connected with an external port and used for transmitting processed information; and one end of the RS485 circuit is connected with the MCU processor, and the other end of the RS485 circuit is connected with an external port.

Further, the power input circuit comprises an input voltage isolation circuit for guaranteeing the anti-interference performance of the circuit, a 24V-to-5V voltage conversion circuit for degrading and converting input voltage, a 24V-to-4V voltage conversion circuit for converting voltage to supply power to the indicator lamp, and a 5V-to-3.3V voltage conversion circuit for improving the filtering performance.

Further, the input voltage isolation circuit is composed of a piezoresistor, a self-recovery fuse, a conjugate coil, two Schottky diodes, an electrolytic capacitor, two capacitors and a resistor, wherein the piezoresistor is connected in parallel at two ends of the voltage input port, the self-recovery fuse is connected in series with the voltage input port, the conjugate coil is respectively connected with the self-recovery fuse, the voltage input port and the two Schottky diodes, and the fuse, the electrolytic capacitor, the capacitors and the resistor are respectively connected in parallel between the power input port and the PE.

Further, the 24V to 5V voltage conversion circuit comprises an MP2457 chip, three resistors, five capacitors and an electrolytic capacitor, and the capacitors are connected in parallel at the input and output ends of the MP2457 chip.

Further, the 4-path digital quantity input circuit comprises an optical coupling isolation circuit with 4-path digital quantity input and a selection circuit for a dry joint and a wet joint.

Further, the optical coupling isolation circuit comprises a four-way digital input port DI, a transient suppression diode TVS and a series resistor, parallel resistors, a photoelectric coupler 354T, digital input ports of DI1, DI2, DI3 and DI4, the transient suppression diode TVS is connected with a digital input port and a GDI1 port in parallel, the series resistor consists of input resistors RDI2, RDI5, RDI8, RDI11 and output resistors RDI1, RDI4, RDI7 and RDI10, one ends of the input resistors RDI2, RDI5, RDI8 and RDI11 are connected with a GDI1 port, the other end is connected with the port of the photoelectric coupler 1, one ends of output resistors RDI1, RDI4, RDI7 and RDI10 are connected with 3.3V voltage, the other end is connected with the port of the photoelectric coupler 4, the parallel resistors are RDI3, RDI6, RDI9 and RDI12, and the port 4 of the photoelectric coupler is connected with the MCU4, and the port 3 is connected with GND.

Furthermore, the selection circuit is composed of row pins P1, P2 and a jumper cap, a P1 end COM is connected with a GDI1 to form a wet node, and a P2 end 1.3 is connected with a P2 end 2.4 to form a dry contact.

Further, the 4-path analog input circuit is composed of a voltage resistor, a capacitor, a transient suppression diode TVS, a regulating resistor, a jumper port P7, an electrostatic protection diode and an operational amplifier.

Furthermore, the 4-path digital quantity output circuit is composed of a relay drive circuit, a relay isolation circuit, a relay output circuit and a relay output state indicator lamp circuit.

Compared with the prior art, the utility model, following beneficial effect has:

1. the utility model relates to a 4 way analog input and the form of 4 way switching value input, the output of 4 way switching value, but furthest's integration is done under limited space as far as possible.

2. The utility model discloses all set up multistage anti-interference protection in the module of power input, analog input, digital output, realized the surge prevention, prevent excessive pressure, prevent overflow, the function, the interference killing feature is strong, has guaranteed input signal's stability.

3. The utility model realizes the input mode switching of analog voltage and analog current by introducing the jumper cap into the analog input circuit; the switching of dry and wet nodes is realized by introducing a jumper cap into a digital quantity input circuit, and large-maximization integration is performed in a limited space on the premise of ensuring multi-path input and output, so that the product size is reduced, and the use is easy.

Drawings

Fig. 1 is a schematic structural diagram of a multi-stage anti-interference signal collector.

Fig. 2 is a circuit diagram of an input voltage isolation circuit in the power input circuit.

Fig. 3 is a circuit diagram of a 24V to 5V voltage conversion circuit in a power input circuit.

Fig. 4 is a circuit diagram of a 24V to 4V voltage conversion circuit in the power input circuit.

Fig. 5 is a circuit diagram of a 5V to 3.3V voltage conversion circuit in the power input circuit.

Fig. 6 is a circuit diagram of an optical coupling and isolating circuit in the 4-channel digital quantity input circuit.

Fig. 7 is a schematic diagram of a selection circuit in the 4-way digital quantity input circuit.

Fig. 8 is a circuit diagram of a 4-way analog input circuit.

Fig. 9 is a circuit diagram of a relay drive circuit in a 4-way digital quantity output circuit.

Fig. 10 is a circuit diagram of a relay isolation circuit in a 4-way digital quantity output circuit.

Fig. 11 is a circuit diagram of a relay output circuit in a 4-way digital quantity output circuit.

Fig. 12 is a circuit diagram of an output status indicator circuit in a 4-way digital quantity output circuit.

Detailed Description

The technical solutions in the embodiments of the present invention will be described clearly and completely with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments in the present invention, all other embodiments obtained by a person skilled in the art without creative work belong to the protection scope of the present invention.

As shown in fig. 1, the multi-stage anti-interference signal collector of the present invention comprises 4 digital input circuits, 4 analog input circuits, a clock monitoring circuit, a voltage monitoring circuit, an MCU processor, a power input circuit, 4 digital output circuits, a WIFI module and an RS485 circuit;

the input end of the 4-path digital quantity input circuit is connected with an external signal source, the output end of the 4-path digital quantity input circuit is connected with the MCU processor and is used for transmitting received digital quantity signals, the input end of the 4-path analog quantity input circuit is connected with the external signal source, the output end of the 4-path analog quantity input circuit is connected with the MCU processor and is used for transmitting received analog quantity signals, the output end of the clock monitoring circuit is connected with the MCU processor and is used for outputting clock signals, the input end of the power supply input circuit is connected with 12-36V voltage and supplies power to the MCU processor and other chips through internal voltage stabilization and reduction; the output end of the voltage monitoring circuit is connected with the MCU processor and used for monitoring the voltage of each circuit, one end of the 4-path digital quantity output voltage circuit is connected with the MCU processor, and the other end of the 4-path digital quantity output voltage circuit is connected with an external port and used for transmitting processed information; one end of the RS485 circuit is connected with the MCU processor, and the other end of the RS485 circuit is connected with the external port.

The power input circuit comprises an input voltage isolation circuit for guaranteeing anti-interference performance of the circuit, a 24V-to-5V voltage conversion circuit for degrading and converting input voltage, a 24V-to-4V voltage conversion circuit for converting voltage to supply power to the indicator lamp and a 5V-to-3.3V voltage conversion circuit for improving filtering performance.

As shown in fig. 2, the input voltage isolation circuit is composed of a voltage dependent resistor, a self-recovery fuse, a conjugate coil, two schottky diodes, an electrolytic capacitor, two capacitors and a resistor; the voltage dependent resistor VSR1 is connected in parallel at two ends of the voltage input port VIN + and VIN-, and has the main functions of lightning protection, overvoltage protection and surge prevention in the circuit, so that the anti-interference capability of the circuit is ensured; the self-recovery fuse PPTC1 is connected in series with the voltage input port VIN +, so that overcurrent and overheat protection is formed, and when the current of the circuit is greater than a certain threshold value, the circuit is automatically disconnected, so that the protection effect is achieved; the conjugate coil interface 3 is connected with a self-recovery fuse PPTC1, the interface 4 is connected with VIN-, and the function of the interface in the circuit is that when working current flows through two coils with opposite winding directions, two magnetic fields H1 and H2 which are mutually counteracted are generated, and at the moment, the working current is mainly damped by the ohmic resistance of the coils and the small leakage inductance under the negligible working frequency; if an interference signal flows through the coil, the coil presents high impedance to generate strong damping effect, so that the effect of attenuating the interference signal is achieved; the interface 1 and the interface 2 of the conjugate coil are respectively connected with two Schottky diodes in series, and the function of the conjugate coil is to eliminate the reverse connection operation influence on a voltage input port; the PE is connected with the metal shell, and a fuse, two capacitors and a resistor are respectively connected in parallel between the power input port VIN-and the PE to play a role in filtering.

Therefore, when the voltage is connected, the circuit mainly has the functions of overcurrent prevention, overvoltage prevention, reverse connection prevention, interference prevention and surge prevention on the input voltage.

As shown in fig. 3, the 24V to 5V voltage conversion circuit includes an MP2457 chip, three resistors, five capacitors and an electrolytic capacitor; the circuit mainly realizes voltage conversion from 24V to 5V through the MP2457 chip, a plurality of capacitors are connected in parallel at each input output of the MP2457 voltage chip to form the function of multi-layer filtering, and the degradation conversion of input voltage is realized by adjusting the relationship between R01 resistance and R02 resistance.

As shown in fig. 4, the 24V to 4V voltage conversion circuit includes an MP2457 chip, three resistors, five capacitors and an electrolytic capacitor, and the circuit mainly realizes the voltage conversion from 24V to 4V through the MP2457 chip, and connects a plurality of capacitors in parallel at each input and output of the MP2457 voltage chip to form the function of multi-layer filtering, and realizes the degraded conversion of the input voltage by adjusting the relationship between the resistances of R03 and R04; the 4V voltage is introduced into the circuit to mainly supply power to the LED work indicator lamp independently, so that when the circuit breaks down, preliminary investigation is performed through level input.

As shown in fig. 5, the 5V to 3.3V voltage conversion circuit includes an SGM2036 chip and 3 capacitors, and converts a 5V voltage formed by the 24V to 5V voltage conversion circuit into 3.3V through the SGM2036 chip, and a plurality of capacitors are connected in parallel to an input/output port of the SGM2036 chip to perform a filtering function.

The 4-path digital quantity input circuit comprises an optical coupling isolation circuit with 4-path digital quantity input and a selection circuit for a dry joint and a wet joint.

As shown in fig. 6, the optocoupler-isolation circuit includes four digital input ports DI, a transient suppression diode TVS, a series resistor, a parallel resistor, and a photocoupler 354T; the digital input ports are DI1, DI2, DI3 and DI4 respectively, and the transient suppression diode TVS is connected in parallel between the digital input port and the GDI1 port, so that the functions of overvoltage prevention and surge prevention are achieved. The series resistance is mainly composed of input resistances RDI2, RDI5, RDI8 and RDI11 and output resistances RDI1, RDI4, RDI7 and RDI10, and the function of the series resistance is integrity in a closed loop. One end of each of input resistors RDI2, RDI5, RDI8 and RDI11 is connected with a GDI1 port, and the other end of each of the input resistors RDI5, RDI8 and RDI11 is connected with a photocoupler 1 port. One end of each of output resistors RDI1, RDI4, RDI7 and RDI10 is connected with 3.3V voltage, and the other end of each of the output resistors is connected with the port 4 of the photoelectric coupler. The parallel resistors are RDI3, RDI6, RDI9 and RDI12, are connected between the port 1 and the port 2 of the photoelectric coupler in parallel, and play a role in preventing overvoltage. The 4 port of the photoelectric coupler is connected with the MCU4, and the 3 port is connected with GND.

As shown in fig. 7, the selection circuit is composed of pins P1, P2 and jumper caps, a pin P1 terminal COM is connected with GDI1 to form a wet node, and a pin P2 terminal 1.3 is connected with 2.4 to form a dry node; the dry and wet nodes are the most different in whether the digital quantity is input along with the input of external voltage, and the concept of introducing the dry and wet nodes greatly enhances the working range and function of the digital quantity input.

As shown in fig. 8, the 4-channel analog input circuit is composed of a voltage resistor, a capacitor, a transient suppression diode TVS, a regulating resistor, a jumper port P7, an electrostatic protection diode, and an operational amplifier.

The digital quantity output circuit consists of a relay drive circuit, a relay isolation circuit, a relay output circuit and a relay output state indicator lamp circuit.

As shown in fig. 9, the relay driving circuit includes an SNH54H573 driving chip and a series resistor, one end of the series resistor is connected in series to

ports

1 and 11 of the SNH54H573 driving chip, the other end of the series resistor is connected to a capacitor, and the other end of the capacitor is connected to GND; an 2.3.4.5 port of the SNH54H573 is connected with the MCU4, a 16.17.18.19 port is an output port, a 20 port is connected with VCC, and a 10 port is connected with GND; the SNH54H573 driving chip is used for amplifying weak current signals input by the MCU4 so as to drive the relay.

As shown in fig. 10, the relay isolation circuit mainly includes a series resistor, a parallel capacitor, and a photocoupler TLP 521; the series resistor ensures the integrity of a circuit loop, the photoelectric coupler TLP521 mainly plays a role in preventing signal interference, the port 3 of the TLP521 is the output end of the optical coupling isolation circuit, and the parallel capacitor plays a role in filtering.

As shown in fig. 11, the relay output circuit includes a darlington driving chip 2803, a relay HF46F, and a rectifier diode; connecting the output end of the relay isolation circuit with the input end of a Darlington driving chip 2803, and connecting the output end of the Darlington driving chip 2803 with a relay HF 46F; two ends of the relay are connected with a rectifier diode in parallel, and the rectifier diode has the function of absorbing self-induction voltage when the coil of the relay is disconnected; the port of the relay HF46F3.4 is the output port of the signal collector.

As shown in fig. 12, the relay output status indicator lamp circuit mainly comprises a triode, a relay status indicator lamp LED lamp and a series resistor; one end of the relay state indicating lamp LED lamp is connected with the series resistor, the other end of the relay state indicating lamp LED lamp is connected with the triode, the other end of the triode is connected with the GND, the conduction state of the triode is controlled through the high and low levels of the MCU, and therefore the control over the relay state indicating lamp LED lamp is achieved.

The utility model discloses a design 4 way analog input and 4 way switching value input's form, the output of 4 way switching value, but as far as possible does furthest's integration under limited space.

It is obvious to a person skilled in the art that the invention is not restricted to details of the above-described exemplary embodiments, but that it can be implemented in other specific forms without departing from the spirit or essential characteristics of the invention. The present embodiments are therefore to be considered in all respects as illustrative and not restrictive, the scope of the invention being indicated by the appended claims rather than by the foregoing description, and all changes which come within the meaning and range of equivalency of the claims are therefore intended to be embraced therein. Any reference sign in a claim should not be construed as limiting the claim concerned.

Claims

1. Multistage anti-interference signal collector, its characterized in that: the circuit comprises 4 paths of digital quantity input circuits, 4 paths of analog quantity input circuits, a clock monitoring circuit, a voltage monitoring circuit, an MCU (microprogrammed control unit) processor, a power input circuit, 4 paths of digital quantity output circuits, a WIFI (wireless fidelity) module and an RS485 circuit;

the input end of the 4-path digital quantity input circuit is connected with an external signal source, the output end of the 4-path digital quantity input circuit is connected with the MCU processor and used for transmitting received digital quantity signals, the input end of the 4-path analog quantity input circuit is connected with the external signal source, the output end of the 4-path analog quantity input circuit is connected with the MCU processor and used for transmitting received analog quantity signals, the output end of the clock monitoring circuit is connected with the MCU processor and used for outputting clock signals, the input end of the power supply input circuit is connected with 12-36V voltage and supplies power to the MCU processor and other chips through internal voltage stabilization and voltage reduction; the output end of the voltage monitoring circuit is connected with the MCU processor and used for monitoring the voltage of each circuit, one end of the 4-path digital quantity output voltage circuit is connected with the MCU processor, and the other end of the 4-path digital quantity output voltage circuit is connected with an external port and used for transmitting processed information; and one end of the RS485 circuit is connected with the MCU processor, and the other end of the RS485 circuit is connected with an external port.

2. The multi-stage interference rejection signal collector of claim 1, wherein: the power input circuit comprises an input voltage isolation circuit for guaranteeing anti-interference performance of the circuit, a 24V-to-5V voltage conversion circuit for degrading and converting input voltage, a 24V-to-4V voltage conversion circuit for converting voltage to supply power to the indicator lamp, and a 5V-to-3.3V voltage conversion circuit for improving filtering performance.

3. The multi-stage interference rejection signal collector of claim 2, wherein: the input voltage isolation circuit is composed of a piezoresistor, a self-recovery fuse, a conjugate coil, two Schottky diodes, an electrolytic capacitor, two capacitors and a resistor, wherein the piezoresistor is connected to two ends of a voltage input port in parallel, the self-recovery fuse is connected with the voltage input port in series, the conjugate coil is respectively connected with the self-recovery fuse, the voltage input port and the two Schottky diodes, and the fuse, the electrolytic capacitor, the capacitors and the resistor are respectively connected between a power input port and PE in parallel.

4. The multi-stage interference-free signal collector of claim 2, wherein: the 24V-to-5V voltage conversion circuit comprises an MP2457 chip, three resistors, five capacitors and an electrolytic capacitor, wherein the capacitors are connected in parallel at the input and the output of the MP2457 chip.

5. The multi-stage interference rejection signal collector of claim 1, wherein: the 4-path digital quantity input circuit comprises an optical coupling isolation circuit with 4-path digital quantity input and a selection circuit for a dry joint and a wet joint.

6. The multi-stage interference rejection signal collector of claim 5, wherein: the optical coupling isolation circuit comprises four paths of digital input ports DI, a transient suppression diode TVS, a series resistor, a parallel resistor and a photoelectric coupler 354T, the digital input ports DI1, DI2, DI3 and DI4 are respectively arranged on the input ports TVS, the transient suppression diode TVS is connected in parallel between the digital input ports and a GDI1 port, the series resistor comprises input resistors RDI2, RDI5, RDI8 and RDI11 and output resistors RDI1, RDI4, RDI7 and RDI10, one ends of the input resistors RDI2, RDI5, RDI8 and RDI11 are connected with a GDI1 port, the other ends of the input resistors are connected with a photoelectric coupler 1 port, one ends of the output resistors RDI1, RDI1 and RDI1 are connected with 3.3V voltage, the other ends of the input resistors are connected with a GDI 364 port, and the parallel resistors RDI1, RDI1 and a photoelectric coupler 363, a MCU 364 port are connected between the photoelectric coupler and a GND 364 port.

7. The multi-stage interference rejection signal collector of claim 5, wherein: the selection circuit is composed of row pins P1, P2 and a jumper cap, wherein a COM end of the row pin P1 is connected with a GDI1 to form a wet node, and a P2 end of the row pin is connected with 1.3 and 2.4 to form a dry contact.

8. The multi-stage interference rejection signal collector of claim 1, wherein: the 4-path analog quantity input circuit is composed of a voltage resistor, a capacitor, a transient suppression diode TVS, a regulating resistor, a jumper port P7, an electrostatic protection diode and an operational amplifier.

9. The multi-stage interference rejection signal collector of claim 1, wherein: the 4-path digital quantity output circuit consists of a relay drive circuit, a relay isolation circuit, a relay output circuit and a relay output state indicator lamp circuit.